Nvidia Jetson Xavier NX with Lattice FPGA

Hi, I need some guidance for getting a design with a FPGA connected to the Nvidia Jetsons Camera interface working.

I’m using the Lattice Semi LICFL-17 Crosslink-NX FPGA to take parallel data and format to CSI-2 MIPI data. I’ve configured the design to take use a static test pattern, running at 1920 x 1080 x 60fps RAW8 and using 2-Lanes of CSI-2. And I’ve scoped the lanes to make sure signals are actually being sent. On power up, the video data starts without any indications from the Nvidia SoM. The FPGA is entirely independent the Nvidia, not using any specific Power, Clocks, I2C etc from the Nvidia. The only connection being the CSI-2 Lanes.

In the sensor driver software, I’ve modified not to use the I2C command/receive. Also, added support for the GREY8 monochrome image data. I’m able to see the /dev/video0 show up after boot up. I’ve also run the v4l-ctl --list-formats-ext command to confirm all the driver software is showing correctly.

When I try to launch a basic pipeline like “gst-launch-1.0 v4l2src ! fakesink” I get a failure and see a debug message saying the “vi: no reply from camera processor” error show up.

Any ideas on where to start debugging? I can provide the device tree and sensor software as needed. Thanks.

Also, I’m running JP 4.4, L4T 32.4.3

Have a check below link to get the trace log to check if more information for it.


Gotcha, I’m away from my test environment today but will follow up with more information tomorrow. Thanks

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