Optimizing UEFI boot time

Hi, I’m using Jetson Orin develop kit with R35.3.1

From UART log, there is a lot of empty lines in Jetson UEFI firmware.

[0000.062] I> MB1 (version: 0.32.0.0-t234-54845784-57325615)
[0000.067] I> t234-A01-0-Silicon (0x12347) Prod
[0000.071] I> Boot-mode : Coldboot
[0000.075] I> Emulation:
[0000.077] I> Entry timestamp: 0x00000000
[0000.081] I> last_boot_error: 0x0
[0000.084] I> BR-BCT: preprod_dev_sign: 0
[0000.088] I> rst_source: 0xb, rst_level: 0x1
[0000.092] I> Task: Bootchain select WAR set (0x5000ba65)
[0000.097] I> Task: Enable SLCG (0x5000bab1)
[0000.101] I> Task: CRC check (0x5001ea19)
[0000.105] I> Skip FUSE records CRC check as records_integrity fuse is not burned
[0000.112] I> Task: Initialize MB2 params (0x5000cb51)
[0000.117] I> MB2-params @ 0x40060000
[0000.121] I> Task: Crypto init (0x5001d981)
[0000.125] I> Task: Secure debug controls (0x5000c0a9)
[0000.130] I> Task: strap war set (0x5000ba2d)
[0000.134] I> Task: Initialize SOC Therm (0x5001bd35)
[0000.139] I> Task: Program NV master stream id (0x5000c05d)
[0000.144] I> Task: Verify boot mode (0xd4820f1)
[0000.150] I> Task: Alias fuses (0x5001095d)
[0000.155] W> FUSE_ALIAS: Fuse alias on production fused part is not supported.
[0000.162] I> Task: Print SKU type (0x5000f5f1)
[0000.166] I> FUSE_OPT_CCPLEX_CLUSTER_DISABLE = 0x00000000
[0000.171] I> FUSE_OPT_GPC_DISABLE = 0x00000000
[0000.176] I> FUSE_OPT_TPC_DISABLE = 0x00000000
[0000.180] I> FUSE_OPT_DLA_DISABLE = 0x00000000
[0000.184] I> FUSE_OPT_PVA_DISABLE = 0x00000000
[0000.189] I> FUSE_OPT_NVENC_DISABLE = 0x00000000
[0000.193] I> FUSE_OPT_NVDEC_DISABLE = 0x00000000
[0000.197] I> FUSE_OPT_FSI_DISABLE = 0x00000000
[0000.202] I> FUSE_OPT_EMC_DISABLE = 0x00000000
[0000.206] I> FUSE_BOOTROM_PATCH_VERSION = 0x7
[0000.210] I> FUSE_PSCROM_PATCH_VERSION = 0x7
[0000.214] I> FUSE_OPT_ADC_CAL_FUSE_REV = 0x2
[0000.218] I> FUSE_SKU_INFO_0 = 0xd0
[0000.222] I> FUSE_OPT_SAMPLE_TYPE_0 = 0x3 PS
[0000.226] I> FUSE_PACKAGE_INFO_0 = 0x2
[0000.229] I> SKU: Prod
[0000.232] I> Task: Boost clocks (0x500148a1)
[0000.236] I> Initializing PLLC2 for AXI_CBB.
[0000.240] I> AXI_CBB : src = 35, divisor = 0
[0000.244] I> Task: Voltage monitor (0x50014b49)
[0000.248] I> VMON: Vmon re-calibration and fine tuning done
[0000.254] I> Task: UPHY init (0x5000d065)
[0000.260] I> HSIO UPHY init done
[0000.263] E> Skipping GBE UPHY config
[0000.266] I> Task: Boot device init (0x50000be9)
[0000.271] I> Boot_device: QSPI_FLASH instance: 0
[0000.275] I> Qspi clock source : pllc_out0
[0000.279] I> QSPI Flash: Macronix 64MB
[0000.283] I> QSPI-0l initialized successfully
[0000.287] I> Task: TSC init (0x50020a4d)
[0000.291] I> Task: Load membct (0x50011fe9)
[0000.295] I> RAM_CODE 0x4000401
[0000.298] I> Loading MEMBCT
[0000.301] I> Slot: 0
[0000.303] I> Binary[0] block-0 (partition size: 0x40000)
[0000.308] I>  get_binary_info: Binary name: MEM-BCT-0
[0000.313] I> Size of crypto header is 8192
[0000.317] I> BCH load address is : 0x40050000
[0000.321] I> Size of crypto header is 8192
[0000.325] I> BCH of MEM-BCT-0 read from storage
[0000.330] I> BCH address is : 0x40050000
[0000.334] I> MEM-BCT-0 header integrity check is success
[0000.339] I> Binary magic in BCH component 0 is MEM0
[0000.344] I> component binary type is 0
[0000.348] I> MEM-BCT-0 binary is read from storage
[0000.353] I> MEM-BCT-0 binary integrity check is success
[0000.358] I> Binary MEM-BCT-0 loaded successfully at 0x40040000 (0xe580)
[0000.365] I> RAM_CODE 0x4000401
[0000.370] I> RAM_CODE 0x4000401
[0000.374] I> Task: Load Page retirement list (0x500115b1)
[0000.379] I> Task: SDRAM params override (0x50011fc5)
[0000.384] I> Task: Save mem-bct info (0x50014fa1)
[0000.388] I> Task: Carveout allocate (0x50015005)
[0000.393] I> RCM blob carveout will not be allocated
[0000.398] I> ECC region[0]: Start:0x0, End:0x0
[0000.402] I> ECC region[1]: Start:0x0, End:0x0
[0000.406] I> ECC region[2]: Start:0x0, End:0x0
[0000.411] I> ECC region[3]: Start:0x0, End:0x0
[0000.415] I> ECC region[4]: Start:0x0, End:0x0
[0000.419] I> Non-ECC region[0]: Start:0x80000000, End:0x880000000
[0000.425] I> Non-ECC region[1]: Start:0x0, End:0x0
[0000.430] I> Non-ECC region[2]: Start:0x0, End:0x0
[0000.434] I> Non-ECC region[3]: Start:0x0, End:0x0
[0000.439] I> Non-ECC region[4]: Start:0x0, End:0x0
[0000.449] I> allocated(CO:44) base:0x849800000 size:0x36800000 align: 0x100000
[0000.456] I> allocated(CO:31) base:0x840000000 size:0x8000000 align: 0x8000000
[0000.463] I> allocated(CO:43) base:0x83c000000 size:0x4000000 align: 0x200000
[0000.470] I> allocated(CO:20) base:0x83a000000 size:0x2000000 align: 0x2000000
[0000.477] I> allocated(CO:24) base:0x838000000 size:0x2000000 align: 0x2000000
[0000.484] I> allocated(CO:28) base:0x836000000 size:0x2000000 align: 0x2000000
[0000.491] I> allocated(CO:29) base:0x834000000 size:0x2000000 align: 0x2000000
[0000.498] I> allocated(CO:22) base:0x848000000 size:0x1000000 align: 0x1000000
[0000.505] I> allocated(CO:41) base:0x833000000 size:0x1000000 align: 0x100000
[0000.512] I> allocated(CO:35) base:0x832200000 size:0xe00000 align: 0x10000
[0000.519] I> allocated(CO:02) base:0x849000000 size:0x800000 align: 0x800000
[0000.526] I> allocated(CO:03) base:0x831800000 size:0x800000 align: 0x800000
[0000.533] I> allocated(CO:06) base:0x831000000 size:0x800000 align: 0x800000
[0000.540] I> allocated(CO:10) base:0x830800000 size:0x800000 align: 0x800000
[0000.547] I> allocated(CO:56) base:0x830000000 size:0x800000 align: 0x200000
[0000.554] I> allocated(CO:07) base:0x82fc00000 size:0x400000 align: 0x400000
[0000.561] I> allocated(CO:33) base:0x82f800000 size:0x400000 align: 0x200000
[0000.568] I> allocated(CO:23) base:0x832000000 size:0x200000 align: 0x200000
[0000.575] I> allocated(CO:01) base:0x82f700000 size:0x100000 align: 0x100000
[0000.582] I> allocated(CO:04) base:0x82f600000 size:0x100000 align: 0x100000
[0000.588] I> allocated(CO:05) base:0x82f500000 size:0x100000 align: 0x100000
[0000.595] I> allocated(CO:08) base:0x82f400000 size:0x100000 align: 0x100000
[0000.602] I> allocated(CO:09) base:0x82f300000 size:0x100000 align: 0x100000
[0000.609] I> allocated(CO:15) base:0x82f200000 size:0x100000 align: 0x100000
[0000.616] I> allocated(CO:17) base:0x82f100000 size:0x100000 align: 0x100000
[0000.623] I> allocated(CO:27) base:0x82f000000 size:0x100000 align: 0x100000
[0000.630] I> allocated(CO:42) base:0x82ef00000 size:0x100000 align: 0x100000
[0000.637] I> allocated(CO:54) base:0x82ee80000 size:0x80000 align: 0x80000
[0000.644] I> allocated(CO:34) base:0x82ee70000 size:0x10000 align: 0x10000
[0000.650] I> allocated(CO:47) base:0x82ea00000 size:0x400000 align: 0x200000
[0000.657] I> allocated(CO:72) base:0x82e800000 size:0x200000 align: 0x10000
[0000.664] I> allocated(CO:48) base:0x82ee50000 size:0x20000 align: 0x10000
[0000.671] I> allocated(CO:69) base:0x82ee30000 size:0x20000 align: 0x10000
[0000.678] I> allocated(CO:49) base:0x82ee20000 size:0x10000 align: 0x10000
[0000.684] I> allocated(CO:50) base:0x82ee10000 size:0x10000 align: 0x10000
[0000.691] I> allocated(CO:52) base:0x82ee00000 size:0x10000 align: 0x10000
[0000.698] I> NSDRAM base: 0x80000000, end: 0x82ee70000
[0000.703] I> Task: Thermal check (0x50021d55)
[0000.707] I> max_chip_limit = 105
[0000.710] I> min_chip_limit = -28
[0000.713] I> max temp read = 34
[0000.716] I> min temp read = 33
[0000.719] I> Task: Update FSI SCR with thermal fuse data (0x50021e61)
[0000.726] I> Task: Enable WDT 5th expiry (0x50021a41)
[0000.731] I> Task: I2C register (0x50000b85)
[0000.735] I> Task: Reset FSI (0x500148b1)
[0000.739] I> Task: Pinmux init (0x5001397d)
[0000.743] I> Task: Prod config init (0x50013ddd)
[0000.748] I> Task: Pad voltage init (0x50013a2d)
[0000.752] I> Task: Prod init (0x50013e21)
[0000.756] I> Task: Common rail init (0x50014575)
[0000.760] I> DONE: Thermal config
[0000.764] W> DEVICE_PROD: module = 13, instance = 4 not found in device prod.
[0000.772] I> DONE: SOC rail config
[0000.776] W> PMIC_CONFIG: Rail: MEMIO rail config not found in MB1 BCT.
[0000.782] I> DONE: MEMIO rail config
[0000.785] I> DONE: GPU rail info
[0000.789] I> DONE: CV rail info
[0000.792] I> Task: Mem clock src (0x50011de9)
[0000.796] I> Task: Misc. board config (0x5001461d)
[0000.801] W> PMIC_CONFIG: Platform config not found in MB1 BCT.
[0000.807] I> Task: SDRAM init (0x50011ded)
[0000.811] I> SDRAM-params @ 0xd485000
[0000.814] I> MemoryType: 4 MemBctRevision: 9
[0000.821] I> MSS code-drop: NvBootSdramInit
[0000.825] I> MSS CAR: PLLM/HUB programming for MemoryType: 4 and MemBctRevision: 9
[0000.832] I> MSS CAR: PLLM/HUB programming for MemoryType: 4 and MemBctRevision: 9
[0000.840] I> MSS CAR: Init PLLM
[0000.843] I> MSS CAR: Init PLLHUB
[0000.848] I> Encryption:   MTS: en, TX: en, VPR: en, GSC: en
[0000.859] I> mb1_sdram_init Done !
[0000.863] I> SDRAM Size in Total 0x800000000
[0000.867] I> Task: Dram Ecc scrub (0x500116f5)
[0000.871] I> Task: DRAM alias check (0x50011fbd)
[0000.903] I> Task: Program NSDRAM carveout (0x50015961)
[0000.910] I> NSDRAM carveout encryption is enabled
[0000.915] I> Program NSDRAM carveout
[0000.919] I> Task: Register checker (0x50011fc1)
[0000.927] I> Task: Enable clock-mon (0x50020a35)
[0000.944] I> FMON: Fmon re-programming done
[0000.948] I> Task: Mapper init (0x5001ef4d)
[0000.953] I> Task: SC7 Context Init (0x50020d3d)
[0000.959] I> Task: CCPLEX IST init (0x5000c925)
[0000.965] I> Task: CPU WP0 (0x5000bb15)
[0000.970] I> Loading MCE
[0000.973] I> Slot: 0
[0000.975] I> Binary[8] block-0 (partition size: 0x80000)
[0000.981] I>  get_binary_info: Binary name: MCE
[0000.986] I> Size of crypto header is 8192
[0000.990] I> BCH load address is : 0x4003e000
[0000.996] I> Size of crypto header is 8192
[0001.001] I> BCH of MCE read from storage
[0001.005] I> BCH address is : 0x4003e000
[0001.010] I> MCE header integrity check is success
[0001.015] I> Binary magic in BCH component 0 is MTSM
[0001.020] I> component binary type is 8
[0001.025] I> Size of crypto header is 8192
[0001.031] I> MCE binary is read from storage
[0001.036] I> MCE binary integrity check is success
[0001.042] I> Binary MCE loaded successfully at 0x40000000 (0x2c880)
[0001.049] I> Size of crypto header is 8192
[0001.063] I> Size of crypto header is 8192
[0001.068] I> Sending WP0 mailbox command to PSC
[0001.079] I> Task: XUSB Powergate (0x50000b91)
[0001.084] I> Skipping powergate XUSB.
[0001.088] I> Task: MB1 fixed firewalls (0x5002006d)
[0001.099] W> Firewall readback mismatch
[0001.103] W> Firewall readback mismatch
[0001.112] W> Firewall readback mismatch
[0001.122] I> Task: Load bpmp-fw (0x500203c9)
[0001.128] I> Slot: 0
[0001.130] I> Binary[15] block-0 (partition size: 0x180000)
[0001.136] I>  get_binary_info: Binary name: BPMP_FW
[0001.141] I> Size of crypto header is 8192
[0001.146] I> BCH load address is : 0x807fe000
[0001.151] I> Size of crypto header is 8192
[0001.156] I> BCH of BPMP_FW read from storage
[0001.161] I> BCH address is : 0x807fe000
[0001.166] I> BPMP_FW header integrity check is success
[0001.171] I> Binary magic in BCH component 0 is BPMF
[0001.177] I> component binary type is 15
[0001.181] I> Size of crypto header is 8192
[0001.196] I> BPMP_FW binary is read from storage
[0001.203] I> BPMP_FW binary integrity check is success
[0001.209] I> Binary BPMP_FW loaded successfully at 0x80000000 (0xfddc0)
[0001.217] I> Slot: 0
[0001.219] I> Binary[16] block-10000 (partition size: 0x400000)
[0001.226] I>  get_binary_info: Binary name: BPMP_FW_DTB
[0001.231] I> Size of crypto header is 8192
[0001.236] I> BCH load address is : 0x807fc000
[0001.241] I> Size of crypto header is 8192
[0001.246] I> BCH of BPMP_FW_DTB read from storage
[0001.251] I> BCH address is : 0x807fc000
[0001.256] I> BPMP_FW_DTB header integrity check is success
[0001.262] I> Binary magic in BCH component 0 is BPMD
[0001.268] I> component binary type is 16
[0001.272] I> Size of crypto header is 8192
[0001.278] I> BPMP_FW_DTB binary is read from storage
[0001.284] I> BPMP_FW_DTB binary integrity check is success
[0001.290] I> Binary BPMP_FW_DTB loaded successfully at 0x807db9f0 (0x20480)
[0001.298] I> Task: Load psc-fw (0x50020551)
[0001.304] I> Slot: 0
[0001.306] I> Binary[17] block-0 (partition size: 0xc0000)
[0001.312] I>  get_binary_info: Binary name: PSC_FW
[0001.318] I> Size of crypto header is 8192
[0001.322] I> BCH load address is : 0x80ffe000
[0001.327] I> Size of crypto header is 8192
[0001.332] I> BCH of PSC_FW read from storage
[0001.337] I> BCH address is : 0x80ffe000
[0001.342] I> PSC_FW header integrity check is success
[0001.347] I> Binary magic in BCH component 0 is PFWP
[0001.353] I> component binary type is 17
[0001.357] I> Size of crypto header is 8192
[0001.365] I> PSC_FW binary is read from storage
[0001.371] I> PSC_FW binary integrity check is success
[0001.377] I> Binary PSC_FW loaded successfully at 0x80000000 (0x59980)
[0001.385] I> Task: Load nvdec-fw (0x500205c5)
[0001.390] I> Slot: 0
[0001.393] I> Binary[7] block-0 (partition size: 0x100000)
[0001.399] I>  get_binary_info: Binary name: NVDEC
[0001.404] I> Size of crypto header is 8192
[0001.408] I> BCH load address is : 0x800fe000
[0001.414] I> Size of crypto header is 8192
[0001.419] I> BCH of NVDEC read from storage
[0001.423] I> BCH address is : 0x800fe000
[0001.428] I> NVDEC header integrity check is success
[0001.434] I> Binary magic in BCH component 0 is NDEC
[0001.439] I> component binary type is 7
[0001.443] I> Size of crypto header is 8192
[0001.451] I> NVDEC binary is read from storage
[0001.456] I> NVDEC binary integrity check is success
[0001.462] I> Binary NVDEC loaded successfully at 0x80000000 (0x46000)
[0001.469] I> Size of crypto header is 8192
[0001.487] I> Task: Load tsec-fw (0x5002097d)
[0001.493] I> TSEC-FW load support not enabled
[0001.497] I> Task: GPIO interrupt map (0x500147b5)
[0001.503] I> Task: SC7 context save (0x50020d79)
[0001.509] I> Slot: 0
[0001.511] I> Binary[27] block-0 (partition size: 0x100000)
[0001.518] I>  get_binary_info: Binary name: BR_BCT
[0001.523] I> Size of crypto header is 8192
[0001.527] I> Size of crypto header is 8192
[0001.532] I> BR_BCT binary is read from storage
[0001.537] I> BR_BCT binary integrity check is success
[0001.543] I> Binary BR_BCT loaded successfully at 0xa0000000 (0x2000)
[0001.550] I> Slot: 0
[0001.553] I> Binary[13] block-0 (partition size: 0x30000)
[0001.559] I>  get_binary_info: Binary name: SC7-FW
[0001.564] I> Size of crypto header is 8192
[0001.568] I> Size of crypto header is 8192
[0001.573] I> BCH load address is : 0xa0002000
[0001.578] I> Size of crypto header is 8192
[0001.583] I> BCH of SC7-FW read from storage
[0001.588] I> BCH address is : 0xa0002000
[0001.593] I> SC7-FW header integrity check is success
[0001.598] I> Binary magic in BCH component 0 is WB0B
[0001.604] I> component binary type is 13
[0001.608] I> Size of crypto header is 8192
[0001.614] I> SC7-FW binary is read from storage
[0001.620] I> SC7-FW binary integrity check is success
[0001.625] I> Binary SC7-FW loaded successfully at 0xa0004000 (0x26db0)
[0001.633] I> Slot: 0
[0001.635] I> Binary[22] block-0 (partition size: 0x30000)
[0001.641] I>  get_binary_info: Binary name: PSC_RF
[0001.647] I> Size of crypto header is 8192
[0001.651] I> Size of crypto header is 8192
[0001.656] I> BCH load address is : 0xa002adb0
[0001.661] I> Size of crypto header is 8192
[0001.666] I> BCH of PSC_RF read from storage
[0001.670] I> BCH address is : 0xa002adb0
[0001.676] I> PSC_RF header integrity check is success
[0001.681] I> Binary magic in BCH component 0 is PSCR
[0001.686] I> component binary type is 22
[0001.691] I> Size of crypto header is 8192
[0001.696] I> PSC_RF binary is read from storage
[0001.702] I> PSC_RF binary integrity check is success
[0001.707] I> Binary PSC_RF loaded successfully at 0xa002cdb0 (0x1b140)
[0001.730] I> Task: Save WP0 payload to SC7 ctx (0x50021725)
[0001.737] I> Task: Load MB2rf binary to SC7 ctx (0x500216b9)
[0001.744] I> Slot: 0
[0001.746] I> Binary[14] block-0 (partition size: 0x20000)
[0001.752] I>  get_binary_info: Binary name: MB2_RF
[0001.757] I> Size of crypto header is 8192
[0001.762] I> Size of crypto header is 8192
[0001.766] I> BCH load address is : 0xa00d6a48
[0001.771] I> Size of crypto header is 8192
[0001.776] I> BCH of MB2_RF read from storage
[0001.781] I> BCH address is : 0xa00d6a48
[0001.786] I> MB2_RF header integrity check is success
[0001.792] I> Binary magic in BCH component 0 is MB2R
[0001.797] I> component binary type is 14
[0001.801] I> Size of crypto header is 8192
[0001.807] I> MB2_RF binary is read from storage
[0001.812] I> MB2_RF binary integrity check is success
[0001.818] I> Binary MB2_RF loaded successfully at 0xa00d8a48 (0x1bfa0)
[0001.826] I> Task: Save Fuse-Bypass data to SC7 ctx (0x50021621)
[0001.833] W> FUSE_ALIAS: Fuse alias on production fused part is not supported.
[0001.841] I> SC7 context fuse-bypass data is empty
[0001.846] I> Task: Save PMIC data to SC7 ctx (0x5002144d)
[0001.853] I> Task: Save I2C bus freq data to SC7 ctx (0x500213d9)
[0001.860] I> Task: Save SOCTherm data to SC7 ctx (0x50021365)
[0001.866] I> Task: Save FMON data to SC7 ctx (0x500212f1)
[0001.873] I> Task: Save VMON data to SC7 ctx (0x50021279)
[0001.879] I> Task: Save TZDRAM data to SC7 ctx (0x5002178d)
[0001.886] I> Task: Save GPIO int data to SC7 ctx (0x50021561)
[0001.893] I> Task: Save clock data to SC7 ctx (0x50021205)
[0001.899] I> Task: Save debug data to SC7 ctx (0x50021191)
[0001.910] I> SC7 context save done
[0001.914] I> Task: Load MB2/Applet/FSKP (0x5000ca55)
[0001.920] I> Loading MB2
[0001.923] I> Slot: 0
[0001.925] I> Binary[6] block-0 (partition size: 0x80000)
[0001.931] I>  get_binary_info: Binary name: MB2
[0001.936] I> Size of crypto header is 8192
[0001.941] I> BCH load address is : 0x8007e000
[0001.946] I> Size of crypto header is 8192
[0001.951] I> BCH of MB2 read from storage
[0001.955] I> BCH address is : 0x8007e000
[0001.960] I> MB2 header integrity check is success
[0001.965] I> Binary magic in BCH component 0 is MB2B
[0001.971] I> component binary type is 6
[0001.975] I> Size of crypto header is 8192
[0001.984] I> MB2 binary is read from storage
[0001.990] I> MB2 binary integrity check is success
[0001.995] I> Binary MB2 loaded successfully at 0x80000000 (0x68ee0)
[0002.003] I> Task: Map CCPLEX SHARED carveout (0x5000cbf9)
[0002.010] I> Task: Prepare MB2 params (0x5000cca9)
[0002.016] I> BR-BCT Boot Chain Fields
[0002.020] I>    u32_non_gpio_select_boot_chain  : 0
[0002.025] I>    u32_num_boot_chains             : 2
[0002.030] I>    bf_bl_gpio_select_boot_chain_1b : 0
[0002.036] I> Task: Dram ecc test (0x50011791)
[0002.041] I> Task: Misc NV security settings (0x5000c529)
[0002.048] I> NVDEC sticky bits programming done
[0002.053] I> Successfully powergated NVDEC
[0002.057] I> Task: Disable/Reload WDT (0x50021a99)
[0002.063] I> Task: Program misc carveouts (0x50015381)
[0002.069] I> Program IPC carveouts
[0002.076] I> SLCG Global override status := 0x0
[0002.081] I> MB1: MSS reconfig completed
==========================================================================================
I> MB2 (version: 0.0.0.0-t234-54845784-9c429857)
I> t234-A01-0-Silicon (0x12347)
I> Boot-mode : Coldboot
I> Emulation:
I> Entry timestamp: 0x002064b4
I> Regular heap: [base:0x40040000, size:0x10000]
I> DMA heap: [base:0x830000000, size:0x800000]
I> Task: ARI update carveout TZDRAM (0x50001e80)
I> Task: Enable hot-plug capability (0x50026c6c)
I> Task: PSC mailbox init (0x50016a7c)
I> Task: Crypto init (0x500065a8)
I> Task: Enable GP-SE clock (0x50001fe4)
I> Task: DICE Identity init (0x50019e50)
I> DICE is not enabled.
I> Task: OEM SC7 context save init (0x50019550)
I> Task: I2C register (0x50001e44)
I> Task: Map CCPLEX_INTERWORLD_SHMEM carveout (0x50001e2c)
I> Task: Program CBB PCIE AMAP regions (0x50019b64)
I> Task: Boot device init (0x50001d74)
I> Boot_device: QSPI_FLASH instance: 0
I> Qspi clock source : pllc_out0
I> QSPI-0l initialized successfully
I> Task: Partition Manager Init (0x50001d70)
I> Found 57 partitions in QSPI_FLASH (instance 0)
W> Cannot find any partition table for 00000003
 > PARTITION_MANAGER: Failed to publish partition.
I> Found 14 partitions in SDMMC_USER (instance 3)
I> Task: Load and authenticate registered FWs (0x5001ce48)
I> Task: Load AUXP FWs (0x5002680c)
I> Successfully register SPE FW load task with MB2 loader
I> Skipping SCE FW load
I> Successfully register RCE FW load task with MB2 loader
I> Successfully register DCE FW load task with MB2 loader
I> Unpowergating APE
I> Unpowergate done
I> Successfully register APE FW load task with MB2 loader
I> Skipping FSI FW load
I> Successfully register XUSB FW load task with MB2 loader
I> Partition name: A_spe-fw
I> Size of partition: 589824
I> Binary@ device:3/0 block-55040 (partition size: 0x90000), name: A_spe-fw
I> Partition name: A_rce-fw
I> Size of partition: 1048576
I> Binary@ device:3/0 block-56192 (partition size: 0x100000), name: A_rce-fw
I> spe: Authentication Finalize Done
I> Binary spe loaded successfully at 0x82f400000
I> Partition name: A_dce-fw
I> Size of partition: 5242880
I> Binary@ device:3/0 block-44800 (partition size: 0x500000), name: A_dce-fw
I> rce: Authentication Finalize Done
I> Binary rce loaded successfully at 0x82f100000
I> dce : oem authentication of header done
I> dce : meta-blob integrity check is success.
I> dce : will be decompressed at 0x83a000000
I> version 1 Bin 1 BCheckSum 0 content_size 0 Content ChkSum 1 reserved_00  0
I> Reserved10 0 BlockMaxSize 5 Reserved11 0
I> dce : decompressed to 9509936 bytes
I> dce: plain binary integrity check is success
I> Partition name: A_adsp-fw
I> Size of partition: 2097152
I> Binary@ device:3/0 block-58240 (partition size: 0x200000), name: A_adsp-fw
I> dce: Authentication Finalize Done
I> Binary dce loaded successfully at 0x83a000000
I> Partition name: A_xusb-fw
I> Size of partition: 262144
I> Binary@ device:3/0 block-9472 (partition size: 0x40000), name: A_xusb-fw
I> ape: Authentication Finalize Done
I> Binary ape loaded successfully at 0x82fc00000
I> xusb: Authentication Finalize Done
I> Binary xusb loaded successfully at 0x82f500000
I> Task: Carveout setup (0x5001f55c)
I> Program remaining OEM carveouts
I> Task: Enable FSITHERM (0x50016950)
I> Task: Enable FSI VMON (0x500164d8)
E> FSI VMON: FUSE_OPT_ADC_CAL_FSI not programmed
I> Task: Validate FSI Therm readings (0x50016530)
I> FSITHERM max temp = 34
I> FSITHERM min temp = 33
I> Task: Restore XUSB sec (0x50001d44)
I> Task: Enable FSI SE clock (0x50016ed8)
I> Enable FSI-SE clock and 10ms delay...
I> Task: Initialize SBSA UART CAR (0x50001f48)
I> Task: Ratchet update (0x50027d08)
W> OPTIN fuse not set, skip ratchet update
I> Task: Initialize CPUBL Params (0x50017e0c)
I> CPUBL-params @ 0x836000000
I> Task: Prepare eeprom data (0x50017bd8)
I> Task: FSI padctl context save (0x500196e0)
I> Task: Unpowergate APE (0x50017640)
W> mb2_unpowergate_ape: skip! APE is in unpowergated state
I> Task: OEM firewalls (0x5002397c)
I> OEM firewalls configured
I> Task: Powergate APE (0x500177b4)
I> Powergating APE
I> Powergate done
I> Task: OEM firewall restore saved settings (0x50023dd0)
I> Task: Unhalt AUXPs (0x50026a74)
I> Unhalting SPE..
I> Enabling combined UART
?跴pe: early_init
vic initialized
tsc initialized
aon lic initialized
spe: tag is 243b265b351d6bb9cc7b2e3acc5d90f8
spe: SafeRTOS v8.4
spe: init
scheduler initialized
aon hsp initialized
tag initialized
tcu initialized
bpmp ipc initialized
spe: late init
cpu_nic clock initialized
apb clock initialized
pm initialized
bpmp hsp initialized
top1 hsp initialized
ccplex ipc initialized
spe: start scheduler
?
  I> Task: Trigger mailbox for PSC-BL1 exit (0x50016afc)
I> Sending opcode 0x4d420802 to psc
艐NFO: Entering psc_monitor_init!
INFO: GSC22 BOM:0x848002000 SIZE:0x1000000 CLIENT_ACCESS1:00180000
INFO: PSCFW BUILD VERSION: 8a33b23-73b589c-8a15f76-rel-t234
INFO: mstatus:0xa00000808
INFO: Supervisor entry_point:c108c00
嘌> Received ACK from psc
I> Tas艐NFO: MONITOR: user task addr:0x848022000, blob offset:0x00020000
INFO: MONITOR: populated user images:13
INFO: mret to Supervisor!
INFO: psc supervisor init.
INFO: psc_irq_init...
INFO: enter idl?
                 bpmp: socket 0
bpmp: base binary md5 is 1377b684fe55be78e1d7fc3e0f143b55
bpmp: combined binary md5 is 463f4d5b75234b74bb7蔒 task.
殞05b524d2a015
bpmp: firmware tag is 463f4d5b75234b74bb7f-1377b684fe5
initialized vwdt
initialized mail_early
initialized fuse
initialized vfrel
initialized hwwdt
initialized adc
fmon_populate_monitors: found 199 monitors
initialized fmon
initialized mc
initialized reset
initialized uphy_early
initialized emc_early
471 clocks registered
initialized clk_mach
initialized clk_cal_early
initialized clk_mach_early_config
initialized io_dpd
initialized soctherm
initialized tj_init
initialized regime
initialized i2c
vrmon_dt_init: vrmon node not found
vrmon_chk_boot_state: found 0 rail monitors
initialized vrmon
initialized regulator
嫜: Start secure NOR provision (0x5001997c)
I> Task: Load FSI keyblob (0x50016f20)
I> Skipping FSI key blob copy
I> Task: Unhalt毃nitialized avfs_clk_platform
initialized powergate
?AUXPs (0x50026a7c)
I> SCE unhalt skipped
I> Unhalting RCE
I> RCE unhalt successful
I> DCE un毃nitialized dvs
initialized clk_mach_config
initialized pm
suspend progress: 0x0
initialized suspend
initialized strap
initialized mce_dbell
嬂     2.545214] Camera-FW on t234-rce-safe started
TCU early console enabled.
墏alt successful
I> APE unhalt skipped
I> FSI unhalt skipped
I> Task: Load CPUBL (0x50017f04)
I> Task: Load TOS (0x50018608)
I> Task: Load and authenticate registered FWs (0x5001ce48)
I> Partition name: A_cpu-bootloader
I> Size of partition: 3670016
I> Binary@ device:3/0 block-24832 (partition size: 0x380000), name: A_cpu-bootloader
?
  毃nitialized emc
initialized emc_mrq
initialized clk_cal
initialized uphy_dt
initialized uphy_mrq
HSIO UPHY reset has been de-asserted 0x0
initialized uphy
initialized pg_late
initialized pg_mrq_init
swdtimer_init: 0 reg polling start w period 47 ms
initialized swdtimer
initialized hwwdt_late
initialized bwmgr
initialized thermal_host_trip
initialized thermal_mrq
initialized oc_mrq
initialized reset_mrq
initialized mail_mrq
initialized fmon_mrq
initialized clk_mrq
initialized avfs_mrq
initialized i2c_mrq
initialized tag_mrq
initialized bwmgr_mrq
initialized console_mrq
嘌> Partition name: A_secure-os
I> Size of partition: 4194304
滵issing prod DT calibration data for 199 fmons
initialized clk_sync_fmon_post
嘌> Binary@ device:3/0 block-32000 (partition size: 0x400000), name: A_secure-os
I> MB2-params @ 0x40060000
I> cpubl: Authentication Finalize Done
I> Binary cpubl loaded successfully at 0x82ea00000
毃nitialized clk_cal_late
initialized noc_late
initialized cvc
嘌> tos: Authentication Finalize Done
I> Binary tos l毃nitialized avfs_clk_mach_post
initialized avfs_clk_platform_post
initialized cvc_late
initialized rm
initialized console_late
handling unreferenced clks
enable can1_core
enable can1_host
enable can2_core
enable can2_host
enable pwm3
enable mss_encrypt
enable maud
enable pllg_ref
enable dsi_core
enable aza_2xbit
enable pllc4_muxed
enable xusb_ss
enable xusb_fs
enable xusb_falcon
enable xusb_core_mux
enable dsi_lp
enable sdmmc_legacy_tm
initialized clk_mach_post
initialized pg_post
initialized reg嬂     2.717871] Camera-FW on t234-rce-safe ready SHA1=97e50cbf (crt 12.948 ms,漉lator_post
initialized profile
initialized fuse_late
initialized mrq
initialized patrol_scrubber
initialized cactmon
initialized extras_post
bpmp: ini?total boot 186.665 ms)
漮 complete
嫪aded successfully at 0x83fdfe000
I> Relocating OP-TEE dtb from: 0x83feff770 to 0x82ee30000, size: 0x1976
I> [0] START: 0x80000000, SIZE: 0x7aee70000
I> [1] START: 0x836000000, SIZE: 0x2000000
I> Setting NS memory ranges to OP-TEE dtb finished.
I> Partition name: A_eks
I> Size of partition: 262144
I> Binary@ device:3/0 block-44288 (partition size: 0x40000), name: A_eks
I> eks: Authentication Finalize Done
I> Binary eks loaded successfully at 0x830000400
I> EKB detected (length: 0x410) @ VA:0x830000400
I> Task: Prepare TOS params (0x50018580)
I> Setting EKB blob info to OPTEE dtb finished.
I> Setting OPTEE arg3: 0x82ee30000
I> Task: OEM SC7 context save (0x500197dc)
I> OEM sc7 context saved
I> Task: Disable MSS perf stats (0x50026b08)
I> Task: Program display sticky bits (0x50026a84)
I> Task: Storage device deinit (0x50001eec)
I> Task: SMMU external bypass disable (0x50016a60)
I> Task: SMMU init (0x5001697c)
I> Task: Program GICv3 registers (0x50026ba8)
I> Task: Audit firewall settings (0x50023bd0)
I> Task: Bootchain failure check (0x50002434)
I> Current Boot-Chain Slot: 0
I> BR-BCT Boot-Chain is 0, and status is 1. Set UPDATE_BRBCT bit to 0
I> MB2 finished

誏OTICE:  BL31: v2.6(release):07eea4970
NOTICE:  BL31: Built : 07:55:15, Mar 19 2023
I/TC:
踜CE: FW Boot Done
觨/TC: Non-secure external DT found
I/TC: OP-TEE version: 3.19 (gcc version 9.3.0 (Buildroot 2020.08)) #2 Sun Mar 19 15:02:44 UTC 2023 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html
I/TC: Primary CPU initializing
I/TC: WARNING: Test OEM keys are being used!
I/TC: This is only for TZ-SE testing and should NOT be used for a shipping product!
I/TC: Primary CPU switching to normal world boot
?
==========================================================================================
  Jetson UEFI firmware (version 3.1-32827747 built on 2023-03-19T14:56:32+00:00)







































































































































































































































Jetson UEFI firmware (version 3.1-32827747 built on 2023-03-19T14:56:32+00:00)
ESC   to enter Setup.
F11   to enter Boot Manager Menu.
Enter to continue boot.

When I enable full UEFI log I see the firmware load lots of driver (about 170) in this phase.

  • Can this part be optimized? such us skip or reduce the amount of drivers being loaded.

Another issue is:
I followed the instructions on Build · NVIDIA/edk2-nvidia Wiki · GitHub to build UEFI last week, I use source on main branch.

edkrepo clone nvidia-uefi NVIDIA-Jetson main

It worked normally, but since this Monday (5/8), I clone source from main and build again, I get error messages.

I do same instructions to r35.3.1 branch and it works fine.

Hi ts01399984,

For boot time optimization, you could refer to the following instruction.
Boot Time Optimization — Jetson Linux Developer Guide documentation (nvidia.com)
Or you could also refer to the FAQ in the following topic to remove 5s boot delay of UEFI:
Jetson AGX Orin FAQ - Jetson & Embedded Systems / Jetson AGX Orin - NVIDIA Developer Forums

Sorry, as you could see the UEFI logs, there’re many boot up stuffs should be done in UEFI.

You could just use r35.3.1 branch in your case.

Hi Kevin,

Thanks for reply.

I have tried to remove 5s boot delay by setting value to 0 of this line in NVIDIA.common.dsc.inc:

gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|0

But it seems not working, UEFI still wait for 5s before continue.

Jetson UEFI firmware (version r35.3.1-ad78b07-dirty built on 2023-05-11T06:40:55
+00:00)
ESC   to enter Setup.
F11   to enter Boot Manager Menu.
Enter to continue boot.
**  WARNING: Test Key is used.  **
...... => Here will wait 5 seconds
      L4TLauncher: Attempting Direct Boot
EFI stub: Booting Linux Kernel...
EFI stub: Using DTB from configuration table

I use this command to flash UEFI only:

sudo ./flash.sh -r -k A_cpu-bootloader jetson-agx-orin-devkit mmcblk0p1

Do you rebuild the uefi binary and replace Linux_for_Tegra/bootloader/uefi_jetson.bin with the uefi_Jetson_RELEASE.bin you build?

Or you could try to flash the whole board.

Yes, I have replaced the one in bootloader.

Flash whole board will work, but I want to save some time when debugging UEFI and I found this post:

I have read Boot Time Optimization — Jetson Linux Developer Guide documentation (nvidia.com) . It talks little about UEFI part.

I found that modules loaded during UEFI are defined in Jetson.fdf and files it included.

Can I remove some modules (such as network) which won’t be used?
Or is there any place I can configure UEFI not to load modules I don’t need?

The previous command you use should work, you could check current slot in use by the following command.

$sudo nvbootctrl -t rootfs dump-slots-info

Where do you see this and its usage?

I think you could remove the module what you don’t need to use.

After build UEFI, it will generate uefi_jetson_DEBUG/RELEASE.bin, DEBUG will print debug message.
This command can switch between these version successfully.

but 5s delay didn’t update by flashing UEFI only.

I found this in UEFI source: edk2-nvidia/Platform/NVIDIA/Jetson/Jetson.fdf

From UEFI message it shows that firmware loads modules list in it and files it include, most of them defined in NVIDIA.fvmain.fdf.inc

Jetson.fdf:

#
#  Copyright (c) 2018-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
#  Copyright (c) 2013-2018, ARM Limited. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent


################################################################################
#
# FV Section
#
# [FV] section is used to define what components or modules are placed within a flash
# device file.  This section also defines order the components and modules are positioned
# within the image.  The [FV] section consists of define statements, set statements and
# module statements.
#
################################################################################

[FV.FvMain]
FvAlignment        = 8
ERASE_POLARITY     = 1
MEMORY_MAPPED      = TRUE
STICKY_WRITE       = TRUE
LOCK_CAP           = TRUE
LOCK_STATUS        = TRUE
WRITE_DISABLED_CAP = TRUE
WRITE_ENABLED_CAP  = TRUE
WRITE_STATUS       = TRUE
WRITE_LOCK_CAP     = TRUE
WRITE_LOCK_STATUS  = TRUE
READ_DISABLED_CAP  = TRUE
READ_ENABLED_CAP   = TRUE
READ_STATUS        = TRUE
READ_LOCK_CAP      = TRUE
READ_LOCK_STATUS   = TRUE
FvNameGuid         = 49a79a15-8f69-4be7-a30c-a172f44abce7

  APRIORI DXE {
    INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
    INF Silicon/NVIDIA/Drivers/TegraPlatformInit/TegraPlatformInitDxe.inf
    INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
    INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
    INF MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf
    INF MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf
    INF MdeModulePkg/Bus/Pci/UfsPciHcDxe/UfsPciHcDxe.inf
    INF MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.inf
    INF MdeModulePkg/Bus/Sd/SdDxe/SdDxe.inf
    INF MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruDxe.inf
    INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
    INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
    INF MdeModulePkg/Bus/I2c/I2cDxe/I2cDxe.inf
    INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
    INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
    INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
    INF FatPkg/EnhancedFatDxe/Fat.inf
    }

!include Platform/NVIDIA/NVIDIA.fvmain.fdf.inc
!include Platform/NVIDIA/Jetson/Jetson.fdf.inc
!include Platform/NVIDIA/NVIDIA.common.fdf.inc

NVIDIA.fvmain.fdf.inc:

#
#  Copyright (c) 2018-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
#  Copyright (c) 2013-2018, ARM Limited. All rights reserved.
#
#  SPDX-License-Identifier: BSD-2-Clause-Patent

 INF MdeModulePkg/Core/Dxe/DxeMain.inf
 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf

 #
 # Firmware Performance Data Table (FPDT)
 #
 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf

 #
 # PI DXE Drivers producing Architectural Protocols (EFI Services)
 #
 INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
 INF MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf
 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
 INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
 INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
 INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
 INF Silicon/NVIDIA/Drivers/DefaultVariableDxe/DefaultVariableDxe.inf
 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
 INF MdeModulePkg/Universal/TimestampDxe/TimestampDxe.inf
 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf

 #
 # Esrt - EFI System Resource Table
 #
 INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf

 #
 # Fmp
 #
 INF FILE_GUID = $(SYSTEM_FMP_ESRT_GUID) FmpDevicePkg/FmpDxe/FmpDxe.inf

 #
 # Device discovery protocol
 #
 INF Silicon/NVIDIA/Drivers/DeviceDiscovery/DeviceDiscoveryDxe.inf

 #
 # Aml Generation
 #
 INF Silicon/NVIDIA/Drivers/AmlGenerationDxe/AmlGenerationDxe.inf

 #
 # Aml Patching
 #
 INF Silicon/NVIDIA/Drivers/AmlPatchDxe/AmlPatchDxe.inf

 #
 # ACPI Support
 #
 INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
 #INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf

 #
 # Configuration Manager
 #
 INF Silicon/NVIDIA/Drivers/ConfigurationManager/ConfigurationManagerDxe.inf

 #
 # Dynamic Tables support
 #
 !include DynamicTablesPkg/DynamicTables.fdf.inc

 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf

 #
 # HTTP Boot support
 #
 INF MdeModulePkg/Universal/Disk/RamDiskDxe/RamDiskDxe.inf

 #
 # Multiple Console IO support
 #
 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
 INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf

 #
 # I2C Support
 #
 INF MdeModulePkg/Bus/I2c/I2cDxe/I2cDxe.inf
 INF Silicon/NVIDIA/Drivers/TegraI2c/TegraI2cDxe.inf
 INF Silicon/NVIDIA/Drivers/I2cIoBmcSsifDxe/I2cIoBmcSsifDxe.inf
 INF Silicon/NVIDIA/Drivers/ArmSmbrStatusCodeDxe/ArmSmbrStatusCodeDxe.inf
 INF IpmiFeaturePkg/Frb/FrbDxe.inf

 #
 # Graphics console support
 #
 INF Silicon/NVIDIA/Drivers/Logo/LogoDxe.inf
 INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf

 INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
 INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf

 #
 # FAT filesystem + GPT/MBR partitioning
 #
 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
 INF FatPkg/EnhancedFatDxe/Fat.inf
 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
 INF MdeModulePkg/Universal/Disk/UdfDxe/UdfDxe.inf

 # FV FileSystem
 INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
 INF MdeModulePkg/Universal/SectionExtractionDxe/SectionExtractionDxe.inf

 #
 # Usb Support
 #
 INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
 INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
 INF MdeModulePkg/Bus/Usb/UsbMouseAbsolutePointerDxe/UsbMouseAbsolutePointerDxe.inf
 INF MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf
 INF Drivers/ASIX/Bus/Usb/UsbNetworking/Ax88772c/Ax88772c.inf

 #
 # PCI Support
 #
 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
 INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf

 #
 # SATA Controller
 #
 INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
 INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
 INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
 INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf

 #
 # NVMe boot devices
 #
 INF  MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf

 #
 # Networking stack
 #
 INF NetworkPkg/DpcDxe/DpcDxe.inf
 INF NetworkPkg/ArpDxe/ArpDxe.inf
 INF NetworkPkg/Dhcp4Dxe/Dhcp4Dxe.inf
 INF NetworkPkg/Ip4Dxe/Ip4Dxe.inf
 INF NetworkPkg/MnpDxe/MnpDxe.inf
 INF NetworkPkg/SnpDxe/SnpDxe.inf
 INF NetworkPkg/VlanConfigDxe/VlanConfigDxe.inf
 INF NetworkPkg/Mtftp4Dxe/Mtftp4Dxe.inf
 INF NetworkPkg/TcpDxe/TcpDxe.inf
 INF NetworkPkg/Udp4Dxe/Udp4Dxe.inf
 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf

 INF NetworkPkg/TlsDxe/TlsDxe.inf
 INF NetworkPkg/TlsAuthConfigDxe/TlsAuthConfigDxe.inf
 INF NetworkPkg/DnsDxe/DnsDxe.inf
 INF NetworkPkg/HttpDxe/HttpDxe.inf
 INF NetworkPkg/HttpUtilitiesDxe/HttpUtilitiesDxe.inf
 INF NetworkPkg/HttpBootDxe/HttpBootDxe.inf

 #
 # Shell dynamic commands
 #
 INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
 INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf

 #
 # UEFI applications
 #
 INF ShellPkg/Application/Shell/Shell.inf
 INF MdeModulePkg/Application/BootManagerMenuApp/BootManagerMenuApp.inf
 INF MdeModulePkg/Application/VariableInfo/VariableInfo.inf
 INF SecurityPkg/EnrollFromDefaultKeysApp/EnrollFromDefaultKeysApp.inf

 #
 # SMBIOS/DMI
 #
 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
 INF ArmPkg/Universal/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
 INF ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
 INF Silicon/NVIDIA/Drivers/SmbiosOemDxe/SmbiosMiscOemDxe/SmbiosMiscOemDxe.inf

 #
 # Bds
 #
 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
 INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
 INF RuleOverride = UI MdeModulePkg/Application/UiApp/UiApp.inf
 INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf

 #
 # EBC
 #
 INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf

 #
 # Test Applications
 #
 INF Silicon/NVIDIA/Application/StackCheck/StackCheck.inf

!if $(TARGET) != RELEASE
 INF Silicon/NVIDIA/Test/ShellTest/BootOrderTest/BootOrderTestUefiShell.inf
 INF Silicon/NVIDIA/Test/ShellTest/EfiGopTest/EfiGopTestUefiShell.inf
 INF Silicon/NVIDIA/Test/ShellTest/UefiMemMapTest/UefiMemMapTestUefiShell.inf
!endif

 #
 # Tegra Platform Boot Manager driver
 #
 INF Silicon/NVIDIA/Drivers/TegraPlatformBootManager/TegraPlatformBootManagerDxe.inf

 #
 # Tegra Platform Configuration
 #
 INF Silicon/NVIDIA/Drivers/TegraPlatformInit/TegraPlatformInitDxe.inf

 #
 # Custom HII Support
 #
 INF Silicon/NVIDIA/Drivers/NvidiaConfigDxe/NvidiaConfigDxe.inf

 #
 # Secure Boot Support
 #
 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf

 #
 # RCM Support
 #
 INF Silicon/NVIDIA/Drivers/RcmDxe/RcmDxe.inf

 #
 # Platform To Driver Configuration Support
 #
 INF Silicon/NVIDIA/Drivers/PlatformToDriverConfiguration/PlatformToDriverConfiguration.inf

 #
 # Logo Files
 #
 FILE FREEFORM = gNVIDIAPlatformLogoGuid {
   SECTION RAW = Silicon/NVIDIA/Assets/nvidiagray480.bmp
   SECTION RAW = Silicon/NVIDIA/Assets/nvidiagray720.bmp
   SECTION RAW = Silicon/NVIDIA/Assets/nvidiagray1080.bmp
 }


 #
 # Capsule Update Policy Protocol
 #
 INF Silicon/NVIDIA/Drivers/CapsuleUpdatePolicyDxe/CapsuleUpdatePolicyDxe.inf

 #
 # Tegra EEPROM Support
 #
 INF Silicon/NVIDIA/Drivers/EepromDxe/Eeprom.inf

 #
 # Third party drivers
 #
 INF Drivers/Realtek/Bus/Pcie/PcieNetworking/RtkUndiDxe.inf

 #
 # Tegra Pin Control support
 #
 INF Silicon/NVIDIA/Drivers/TegraPinControlDxe/TegraPinControlDxe.inf

 #
 # Boot Chain Protocol
 #
 INF Silicon/NVIDIA/Drivers/BootChainDxe/BootChainDxe.inf
 #
 # Ipmi Blob Transfer support
 #
 INF Silicon/NVIDIA/Drivers/IpmiBlobTransferDxe/IpmiBlobTransferDxe.inf
 INF Silicon/NVIDIA/Drivers/SmbiosBmcTransfer/SmbiosBmcTransfer.inf

 #
 # CPU Frequency support
 #
 INF Silicon/NVIDIA/Drivers/TegraCpuFreqDxe/TegraCpuFreqDxe.inf

I wonder if I can remove some of unused part?
Or is there any other files which can configure modules loaded during UEFI boot?

It should be included in this binary because your full flash also update this binary only.

This is configuration file, you could try to remove the items you don’t need. But I think most of them doesn’t improve too much for the boot time.

I tried, it just didn’t work.

Here is the build report, from report I can see that timeout value has been set to 0.
Jetson_DEBUG.report (3.0 MB)

But if I flash with this command, the debug message shows the timeout value is still 5.

sudo ./flash.sh -r -k A_cpu-bootloader jetson-agx-orin-devkit mmcblk0p1

Boot log:

Jetson UEFI firmware (version r35.3.1-ad78b07-dirty built on 2023-05-15T05:49:46
+00:00)
ESC   to enter Setup.
F11   to enter Boot Manager Menu.
Enter to continue boot.
**********************************
**  WARNING: Test Key is used.  **
**********************************
**  WARNING: Test Key is used.  **
[Bds]BdsWait ...Zzzzzzzzzzzz...
[Bds]BdsWait(5)..Zzzz...
.[Bds]BdsWait(4)..Zzzz...
.[Bds]BdsWait(3)..Zzzz...
.[Bds]BdsWait(2)..Zzzz...
.[Bds]BdsWait(1)..Zzzz...
..PROGRESS CODE: V03051007 I0
UpdatePcieControllersWithGpuDevice: failed to enumerate GPU device handles: Not Found
InstallFdt: Installing Kernel DTB
UpdateFdt: UpdateFdt
ReadBoardInfo
ApplyTegraDeviceTreeOverlay
Processing "L4T Configuration Settings" DTB overlay
Deleting fragment fragment@0
Processing "Jetson Concord (40Pin RT5658)" DTB overlay

I’ve verified this configuration could be applied with flashing the whole build because we erase the variable store so the compiled setting is used to initialize the variable.
Or you could configure it from boot menu.

Does it mean the delay variable is stored in different partition?

It should be, and only could be reset after flash the whole board.

@ts01399984 ,

did you tried to remove some dirvers in UEFI and it can help reducing UEFI boot time?

I also got this issue that UEFI took too long time to boot.