Orin NX pin 91(SPI0 SCK) and pin104(SPI1 MOSI) GPIO function out of control

hi when we use SPI0_SCK and SPI1_MOSI as GPIO output function. these two pins output 10Hz(50mS high and 50 mS low)signal. when setting the GPIO low, there is one 7.5uS pulse output. please help to solve.
the version info: Jetpack 6.0 L4T36.3.0
the schematic:


I have remove the R25 and R29 resistors.

the waveform of the GPIO output:

zoom out the output of a 7.5 uS pulse

the test sh shell:
while true
do
gpioset -m time -u 50000 /dev/gpiochip0 124=1
gpioset -m time -u 50000 /dev/gpiochip0 124=0
done
when I change the value 50mS to 25mS+75mS 40+60,5mS+5mS, the result are the same.
but when i enlarge the time value to 1S, it’s ok.

1S+1S to 75mS+75mS is OK。 60mS+60mS wrong

Hi legendflying,

Are you using the devkit or custom board for Orin NX?
Have you also verified with the latest JP6.2(r36.4.0)?

Sorry that I’m not clear about what do you mean here.
Do you mean the signal does not act as how you configure?

custom board.
I need one 10Hz signal output on Orin NX CPU module 91 &104 pin。 10Hz means 100mS time。I set the GPIO output 50mS high and 50mS low with the shell script. but when I measure the gpio signal with oscilloscope, there 's one redundant 7.5uS high pulse, I don’t need this. this pulse will lead the failure in EMC RE test.

It sounds like you want to generate 10Hz PWM signal with 50% duty cycle.
Have you tried using either PIN15/PIN32/PIN33 from 40-pins expansion header for this use case?

Yes,GPIO7/13 can. GPIO 14 for CPU fan. GPIO12 for M2M alert signal.
in my design, GPIO7 and 13 are used for other GPIO function.
For normal GPIO application, SPI0_SCK and SPI1_MOSI can output 50mS high and 50mS low signal.we haven’t other control method to solve this issue. We need your support.

Do you mean all of those 3 pins are occupied by other function?
I would suggest you switching the use case for the pins since controlling GPIO manually to get 10Hz signal may be not accurate.

Please also try to apply the patch from 40hdr - SPI1 gpio padctl register bit[10] effect by gpiod tools in JP6 - #20 by KevinFFF to check if it could help for your case.

copy that, we will re-compile the Image and check it.
if we swap the GPIO pin, we need re-design the schematic, and we have no time to do this.
I can change the GPIO(7/13) output PWM in new project.

Hi legendflying,

To clarify the issue, could you use other GPIO(rather than SPI0_SCK and SPI1_MOSI) to check if there’s similar unexpected 7.5us pulse?

How did you configure the pinmux for those pins before use?
Could you share the screenshot in your pinmux spreadsheet for furthercheck?

the result is same as before.



Which pin are you using now?

Could you share the steps how do you reproduce the issue?
(i.e. how do you control GPIO?)

Is the issue specific to the period <1s?

SH shell:
while true
do
gpioset -m time -u 5000 /dev/gpiochip0 133=1
gpioset -m time -u 95000 /dev/gpiochip0 133=0
done
the signal pictures was shown upper.

when the GPIO output correctly, the shell need be repaired as follows:
while true
do
gpioset -m time -u 1000000 /dev/gpiochip0 133=1
gpioset -m time -u 1000000 /dev/gpiochip0 133=0
done

Do you mean that it results unexpected 7.5us pulse?

And this one work as expected?

How do you configure this pin in pinmux?

Have you also tried using jetson-gpio/samples/simple_out.py at master · NVIDIA/jetson-gpio in Jetson.GPIO to control GPIO instead?

Do you mean that it results unexpected 7.5us pulse?
legend flying:Yes

Could you check this approach to clarify if the issue is specific to gpiod tool?

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