Orin receives the MIPI C-PHY signal output by serdes

[chenweiqian]

Hello teachers, I have a few questions on my side that I would like to ask teachers to help answer.
We output the video signal to Orin in MIPI C-PHY manner through MAX96712, but Orin does not work properly.

What we’re trying so far:

1. Configure the deserializer MAX96712 to query the MAX96712 CSI PLL status register with the CSI signal output by C-PHY; The oscilloscope detects the presence of data output.

2. Modification of the device tree:
   /hardware/nvidia/platform/t23x/common/kernel-dts/t234-common-modules/tegra234-camera-mux-16ch-gmsl.dtsi:
   All phy_mode = “DPHY” ->phy_mode = “CPHY” under this file

3. apply below patch:

diff --git a/drivers/media/platform/tegra/camera/nvcsi/csi5_fops.c b/drivers/media/platform/tegra/camera/nvcsi/csi5_fops.c
index 7a50ce354..5c8f6a5ff 100644
--- a/drivers/media/platform/tegra/camera/nvcsi/csi5_fops.c
+++ b/drivers/media/platform/tegra/camera/nvcsi/csi5_fops.c
@@ -217,7 +217,8 @@ static int csi5_stream_set_config(struct tegra_csi_channel *chan, u32 stream_id,
        struct CAPTURE_CONTROL_MSG msg;
        struct nvcsi_brick_config brick_config;
        struct nvcsi_cil_config cil_config;
-       bool is_cphy = (csi_lanes == 3);
+       u32 phy_mode = read_phy_mode_from_dt(chan);
+       bool is_cphy = (phy_mode == CSI_PHY_MODE_CPHY);
        dev_dbg(csi->dev, "%s: stream_id=%u, csi_port=%u\n",
                __func__, stream_id, csi_port);

Here’s what happens now:

1. Only the picture of the first frame can be displayed, and due to the reception timeout reset, resulting in a splash screen, see the attachment for the display situation

2. Serial port output display: reset once to display the screen.
   

3. The oscilloscope showed a continuous signal

we tried to increase the clock rate, but it didn’t help.

This is dmesg log:

[  394.953054] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 4194400
[  394.954862] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 20971616
[  394.980412] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 4194400
[  394.998334] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 20971616
[  395.008958] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 4194400
[  395.025842] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 20971616
[  395.043801] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 20971616
[  395.045156] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 131072
[  395.071293] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 20971616
[  395.089231] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 4194400

and this is trace log:

     kworker/4:0-3847    [004] ....   669.333389: rtcpu_vinotify_event: tstamp:21672660992 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:693524874144 data:0x379d580010000000
     kworker/4:0-3847    [004] ....   669.333391: rtcpu_vinotify_event: tstamp:21672661125 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:693524880832 data:0x0000000031000001
     kworker/4:0-3847    [004] ....   669.333392: rtcpu_vinotify_event: tstamp:21672661280 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:693524923008 data:0x379d550010000000
     kworker/4:0-3847    [004] ....   669.333392: rtcpu_vinotify_event: tstamp:21672661409 cch:0 vi:0 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:693524929792 data:0x0000000031000002
 vi-output, ar02-4395    [001] ....   669.561655: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1080 fmt 13
     kworker/4:0-3847    [004] ....   669.613397: rtcpu_vinotify_event: tstamp:21680774066 cch:2 vi:0 tag:VIFALC_TDSTATE channel:0x21 frame:0 vi_tstamp:693779757024 data:0x379d4c0010000000
     kworker/4:0-3847    [004] ....   669.613400: rtcpu_vinotify_event: tstamp:21680774201 cch:2 vi:0 tag:VIFALC_TDSTATE channel:0x21 frame:0 vi_tstamp:693779763744 data:0x0000000031000001
     kworker/4:0-3847    [004] ....   669.613401: rtcpu_vinotify_event: tstamp:21680774350 cch:2 vi:0 tag:VIFALC_TDSTATE channel:0x21 frame:0 vi_tstamp:693779800320 data:0x379d490010000000
     kworker/4:0-3847    [004] ....   669.613401: rtcpu_vinotify_event: tstamp:21680774480 cch:2 vi:0 tag:VIFALC_TDSTATE channel:0x21 frame:0 vi_tstamp:693779807104 data:0x0000000031000002
 vi-output, ar02-4394    [002] ....   669.817622: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1080 fmt 13
     kworker/4:0-3847    [004] ....   669.837390: rtcpu_vinotify_event: tstamp:21688887129 cch:1 vi:0 tag:VIFALC_TDSTATE channel:0x22 frame:0 vi_tstamp:694035720352 data:0x379d520010000000
     kworker/4:0-3847    [004] ....   669.837392: rtcpu_vinotify_event: tstamp:21688887269 cch:1 vi:0 tag:VIFALC_TDSTATE channel:0x22 frame:0 vi_tstamp:694035727040 data:0x0000000031000001
     kworker/4:0-3847    [004] ....   669.837392: rtcpu_vinotify_event: tstamp:21688887420 cch:1 vi:0 tag:VIFALC_TDSTATE channel:0x22 frame:0 vi_tstamp:694035763648 data:0x379d4f0010000000
     kworker/4:0-3847    [004] ....   669.837392: rtcpu_vinotify_event: tstamp:21688887549 cch:1 vi:0 tag:VIFALC_TDSTATE channel:0x22 frame:0 vi_tstamp:694035770432 data:0x0000000031000002
 vi-output, ar02-4392    [003] ....   670.073737: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1080 fmt 13:
     kworker/4:0-3847    [004] ....   670.117396: rtcpu_vinotify_event: tstamp:21696622567 cch:3 vi:0 tag:VIFALC_TDSTATE channel:0x20 frame:0 vi_tstamp:694291854496 data:0x379d460010000000
     kworker/4:0-3847    [004] ....   670.117399: rtcpu_vinotify_event: tstamp:21696622702 cch:3 vi:0 tag:VIFALC_TDSTATE channel:0x20 frame:0 vi_tstamp:694291861184 data:0x0000000031000001
     kworker/4:0-3847    [004] ....   670.117400: rtcpu_vinotify_event: tstamp:21696622854 cch:3 vi:0 tag:VIFALC_TDSTATE channel:0x20 frame:0 vi_tstamp:694291897760 data:0x379d430010000000
     kworker/4:0-3847    [004] ....   670.117400: rtcpu_vinotify_event: tstamp:21696622982 cch:3 vi:0 tag:VIFALC_TDSTATE channel:0x20 frame:0 vi_tstamp:694291904544 data:0x0000000031000002

What do these mean and how can we achieve video output?

[JerryChang]

hello chenweiqian,

several questions and debug tips.

1. may I confirm the Jetpack release version you’re using currently, is it the latest JP-5.1 release?
2. could you please check parameter related to PREAMBLE on the device tree side, you may tune cil_settletime; parameter for testing.
3. may I also know how many trios, and the data-rate (i.e. Gsps) you’re capturing. you may try reducing the data-rate for testing.

[chenweiqian]

hi，JerryChang

1. It’s JetPack 5.0.2;

2. I’ve tried to revise “cil_settletime”, but it didn’t get any better, and when the setting was not correct it didn’t get the first image to be displayed.

3. Our current data-rate is 912Mbps/lane. I have tried to modify the data-rate, but it doesn’t help either

[chenweiqian]

And now we have the video output, thank you.

The cause is that the CPHY pre-begin phase of the preamble & CPHY post length after HS data does not meet the requirements