Overlay preprocessing and macro definitions on Orin Nano for JP6.2

Robotics & Edge Computing Jetson & Embedded Systems Jetson Orin Nano
1

I’m looking at taking what has been done on this link -
ADIS IMU device tree overlay and moving it over to the Jetson Orin Nano (JP6.2 Devkit). The changes in JP6.2 versus what was done in the overlay file header is one thing to note given that the equivalent header for include::tag <dt-common/jetson/tegra234-p3737-0000-p3701-0000.h> is now dt-common/jetson/tegra234-p3767-0000-common.h is located now in nv-public/platforms/dt-bindings.

Since there are c include files the preprocessor is involved but I do pass in the correct directories via command line - -I /r36.4.3/Linux_for_Tegra/source/hardware/nvidia/t23x/nv-public/include/kernel -I /r36.4.3/Linux_for_Tegra/source/hardware/nvidia/t23x/nv-public/include/platforms but noticed that the output still doesn’t fully evaluate the macros. I was wondering if that’s the expected output.

So here’s a snippet of the original:
fragment@1 {
target = <&spi0>;

__overlay__ {
	status = "okay";

	adis_imu: adis16505@0 {
		compatible = "adi,adis16505-2";
		reg = <0x00>;
		spi-cpha;
		spi-cpol;
		spi-max-frequency = <2000000>;
		interrupt-parent = <&tegra_main_gpio>;
		interrupts = <TEGRA234_MAIN_GPIO(Y, 1) IRQ_TYPE_EDGE_RISING>;
		reset-gpios = <&tegra_main_gpio TEGRA234_MAIN_GPIO(G, 6) GPIO_ACTIVE_LOW>;
	};
};

};

Preprocessed output

fragment@1 {
target = <&spi0>;

overlay {
status = “okay”;

adis_imu: adis16505@0 {
compatible = “adi,adis16505-2”;
reg = <0x00>;
spi-cpha;
spi-cpol;
spi-max-frequency = <2000000>;
interrupt-parent = <&tegra_main_gpio>;
interrupts = <((18 * 8) + 1) 1>;
reset-gpios = <&tegra_main_gpio ((6 * 8) + 6) 1>;
};
};
};

Also on @tegra_main_gpio, using JP6.2 is it now just @gpio

3

Hi jays,

It seems you’ve synced the kernel source of Jetpack6.2(r36.4.3) on your host.
Have you tried to configure nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi to add the device tree configuration for your ADIS IMU?

It is expected that gpio is used in JP6.x instead of tegra_main_gpio in JP5.x
You can just check the node of GPIO controller for the name.

4

Hi KevinFFF -
Yes, JP6.2 is installed so source is available.

With regards to adding the device tree config for the ADIS IMU directly to the nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi - I didn’t think I could do that given that this device wants a reset pin (GPIO) and and interrupt. If it was just SPI bus only, I can see that working.

Thank you on the gpio comment and that is helpful but I’ve since I’ve used the jetson-io.py script to turn on just SPI0 I decided to take the dtbo and decompile it and added additional fragments. Please note the GPIO pins used are on the 40 pin header - specifically pin 22 - interrupt and pin 32 - reset pin for the IMU.

However, trying to compile the dts - I do get errors on referencing for non-existent nod or label for spi0 and gpio. I’ve attached the dts. Don’t know how to fix this issue now. Perhaps the first question is - is this a valid approach that I did using jetson-io and then decompiling and addition the additional fragments?
imu.dts.txt (3.0 KB)

5

With regards to the inserting into nv-platform/tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi

I’m assuming this is sufficient then to enable the IMU:
/* SPI1, 40pin header, Pin 19(MOSI), Pin 21(MISO), Pin 23(CLK), Pin 24(CS) */
spi@3210000{
status = “okay”;
spi@0 {
compatible = “adi,adis16505-2”;
reg = <0x0>;
spi-max-frequency = <2000000>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA234_MAIN_GPIO(Y, 1) IRQ_TYPE_EDGE_RISING>;
reset-gpios = <&gpio TEGRA234_MAIN_GPIO(G, 6) GPIO_ACTIVE_LOW>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x10>;
nvidia,tx-clk-tap-delay = <0x0>;
};
};
spi@1 {

6

Interrupt: PIN22 → SPI1_MISO → PY.01
Reset: PIN32 → GPIO07 → PG.06

	fragment@2 {
		target-path = "/spi@3210000/spi@0";

		__overlay__ {
			status = "disable";
		};
	};

I’ve checked your device tree and above part is not expected to me that you should configure disabled instead of disable.

And adis_imu: adis16505@0 this node should be put into spi@3210000 node since you want to use SPI0 for your module. Please also remember to configure status as okay.

Yes, this configurations look good to me.

7

Thanks for taking a look. I decided to tweak the tegra234-p3768-0000+p3767-xxxx-nv-common.dtsi and do it that way at the end - it looks like this within the file now -
/* SPI1, 40pin header, Pin 19(MOSI), Pin 21(MISO), Pin 23(CLK), Pin 24(CS) */
spi@3210000{
status = “okay”;
spi@0 {
compatible = “adi,adis16505-2”;
reg = <0x0>;
spi-max-frequency = <2000000>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA234_MAIN_GPIO(Y, 1) IRQ_TYPE_EDGE_RISING>;
reset-gpios = <&gpio TEGRA234_MAIN_GPIO(G, 6) GPIO_ACTIVE_LOW>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x10>;
nvidia,tx-clk-tap-delay = <0x0>;
};
};
spi@1 {

The dtbs builds without a problem and updating the /boot with it is fine and boots without any issues seen on dmesg. However looking at the gpio pins to check via “gpioinfo”, I would have expected PY, 1 and PG, 6 to be allocated accordingly. I only see -
line 41: “PG.06” unused input active-high ← expected this to be active low and output
line 123: “PY.01” unused input active-high ← expected this to be marked as interrupt

8

I’ve fixed my issue. I just had to use the jetson-io overlay for the spi i wanted. Once that was used then gpioinfo showed:
||line 41: PG.06 reset output active-low [used]|
||line 123: PY.01 interrupt input active-high [used]|

Which matches the device tree. Thanks.

9

Yes, you can use Jetson-IO to configure the pins for SPI usage which would help you to configure the pinmux for the pins used for SPI.
Please note that Jetson-IO is valid for the devkit only.

11

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