Hi,
I am working on custom board, i am using lane mapping configuration 4 as per tx1 adaptation guide.
But I am not able to enumerated devices under pcie, I am using PEX0 and PEX1 of PCIe.
Following are the logs,
[ 4.033310] ehci-pci: EHCI PCI platform driver
[ 6.817784] pciex
[ 8.225434] tegra-pcie 1003000.pcie-controller: PCIE: Enable power rails
[ 8.225725] tegra-pcie 1003000.pcie-controller: probing port 0, using 4 lanes and lane map as 0x12
[ 8.228448] tegra-pcie 1003000.pcie-controller: probing port 1, using 1 lanes and lane map as 0x12
[ 8.252764] tegra-pcie 1003000.pcie-controller: link 0 down, ignoring
[ 8.252781] tegra-pcie 1003000.pcie-controller: link 1 down, ignoring
[ 8.252887] tegra-pcie 1003000.pcie-controller: PCI host bridge to bus 0000:00
[ 8.252897] pci_bus 0000:00: root bus resource [mem 0x13000000-0x1fffffff]
[ 8.252905] pci_bus 0000:00: root bus resource [mem 0x20000000-0x3fffffff pref]
[ 8.252913] pci_bus 0000:00: root bus resource [bus 00-ff]
[ 8.252920] pci_bus 0000:00: root bus resource [io 0x1000-0xffff]
[ 8.252952] pci 0000:00:01.0: [10de:0fae] type 01 class 0x060400
[ 8.253034] pci 0000:00:01.0: PME# supported from D0 D1 D2 D3hot D3cold
[ 8.253221] pci 0000:00:02.0: [10de:0faf] type 01 class 0x060400
[ 8.253300] pci 0000:00:02.0: PME# supported from D0 D1 D2 D3hot D3cold
[ 8.253465] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 8.253477] pci 0000:00:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 8.253665] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
[ 8.253786] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02
[ 8.253819] pci 0000:00:01.0: PCI bridge to [bus 01]
[ 8.253834] pci 0000:00:02.0: PCI bridge to [bus 02]
[ 8.256277] pcieport 0000:00:01.0: Signaling PME through PCIe PME interrupt
[ 8.256292] pcie_pme 0000:00:01.0:pcie01: service driver pcie_pme loaded
[ 8.256408] aer 0000:00:01.0:pcie02: service driver aer loaded
[ 8.256587] pcieport 0000:00:02.0: Signaling PME through PCIe PME interrupt
[ 8.256598] pcie_pme 0000:00:02.0:pcie01: service driver pcie_pme loaded
[ 8.256681] aer 0000:00:02.0:pcie02: service driver aer loaded
[ 8.256729] tegra-pcie 1003000.pcie-controller: PCIE: No Link speed change happened
[ 11.558747] vgaarb: this pci device is not a vga device
[ 11.622400] vgaarb: this pci device is not a vga device
[ 17.593012] vgaarb: this pci device is not a vga device
[ 17.608525] vgaarb: this pci device is not a vga device
[ 317.777089] vgaarb: this pci device is not a vga device
Does anybody have idea, why I am getting bridge configuration invalid message and enumeration is not happening?
Thanks,
Prathamesh
patyarahate,
Could you share your device tree?
Following are my device tree changes:
pcie-controller {
nvidia,wake-gpio = <&gpio TEGRA_GPIO(A, 2) 0>;
@@ -480,9 +480,9 @@
};
xusb_pad_ctl: xusb_padctl { /* Put common control config here */
-
nvidia,ss_portmap = <0x21>;
-
nvidia,lane_owner = <0xff56>; /* Use 0xF to disable lane assign */
-
nvidia,lane-map = <0x14>;
-
nvidia,ss_portmap = <0x7221>;
-
nvidia,lane_owner = <0xf356>; /* Use 0xF to disable lane assign */
-
nvidia,lane-map = <0x11>;
nvidia,enable-sata-port;
status = "okay";
};
@@ -492,7 +492,7 @@
/* nvidia,gpio_controls_muxed_ss_lanes; /
nvidia,gpio_ss1_sata = <0>;
nvidia,ulpicap = <0>; / No ulpi support. can we remove */
patyarahate,
Could you move to rel-24.2.1 if you want to stay on k3.10? We didn’t support rel-24.1 as LTS.
It would be easier for us to look into.
Hi Wayne,
Sorry for late reply. But I have been using rel 24.2.1.
I want to have config#4 for custom board.
So according to platform adaptation guide and OEM design guide, I did following changes,
pcie-controller {
nvidia,wake-gpio = <&gpio TEGRA_GPIO(A, 2) 0>;
- nvidia,lane-map = <0x14>;
- nvidia,lane-map = <0x12>;
dvdd-pex-pll-supply = <&max77620_ldo1>;
l0-dvddio-pex-supply = <&max77620_ldo1>;
l1-dvddio-pex-supply = <&max77620_ldo1>;
@@ -480,9 +480,9 @@
};
xusb_pad_ctl: xusb_padctl { /* Put common control config here */
- nvidia,ss_portmap = <0x21>;
- nvidia,lane_owner = <0xff56>; /* Use 0xF to disable lane assign */
- nvidia,lane-map = <0x14>;
- nvidia,ss_portmap = <0x7221>;
- nvidia,lane_owner = <0xf356>; /* Use 0xF to disable lane assign */
- nvidia,lane-map = <0x11>;
nvidia,enable-sata-port;
status = “okay”;
};
@@ -492,7 +492,7 @@
/* nvidia,gpio_controls_muxed_ss_lanes; /
nvidia,gpio_ss1_sata = <0>;
nvidia,ulpicap = <0>; / No ulpi support. can we remove */
- nvidia,portmap = <0x0e03>;
- nvidia,portmap = <0x0e07>;
nvidia,common_padctl = <&xusb_pad_ctl>;
status = “okay”;
};
Even after changing, lspci does not show any devices even running with sudo.
I also tried to change nvidia,lane_map to 0x11 for PCIe controller as that would be desired configuration and not 0x12
But I see kernel panic while booting when it tries to configure pads??
In case of 0x12 which lanes would be used like, whether its [PCIe0_0(lane4) + PCIe0_1(lane3)] or [PCIe1_1(lane0) + PCIe0_0(lane4)] ??
What changes would be required to get [PCIe1_1(lane0) + PCIe0_0(lane4)] ??
Thanks,
Prathamesh
Hi Dane,
We have custom board, for our board, default configuration can work, but the config#4 is the desired configuration where we are facing issue. You can ignore config#3 as that is not required.
Regarding
https://devtalk.nvidia.com/default/topic/1031024/jetson-tx1/tx1-usb2-port0-with-usb3-port-1-as-usb3-0-type-a-host-port/post/5245105/#5245105
this post
We are using (USB2 port0 + usb3 port1) instead of (USB2 port2 + usb3 port1) like in dev kit.
If I change nvidia,lane_map to 0x11 for PCIe controller as that would be desired configuration and not 0x12
But I see kernel panic while booting when it tries to configure pads??
In case of 0x12 which lanes would be used like, whether its [PCIe0_0(lane4) + PCIe0_1(lane3)] or [PCIe1_1(lane0) + PCIe0_0(lane4)] ??
What changes would be required to get [PCIe1_1(lane0) + PCIe0_0(lane4)] ??
Thanks,
Prathamesh
Hi Prathamesh,
For config #4, your USB3 pins are
C43 C44 F43 F44
G42 G43 D42 D43
What are your USB2 pins per oem design guide?
http://developer.nvidia.com/embedded/dlc/jetson-tx1-oem-product-design-guide
On your board, you have two USB3 type A ports?