PCIe eye diagram measurement

Autonomous Machines Jetson & Embedded Systems Jetson AGX Orin
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Hi Nvidia,

We have designed a custom board and are now proceeding with PCIe eye diagram measurement.

From this document : **Jetson AGX Orin Series Tuning and Compliance Guide Application Note ** downloaded from Download center, we noticed that several test software tools are mentioned, which can generate PCIe signals. However, these software tools are applicable to X86 Windows and not to AGX Orin.

We would like to confirm whether AGX Orin is capable of generating signals similar to those tools mentioned for eye diagram testing. Or, is it necessary to remove the Orin module and use external tools to test the eye diagram of the baseboard?

Thank you.

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Hi Nvidia:
Hope to get replies soon.

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Hi, as said in tuning guide, and the patches are attached in the tuning guide doc:

For the Tx test, the PCIe specification describes a mechanism for testing the electrical characteristics, which relies on a 50 tested. Therefore, when the transmit lanes of the device are terminated with a 50 transmit lanes will automatically be forced into compliance mode. In this setup, the 50 termination on Tx lane-n under test will force compliance mode. Make sure to apply PCIe controller always-on patch (PATCH-A) and apply REFCLK SSC disable patch (PATCH-B) when needed. The patched OS must be flashed before test and then system must boot from flash.

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