PCIe : information about clock differential pair

I am currently developing a electroic board on which I must plug a Jetson Nano module. On our board, there is a PCIe network with a PCIe switch from Broadcom and with an FPGA which acts as root complex. It is also the mode that the Jetson Nano module use in PCIe. so, I can hide this RC behind a Non Transparent block of the PCIe switch …
My question is to know if I must put a load on the differential PCIe clock pair of the Jetson Nano card if there are not used ? Basically if this differential pair is not routed, should we put a Pullup or Pulldown or nothing ?
Thanks for your reply.

It can be left unconnected.

Thanks for your reply.
I can continu to design my interposer board.