PMC and PMIC reset status under R28.1

With R24.2, the nvtboot interface code in U-Boot had access to a “pwron_src”
field in the nvtboot_boot_arg structure that I could use to determine whether the system was booted due to a warm reboot or a cold start, and I modified U-Boot to pass that along to Linux for some code I have that needs that information.

I see that with R28.1, cboot is populating some device tree entries under “/proc/device-tree/chosen/reset” for “pmc_reset_status” and “pmic_reset_status”, and they have different values for warm vs. cold starts, so it looks like I might be able to use those values for this purpose. Are they documented anywhere?

hello madisox,

suppose you’re working on R28.1/TX2.
please download the Tegra X2 (Parker Series SoC) Technical Reference Manual from Jetson Download Center, and check the [POWER MANAGEMENT CONTROLLER (PMC)] chapter for more details.


It’s the TX1, not the TX2, that I’m using, and I have already looked at the PMC chapter in the TRM. There are dozens of registers documented there, but I didn’t see one that was called “reset status”. Can you help with pointing me at the correct register? And what would the PMIC reset status correspond to?


After looking at both TRMs, I was able to track down the right register for the TX1 - APDEV_PMC_RST_STATUS_0. Not sure why I didn’t find it the first time around.

That should be enough for my purposes, but it would be helpful to know what the PMIC reset status values mean, though.

So thanks, JerryChang, for the indirect pointer.