I want to modify entries of secure control registers, especially the SEC LCK bit. But I could not find the source where it can be done.
As per TRM:
SEC LCK is a sticky bit that when set, then no master can change the SCR settings and it is static after lock. A boot
processor takes ownership after cold boot, programs SCRs, and then locks them. The locked settings should be
restored or persist after exiting standby mode (for example, SC7 [LP0] exit).
How and where in kernel source is this locked settings restored ? How does boot processor locks it? Could you provide the details as to how we can control secure control register bits from kernel side?
And how is the read/write lock bit of PMC secure control registers is reset by power on reset as well as SC7 reset? Basically from all above questions, I just want to know if we can control read/write to PMC registers (secure control registers) such that on board reset, we can write to those registers which usually are locked by BPMP
IVID,
There are long list of SCR registers that are programmed inside MB1 (Microboot 1 - the code is run after power-on and sort of extension of Booteom) and it’s binary format. What specific SEC LCK bit you are interested and what are you trying to do here?
As for SC7 suspend/resume code, that is handled by the warmboot code. This is also a binary code.
Thank you for the info. Does it mean that we have no way to modify SCR since it’s a binary? I wanted to modify SEC LCK bit so that I do not get a read access error when trying to access register values at bootloader stage.
IVID,
As sumitg put it, it will be more productive to reexamine what you’re trying to accomplish using r28.1 due to related fixes. That way, we won’t end up chasing the issue that is already fixed at newer release.
"I wanted to modify SEC LCK bit so that I do not get a read access error when trying to access register values at bootloader stage. => we probably should look into why a read access error occurs at the first place.
But again, let’s base on r28.1 result. Thanks in advance.