PXL_SOF syncpt timeout! err = -11

Hi All,

We are trying for Hdmi 2 csi adapter and wrote the sensor driver.

When testing, got the errors as:

PXL_SOF syncpt timeout! err = -11

The logs as:

[ 1160.828700] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_s_power()
[ 1160.935815] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_enum_framesizes()
[ 1160.942342] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_enum_framesizes()
[ 1160.953756] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_enum_framesizes()
[ 1160.960319] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_enum_framesizes()
[ 1160.966678] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_g_input_status():
[ 1160.974300] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_g_input_status: status = 0x0
[ 1160.981945] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_g_input_status():
[ 1160.988281] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_g_input_status: status = 0x0
[ 1160.995819] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_enum_framesizes()
[ 1161.002294] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_enum_frameintervals()
[ 1161.009351] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_enum_frameintervals()
[ 1161.016046] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_enum_frameintervals()
[ 1161.042952] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_enum_framesizes()
[ 1161.051128] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_enum_frameintervals()
[ 1161.057625] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_enum_frameintervals()
[ 1161.064395] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_enum_framesizes()
[ 1161.070861] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_enum_frameintervals()
[ 1161.077478] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_enum_frameintervals()
[ 1161.084190] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_enum_framesizes()
[ 1161.090379] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_get_fmt():
[ 1161.098077] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_get_fmt(): width=1920, height=1080, code=0x0000100A, field=1
[ 1161.108560] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_set_fmt():
[ 1161.114248] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_get_fmt():
[ 1161.119785] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_get_fmt(): width=1920, height=1080, code=0x0000100A, field=1
[ 1161.129649] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_set_fmt():
[ 1161.135166] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_get_fmt():
[ 1161.140686] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_get_fmt(): width=1920, height=1080, code=0x0000100A, field=1
[ 1161.150622] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_set_fmt():
[ 1161.156137] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_set_fmt(): format->which=1
[ 1161.178632] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_get_fmt():
[ 1161.184224] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_get_fmt(): width=1920, height=1080, code=0x0000200F, field=1
[ 1161.194192] fpga_hdmi2csi 0-003c: sensor_common_parse_control_props:gain_factor:property missing
[ 1161.204151] fpga_hdmi2csi 0-003c: sensor_common_parse_control_props:gain_factor:property missing
[ 1161.213400] fpga_hdmi2csi 0-003c: sensor_common_parse_control_props:gain_factor:property missing
[ 1161.222264] fpga_hdmi2csi 0-003c: sensor_common_parse_control_props:gain_factor:property missing
[ 1161.232080] tegra-vi4 15700000.vi: Create Surface with imgW=1920, imgH=1080, memFmt=203
[ 1161.240888] tegra_mipi_cal 3990000.mipical: tegra_mipi_bias_pad_enable
[ 1161.249124] nvcsi 150c0000.nvcsi: csi port:0
[ 1161.253434] tegra_mipi_cal 3990000.mipical: tegra_mipi_calibration
[ 1161.758882] tegra_mipi_cal 3990000.mipical: Mipi cal timeout,val:8771, lanes:300000
[ 1161.766643] tegra_mipi_cal 3990000.mipical: Fixed clk 68MHz
[ 1161.772258] tegra_mipi_cal 3990000.mipical: MIPI_CAL_CTRL 0x04 0x2a000010
[ 1161.780612] tegra_mipi_cal 3990000.mipical: CIL_MIPI_CAL_STATUS 0x0c 0x00008771
[ 1161.788913] tegra_mipi_cal 3990000.mipical: CIL_MIPI_CAL_STATUS_2 0x10 0x00000000
[ 1161.797265] tegra_mipi_cal 3990000.mipical: CILA_MIPI_CAL_CONFIG 0x18 0x00200000
[ 1161.805565] tegra_mipi_cal 3990000.mipical: CILB_MIPI_CAL_CONFIG 0x1c 0x00200000
[ 1161.813916] tegra_mipi_cal 3990000.mipical: CILC_MIPI_CAL_CONFIG 0x20 0x00000000
[ 1161.822214] tegra_mipi_cal 3990000.mipical: CILD_MIPI_CAL_CONFIG 0x24 0x00000000
[ 1161.830565] tegra_mipi_cal 3990000.mipical: CILE_MIPI_CAL_CONFIG 0x28 0x00000000
[ 1161.838890] tegra_mipi_cal 3990000.mipical: CILF_MIPI_CAL_CONFIG 0x2c 0x00000000
[ 1161.847242] tegra_mipi_cal 3990000.mipical: DSIA_MIPI_CAL_CONFIG 0x3c 0x00000200
[ 1161.855556] tegra_mipi_cal 3990000.mipical: DSIB_MIPI_CAL_CONFIG 0x40 0x00000200
[ 1161.863919] tegra_mipi_cal 3990000.mipical: DSIC_MIPI_CAL_CONFIG 0x44 0x00000200
[ 1161.872211] tegra_mipi_cal 3990000.mipical: DSID_MIPI_CAL_CONFIG 0x48 0x00000200
[ 1161.880571] tegra_mipi_cal 3990000.mipical: MIPI_BIAS_PAD_CFG0 0x5c 0x00000000
[ 1161.888862] tegra_mipi_cal 3990000.mipical: MIPI_BIAS_PAD_CFG1 0x60 0x00000000
[ 1161.897215] tegra_mipi_cal 3990000.mipical: MIPI_BIAS_PAD_CFG2 0x64 0x00010010
[ 1161.905505] tegra_mipi_cal 3990000.mipical: DSIA_MIPI_CAL_CONFIG_2 0x68 0x00000002
[ 1161.913846] tegra_mipi_cal 3990000.mipical: DSIB_MIPI_CAL_CONFIG_2 0x6c 0x00000002
[ 1161.922127] tegra_mipi_cal 3990000.mipical: DSIC_MIPI_CAL_CONFIG_2 0x74 0x00000002
[ 1161.930466] tegra_mipi_cal 3990000.mipical: DSID_MIPI_CAL_CONFIG_2 0x78 0x00000002
[ 1161.938758] nvcsi 150c0000.nvcsi: csi4_start_streaming ports index=0, lanes=4
[ 1161.945962] nvcsi 150c0000.nvcsi: csi4_stream_init
[ 1161.950777] nvcsi 150c0000.nvcsi: csi4_stream_config
[ 1161.955760] nvcsi 150c0000.nvcsi: csi4_stream_config (0) read VC0_DPCM_CTRL = 00000000
[ 1161.963746] nvcsi 150c0000.nvcsi: csi4_phy_config
[ 1161.968475] nvcsi 150c0000.nvcsi: NVCSI_CIL_CONFIG = 00000000
[ 1161.974257] fpga_hdmi2csi 0-003c: fpga_hdmi2csi_s_stream():
[ 1162.978960] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 1163.982968] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 1164.987002] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 1165.990968] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 1166.994945] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 1167.999008] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 1169.002950] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11

In trace, we did not see information about the CSI and VI.

Trace logs:

kworker/5:0-35 [005] …1 1379.436713: rtos_queue_peek_from_isr_failed: tstamp:43406487172 queue:0x0b4a3c58
kworker/5:0-35 [005] …1 1379.592742: rtos_queue_peek_from_isr_failed: tstamp:43411487682 queue:0x0b4a3c58
kworker/5:0-35 [005] …1 1379.748708: rtos_queue_peek_from_isr_failed: tstamp:43416487977 queue:0x0b4a3c58
kworker/5:0-35 [005] …1 1379.904726: rtos_queue_peek_from_isr_failed: tstamp:43421488503 queue:0x0b4a3c58

Any ideas.

-Thanks.

The trace log show the CSI/VI didn’t get any validate data from the MIPI bus. You need to probe the MIPI to make sure the output is as spec first.

Hi,

When probed the signals (Clk and data pins), we can see the signals in scope.

-Thanks.

Make sure it’s match the MIPI spec.

How to check this, i.e. it matches MIPI spec.

Here Mipi csi signals comes from FPGA designed by us and in FPGA trace, data come out.

Please provide your ideas.

-Thanks.

Hi, what’s the structure of this HDMI 2 CSI ? HDMI --> FPGA --> CSI (TX2)?

Hi,

structure means? Please provide more info.

-Thanks.

Is this same question as topic: https://devtalk.nvidia.com/default/topic/1032440/csi-2-receiver-mipi-d-phy-i-o-standarad/?offset=6#5253061 ? If yes, this topic can be closed.