RAW14 bit support on Jetson Nano

I’ve added support for RAW14 format like this in the Jetson nano L4T 32.3.1 kernel

//videodev2.h
#define V4L2_PIX_FMT_SGRBG14 v4l2_fourcc('p', 'g', 'E', 'E') 

//v4l2-ioctl.c
static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
{
...

	case V4L2_PIX_FMT_SGRBG14:	descr = "14-bit Bayer GRGR/BGBG"; break;
...

}

//camera_common.c
	{
		MEDIA_BUS_FMT_SGRBG14_1X14,
		V4L2_COLORSPACE_SRGB,
		V4L2_PIX_FMT_SGRBG14,
	},

//sensor_common.c
	else if (strncmp(pixel_t, "bayer_grbg14", size) == 0)
		*format = V4L2_PIX_FMT_SGRBG14;

//vi4_formats.h
static const struct tegra_video_format vi4_video_formats[] = {
...
	TEGRA_VIDEO_FORMAT(RAW14, 14, SGRBG14_1X14, 2, 1, T_R16_I,
				RAW14, SGRBG14, "GRGR.. BGBG.."),
...
}

I am getting the below kernel crash report

> Starting kernel ...                                                             
>                                                                                 
> <hit enter to activate fiq debugger>                                            
> [    1.090116] tegradc tegradc.1: dpd enable lookup fail:-19                    
> [    2.262817] testcam340 7-0012: reg_read: i2c read error, reg: 5b                
> [    2.374761] testcam340 7-0012: reg_read: i2c read error, reg: f7                
> [    2.380779] testcam340 7-0012: reg_read: i2c read error, reg: f8                
> [    2.386806] testcam340 7-0012: reg_read: i2c read error, reg: f9                
> [    2.392674] testcam340 7-0012: Failed to find clocks                            
> [    2.397482] testcam340 7-0012: avdd-reg not in DT                               
> [    2.401995] testcam340 7-0012: iovdd-reg not in DT                              
> [    2.561716] testcam340 7-0012: camera_common_g_fmt(): code=0x301b colorspace=8 w
> ,h=640,480                                                                      
> [    2.569808] Unable to handle kernel read from unreadable memory at virtual ad
> dress 0000001c                                                                  
> [    2.578213] Mem abort info:                                                  
> [    2.581037]   ESR = 0x96000005                                               
> [    2.584123]   Exception class = DABT (current EL), IL = 32 bits              
> [    2.590082]   SET = 0, FnV = 0                                               
> [    2.593169]   EA = 0, S1PTW = 0                                              
> [    2.596340] Data abort info:                                                 
> [    2.599249]   ISV = 0, ISS = 0x00000005                                      
> [    2.603125]   CM = 0, WnR = 0                                                
> [    2.606112] [000000000000001c] user address but active_mm is swapper         
> [    2.612514] Internal error: Oops: 96000005 [#1] PREEMPT SMP                  
> [    2.618107] Modules linked in:                                               
> [    2.621184] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.9.140-tegra #412     
> [    2.627910] Hardware name: NVIDIA Jetson Nano Developer Kit (DT)             
> [    2.633939] task: ffffffc0fa6f0000 task.stack: ffffffc0fa66c000              
> [    2.639885] PC is at tegra_channel_fmts_bitmap_init+0x21c/0x268              
> [    2.645826] LR is at tegra_channel_fmts_bitmap_init+0x1e0/0x268              
> [    2.651766] pc : [<ffffff8008b34f7c>] lr : [<ffffff8008b34f40>] pstate: 60400
> 045                                                                             
> [    2.659188] sp : ffffffc0fa66f7b0                                            
> [    2.662512] x29: ffffffc0fa66f7b0 x28: ffffff80098246c8                      
> [    2.667862] x27: ffffff8009668db0 x26: 0000000000000002                      
> [    2.673212] x25: 0000000000000038 x24: 0000000000000001                      
> [    2.678560] x23: ffffffc0f9740050 x22: ffffffc0f98ef1e8                      
> [    2.683907] x21: ffffffc0f98ef018 x20: ffffffc0f9740050                      
> [    2.689255] x19: 0000000000000001 x18: 0000000000000010                      
> [    2.694605] x17: 0000000000000002 x16: 0000000000000000                      
> [    2.699952] x15: 0000000000000001 x14: 73726f6c6f632062                      
> [    2.705302] x13: 31303378303d6564 x12: 6f63203a2928746d                      
> [    2.710649] x11: 665f675f6e6f6d6d x10: 00000000000002df                      
> [    2.715995] x9 : 63203a323130302d x8 : 0000000000000001                      
> [    2.721345] x7 : 0000000000000008 x6 : 0000000000000000                      
> [    2.726694] x5 : 0000000000000000 x4 : 000000000000000c                      
> [    2.732043] x3 : ffffffc0f98ef360 x2 : 00000000000001e0                      
> [    2.737391] x1 : 0000000000000280 x0 : 0000000000000000                      
> [    2.743638]                                                                  
> [    2.746068] Process swapper/0 (pid: 1, stack limit = 0xffffffc0fa66c000)     
> [    2.753756] Call trace:                                                      
> [    2.757202] [<ffffff8008b34f7c>] tegra_channel_fmts_bitmap_init+0x21c/0x268  
> [    2.765217] [<ffffff8008b366c4>] tegra_channel_init_subdevices+0x17c/0x790   
> [    2.773132] [<ffffff8008b378e8>] tegra_vi_graph_notify_complete+0x2e8/0x6e0  
> [    2.781132] [<ffffff8008b1affc>] v4l2_async_test_notify+0x104/0x120          
> [    2.788448] [<ffffff8008b1b140>] v4l2_async_notifier_register+0x128/0x198    
> [    2.796300] [<ffffff8008b388dc>] tegra_vi_graph_init+0x234/0x288             
> [    2.803397] [<ffffff8008b32450>] tegra_vi_media_controller_init+0x1d0/0x208  
> [    2.811453] [<ffffff8008b50d78>] vi_probe+0x378/0x520                        
> [    2.817604] [<ffffff8008780f40>] platform_drv_probe+0x60/0xc0                
> [    2.824459] [<ffffff800877e5c0>] driver_probe_device+0xd8/0x408              
> [    2.831476] [<ffffff800877e9cc>] __driver_attach+0xdc/0x128                  
> [    2.838127] [<ffffff800877c03c>] bus_for_each_dev+0x5c/0xa8                  
> [    2.844750] [<ffffff800877ddc0>] driver_attach+0x30/0x40                     
> [    2.851115] [<ffffff800877d7f4>] bus_add_driver+0x20c/0x2a8                  
> [    2.857735] [<ffffff800877f904>] driver_register+0x6c/0x110                  
> [    2.864343] [<ffffff8008780e7c>] __platform_driver_register+0x5c/0x68        
> [    2.871842] [<ffffff8009648a3c>] vi_init+0x2c/0x38                           
> [    2.877694] [<ffffff8008083afc>] do_one_initcall+0x44/0x130                  
> [    2.884331] [<ffffff8009600d18>] kernel_init_freeable+0x1a0/0x244            
> [    2.891499] [<ffffff8008f51278>] kernel_init+0x18/0x108                      
> [    2.897782] [<ffffff8008083850>] ret_from_fork+0x10/0x40                     
> [    2.904140] ---[ end trace 1c7b69d0b27466f7 ]---                             
> [    2.915946] Kernel panic - not syncing: Attempted to kill init! exitcode=0x00
> 00000b                                                                          
> [    2.915946]                                                                  
> [    2.927146] SMP: stopping secondary CPUs                                     
> [    2.932147] Kernel Offset: disabled                                          
> [    2.936636] Memory Limit: none                                               
> [    2.946655] Rebooting in 5 seconds..

Can anyone please tell me what i have missed?

1 Like

Moving this to the Jetson Nano category for better visibility.

Looks like your driver still using v1.0 version.
Please reference to ov5693.c to migrate to v2 version.

Hai @ShaneCCC, I have followed the ov5693 driver as it is. I have enabled gray formats already in the same way now the issue with RAW14bit mode. BTW what is the difference between v1.0 and v2? Is there any reference for enable RAW14 in Jetson nano?

v2.0 didn’t call the camera_common_g_fmt() in sensor driver. And looks like the kernel panic in this function.
Maybe you can search in this forum for RAW14 relative topic for reference.

camera_common_g_fmt function is fine. Kernel crashes at tegra_channel_fmts_bitmap_init function in channel.c


/* Initiate the channel format to the first matched format */
	chan->fmtinfo =
		tegra_core_get_format_by_code(chan, fmt.format.code, 0);

	v4l2_fill_pix_format(&chan->format, &fmt.format);
	tegra_channel_update_format(chan, chan->format.width,
				chan->format.height,
				chan->fmtinfo->fourcc,
				&chan->fmtinfo->bpp, 0);

BTW, I have refered some forum links and added the above patch. Can you please advise me how to proceed further?

Please add debug print to narrow down the NULL point cause the kernel panic.

Hi @ShaneCCC , The NULL exception is coming from the below function.

const struct tegra_video_format *
tegra_core_get_format_by_code(struct tegra_channel *chan,
		unsigned int code, unsigned offset)
{
	unsigned int i;

	for (i = offset; i < chan->num_video_formats; ++i) {
		printk("chan->video_formats[i]->code 0x%x code 0x%x offset 0x%x\r\n",chan->video_formats[i]->code,code,offset);
		if (chan->video_formats[i]->code == code)
			return chan->video_formats[i];
	}
	speculation_barrier(); /* break_spec_p#5_1 */
	printk("return NULL tegra_core_get_format_by_code\r\n");
	return NULL;
}

dmesg log,

chan->video_formats[i]->code 0x3014 code 0x301b offset 0x0                                                                               
[    2.240923]  chan->video_formats[i]->code 0x3002 code 0x301b offset 0x0                                                                               
[    2.240925]  chan->video_formats[i]->code 0x3013 code 0x301b offset 0x0                                                                               
[    2.240927]  chan->video_formats[i]->code 0x3001 code 0x301b offset 0x0                                                                               
[    2.240929]  chan->video_formats[i]->code 0x300f code 0x301b offset 0x0                                                                               
[    2.240931]  chan->video_formats[i]->code 0x300a code 0x301b offset 0x0                                                                               
[    2.240933]  chan->video_formats[i]->code 0x300e code 0x301b offset 0x0                                                                               
[    2.240935]  chan->video_formats[i]->code 0x3007 code 0x301b offset 0x0                                                                               
[    2.240937]  chan->video_formats[i]->code 0x3050 code 0x301b offset 0x0                                                                               
[    2.240939]  chan->video_formats[i]->code 0x3053 code 0x301b offset 0x0                                                                               
[    2.240941]  chan->video_formats[i]->code 0x3012 code 0x301b offset 0x0                                                                               
[    2.240943]  chan->video_formats[i]->code 0x3011 code 0x301b offset 0x0                                                                               
[    2.240945]  chan->video_formats[i]->code 0x3010 code 0x301b offset 0x0                                                                               
[    2.240947]  chan->video_formats[i]->code 0x3008 code 0x301b offset 0x0                                                                               
[    2.240949]  chan->video_formats[i]->code 0x100a code 0x301b offset 0x0                                                                               
[    2.240951]  chan->video_formats[i]->code 0x100f code 0x301b offset 0x0                                                                               
[    2.240953]  chan->video_formats[i]->code 0x200f code 0x301b offset 0x0                                                                               
[    2.240955]  chan->video_formats[i]->code 0x2010 code 0x301b offset 0x0                                                                               
[    2.240957]  chan->video_formats[i]->code 0x2011 code 0x301b offset 0x0                                                                               
[    2.240959]  chan->video_formats[i]->code 0x2012 code 0x301b offset 0x0                                                                               
[    2.240961]  chan->video_formats[i]->code 0x200f code 0x301b offset 0x0                                                                               
[    2.240963]  chan->video_formats[i]->code 0x2006 code 0x301b offset 0x0                                                                               
[    2.240965]  chan->video_formats[i]->code 0x2007 code 0x301b offset 0x0                                                                               
[    2.240967]  chan->video_formats[i]->code 0x2008 code 0x301b offset 0x0                                                                               
[    2.240969]  chan->video_formats[i]->code 0x2009 code 0x301b offset 0x0                                                                               
[    2.240971]  return NULL tegra_core_get_format_by_code

my configuration is below,

{
	MEDIA_BUS_FMT_SGRBG14_1X14,	// #define MEDIA_BUS_FMT_SGRBG14_1X14		0x301b
	V4L2_COLORSPACE_SRGB,
	V4L2_PIX_FMT_SGRBG14,
},

Please let us know what we have missed in the configuration? Thanks in advance.

1 Like

OK, you should add below to vi2_formats.h instead of vi4

Thank you so much @ShaneCCC. 14bit is configured now. I will start my further testing on that.

🙂

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