RGMII ethernet phy rtl8211f: failed to connect PHY

Hello, Our carrier board with L4T 36.3.0 use RTL8211FSI-CG can not work.

We added a Gigabit Ethernet to the custom board according to the documentation:
Jetson agx orin develop guide: rgmii

phy dts:

ethernet@2310000 {
	status = "okay";
	phy-mode = "rgmii-id";
	phy-handle = <&rgmii_phy>;
	nvidia,phy-reset-gpio = <&gpio TEGRA234_MAIN_GPIO(G, 5) 0>;
	nvidia,mac-addr-idx = <1>;
	nvidia,max-platform-mtu = <16383>;
	nvidia,mdio_addr = <1>;

	mdio {
		compatible = "nvidia,eqos-mdio";
		#address-cells = <1>;
		#size-cells = <0>;

		rgmii_phy: phy@1 {
			reg = <1>;
			nvidia,phy-rst-pdelay-msec = <224>; /* msec */
			nvidia,phy-rst-duration-usec = <20000>; /* usec */
			interrupt-parent = <&gpio>;
			interrupts = <TEGRA234_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>;
		};
	};

pinmux:
Orin-jetson_agx_orin-gpio-default.dtsi.txt (4.9 KB)
Orin-jetson_agx_orin-pinmux.dtsi.txt (65.7 KB)

dmesg | grep eth

[    0.000000] psci: probing for conduit method from DT.
[    1.770002] optee: probing for conduit method.
[    6.879073] systemd[1]: /etc/systemd/system/nvs-service.service:41: Standard output type syslog is obsolete, automatically updating to journal. Please update your unit file, and consider removing the setting altogether.
[    6.884669] systemd[1]: /etc/systemd/system/nvargus-daemon.service:42: Standard output type syslog is obsolete, automatically updating to journal. Please update your unit file, and consider removing the setting altogether.
[    8.060506] using random self ethernet address
[    8.060513] using random host ethernet address
[    8.394718] using random self ethernet address
[    8.394726] using random host ethernet address
[    8.589598] nvpps c6a0000.nvpps: primary-emac found ethernet@6800000
[    8.589632] nvpps c6a0000.nvpps: using ptp notifier method on emac ethernet@6800000
[    8.618934] nvethernet 6800000.ethernet: Adding to iommu group 54
[    8.619245] nvethernet 6800000.ethernet: failed to read skip mac reset flag, default 0
[    8.619253] nvethernet 6800000.ethernet: setting to default DMA bit mask
[    8.619275] nvethernet 6800000.ethernet: failed to read UPHY GBE mode- default to 10G
[    8.619568] nvethernet 6800000.ethernet: [whj] RESET PHY CHIP
[    9.004385] nvethernet 6800000.ethernet: Ethernet MAC address: 48:b0:2d:fe:54:c4
[    9.017195] nvethernet 6800000.ethernet: Macsec not enabled
[    9.017198] nvethernet 6800000.ethernet: Macsec: Reduced MTU: 1466 Max: 16383
[    9.023119] nvethernet 6800000.ethernet: eth0 (HW ver: 31) created with 10 DMA channels
[    9.023411] nvethernet 2310000.ethernet: Adding to iommu group 57
[    9.024128] nvethernet 2310000.ethernet: failed to read skip mac reset flag, default 0
[    9.024135] nvethernet 2310000.ethernet: Failed to read nvida,pause_frames, so setting to default support as disable
[    9.024137] nvethernet 2310000.ethernet: setting to default DMA bit mask
[    9.024409] nvethernet 2310000.ethernet: [whj] RESET PHY CHIP
[    9.277646] nvethernet 2310000.ethernet: Ethernet MAC address: 48:b0:2d:fe:54:c5
[    9.333483] nvethernet 2310000.ethernet: Macsec not enabled
[    9.333486] nvethernet 2310000.ethernet: Macsec: Reduced MTU: 1466 Max: 16383
[    9.334641] nvethernet 2310000.ethernet: eth1 (HW ver: 53) created with 8 DMA channels
[   10.712369] Aquantia AQR113C 6800000.ethernet:00: No AQR phy_mode setting in DT
[   10.975586] mdio_bus 2310000.ethernet: MDIO device at address 1 is missing.
[   10.975599] nvethernet 2310000.ethernet: failed to connect PHY
[   10.975602] net eth1: ether_open: Cannot attach to PHY (error: -19)

phy reset io state:

Hi, I’d like some guidance on debugging a third-party Ethernet PHY chip. And ensure if dts and pinmux are correct.

Why the reset pin output is low after phy chip connection fails. Shouldn’t it be high (GPIO_ACTIVE_LOW)?

You wrote 0 here which is GPIO_ACTIVE_HIGH.

yes, in file nvidia-oot driver ether_linux.c

So it’s right.

請問你貼這段是想要表示什麼?

Hello @wuhj

Could you please try the first solution posted at RGMII doesn't work with ksz9031?

This is removing the phy-handleparameter from your device tree.

Let us know if this works for you.

Regards!
Eduardo Salazar
Embedded SW Engineer at RidgeRun

Contact us: support@ridgerun.com
Developers wiki: https://developer.ridgerun.com/
Website: www.ridgerun.com

hi,

Thank you for your reply, the problem has been solved after the hardware engineer modified the phy circuit, and there is no problem with dts and pinmux.

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