RGMII not work and cannot boot (PHY RTL8211F)

[_Dyaaaa5]

Hi NV team,

I am currently using version 36.4.3, applied to a custom board, and using the RTL8211F-CG. The module used is 32G (0955:7223), and MGBE not used on the board.

Modify p3701.conf.common

ODMDATA="gbe-uphy-config-0,hsstp-lane-map-3,nvhs-uphy-config-0,hsio-uphy-config-0";

According to the NV Developer Guide, I set ethernet@2310000 in source\hardware\nvidia\t23x\nv-public\nv-platform\tegra234-p3737-0000.dtsi

		ethernet@2310000 {
			status = "okay";
			phy-mode = "rgmii-id";
			phy-handle = <&phy>;
			nvidia,mac-addr-idx = <0>;
			nvidia,phy-reset-gpio = <&gpio TEGRA234_MAIN_GPIO(G, 5) 0>;

			mdio {
				compatible = "nvidia,eqos-mdio";
				#address-cells = <1>;
				#size-cells = <0>;

				phy: phy@1 {
					reg = <1>;
					nvidia,phy-rst-pdelay-msec = <224>; /* msec */
					nvidia,phy-rst-duration-usec = <10000>; /* usec */
					interrupt-parent = <&gpio>;
					interrupts = <TEGRA234_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>;
				};
			};
		};

And also added Tx, Rx, MDC/MDIO and Reset, Interrupt Pinmux settings in bootloader\generic\BCT\tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi

Tx : eqos_txc_pe0, eqos_td0_pe1, eqos_td1_pe2, eqos_td2_pe3, eqos_td3_pe4, eqos_tx_ctl_pe5

			eqos_txc_pe0 {
				nvidia,pins = "eqos_txc_pe0";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			eqos_td0_pe1 {
				nvidia,pins = "eqos_td0_pe1";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			eqos_td1_pe2 {
				nvidia,pins = "eqos_td1_pe2";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			eqos_td2_pe3 {
				nvidia,pins = "eqos_td2_pe3";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			eqos_td3_pe4 {
				nvidia,pins = "eqos_td3_pe4";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			eqos_tx_ctl_pe5 {
				nvidia,pins = "eqos_tx_ctl_pe5";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

Rx : eqos_rd0_pe6, eqos_rd1_pe7, eqos_rd2_pf0, eqos_rd3_pf1, eqos_rx_ctl_pf2, eqos_rxc_pf3

			eqos_rd0_pe6 {
				nvidia,pins = "eqos_rd0_pe6";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			eqos_rd1_pe7 {
				nvidia,pins = "eqos_rd1_pe7";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			eqos_rd2_pf0 {
				nvidia,pins = "eqos_rd2_pf0";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			eqos_rd3_pf1 {
				nvidia,pins = "eqos_rd3_pf1";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			eqos_rx_ctl_pf2 {
				nvidia,pins = "eqos_rx_ctl_pf2";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			eqos_rxc_pf3 {
				nvidia,pins = "eqos_rxc_pf3";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

MDC/MDIO : eqos_sma_mdio_pf4, eqos_sma_mdc_pf5

			eqos_sma_mdio_pf4 {
				nvidia,pins = "eqos_sma_mdio_pf4";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			eqos_sma_mdc_pf5 {
				nvidia,pins = "eqos_sma_mdc_pf5";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

Reset, Interrupt Pinmux : soc_gpio17_pg4, soc_gpio18_pg5

			soc_gpio17_pg4 {
				nvidia,pins = "soc_gpio17_pg4";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio18_pg5 {
				nvidia,pins = "soc_gpio18_pg5";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

Also added G4、G5 GPIO in bootloader/tegra234-mb1-bct-gpio-p3701-0000-a04.dtsi

gpio_main_default: default {
			gpio-input = <
				TEGRA234_MAIN_GPIO(B, 0)
				TEGRA234_MAIN_GPIO(Y, 3)
				TEGRA234_MAIN_GPIO(Y, 4)
				TEGRA234_MAIN_GPIO(Z, 1)
				TEGRA234_MAIN_GPIO(Z, 2)
				TEGRA234_MAIN_GPIO(Z, 3)
				TEGRA234_MAIN_GPIO(Z, 4)
				TEGRA234_MAIN_GPIO(Z, 5)
				TEGRA234_MAIN_GPIO(Z, 6)
				TEGRA234_MAIN_GPIO(Z, 7)
				TEGRA234_MAIN_GPIO(P, 4)
				TEGRA234_MAIN_GPIO(P, 6)
				TEGRA234_MAIN_GPIO(Q, 6)
				TEGRA234_MAIN_GPIO(Q, 7)
				TEGRA234_MAIN_GPIO(R, 1)
				TEGRA234_MAIN_GPIO(N, 4)
				TEGRA234_MAIN_GPIO(N, 1)
				TEGRA234_MAIN_GPIO(G, 0)
				TEGRA234_MAIN_GPIO(G, 1)
				TEGRA234_MAIN_GPIO(G, 2)
				TEGRA234_MAIN_GPIO(G, 4)
				TEGRA234_MAIN_GPIO(G, 7)
				TEGRA234_MAIN_GPIO(H, 0)
				TEGRA234_MAIN_GPIO(H, 7)
				TEGRA234_MAIN_GPIO(I, 0)
				TEGRA234_MAIN_GPIO(I, 1)
				TEGRA234_MAIN_GPIO(I, 2)
				TEGRA234_MAIN_GPIO(AC, 3)
				TEGRA234_MAIN_GPIO(AC, 4)
				TEGRA234_MAIN_GPIO(AC, 5)
				TEGRA234_MAIN_GPIO(AE, 0)
				TEGRA234_MAIN_GPIO(AE, 1)
				TEGRA234_MAIN_GPIO(K, 0)
				TEGRA234_MAIN_GPIO(K, 1)
				TEGRA234_MAIN_GPIO(K, 6)
				TEGRA234_MAIN_GPIO(K, 7)
				TEGRA234_MAIN_GPIO(L, 2)
				TEGRA234_MAIN_GPIO(L, 3)
				TEGRA234_MAIN_GPIO(AG, 0)
				TEGRA234_MAIN_GPIO(AG, 1)
				TEGRA234_MAIN_GPIO(AG, 2)
				TEGRA234_MAIN_GPIO(AG, 3)
				TEGRA234_MAIN_GPIO(AG, 6)
				TEGRA234_MAIN_GPIO(AG, 7)
				TEGRA234_MAIN_GPIO(AF, 2)
				TEGRA234_MAIN_GPIO(AF, 3)
				>;
			gpio-output-low = <
				TEGRA234_MAIN_GPIO(X, 0)
				TEGRA234_MAIN_GPIO(X, 1)
				TEGRA234_MAIN_GPIO(Q, 4)
				TEGRA234_MAIN_GPIO(N, 3)
				TEGRA234_MAIN_GPIO(H, 1)
				TEGRA234_MAIN_GPIO(H, 3)
				TEGRA234_MAIN_GPIO(H, 4)
				TEGRA234_MAIN_GPIO(H, 5)
				TEGRA234_MAIN_GPIO(H, 6)
				TEGRA234_MAIN_GPIO(I, 5)
				TEGRA234_MAIN_GPIO(AC, 0)
				TEGRA234_MAIN_GPIO(AC, 1)
				TEGRA234_MAIN_GPIO(AC, 2)
				TEGRA234_MAIN_GPIO(A, 1)
				TEGRA234_MAIN_GPIO(A, 2)
				>;
			gpio-output-high = <
				TEGRA234_MAIN_GPIO(Y, 0)
				TEGRA234_MAIN_GPIO(Y, 1)
				TEGRA234_MAIN_GPIO(Y, 2)
				TEGRA234_MAIN_GPIO(Z, 0)
				TEGRA234_MAIN_GPIO(Q, 1)
				TEGRA234_MAIN_GPIO(G, 3)
				TEGRA234_MAIN_GPIO(G, 5)
				TEGRA234_MAIN_GPIO(AC, 7)
				TEGRA234_MAIN_GPIO(K, 5)
				TEGRA234_MAIN_GPIO(A, 0)
				TEGRA234_MAIN_GPIO(A, 3)
				>;
		};

But after the Flash is completed, there is no way to enter the system, and it always stops at using random host ethernet address.

Why does this happen? Is there a setting error or missing?
RGMII_BootFail_0320.log (161.0 KB)

If I only add Tx and Rx, I can enter the system after Flash is completed, but eth0 cannot be used.
RGMII_OnlyTxRx_0320.log (251.2 KB)

I also noticed that in the former case (adding everything), my LAN LED color changed (ACT and Speed ​​orange); while in the latter case (adding only TxRx), the LAN LED did not change (ACT without Speed ​​green).

Please help to solve this problem. Thank you.

[carolyuu]

Hi,

If you are designing a custom base board, then it means some adaptation configurations are needed.
Otherwise, your board may not work fine.

For Orin AGX series, you could refer to below document

Jetson AGX Orin Platform Adaptation and Bring-Up — NVIDIA Jetson Linux...

(please be aware that above link is for rel-36.3/jetpack6.0)

This document includes below configuration

1. pinmux change & GPIO configuration
2. EEPROM change as most custom boards do not have an EEPROM on it.
3. Kernel porting
4. PCIe configuration
5. USB configuration
6. MGBE configuration
7. RGMII configuration

Thanks!

[_Dyaaaa5]

Hi @carolyuu ,

I have already referred to it, and now I am asking because I have encountered a problem.

[WayneWWW]

The pinmux setting and DT look correct.

The last time we got another user using this PHY was because missing Realtek PHY driver.

Is CONFIG_REALTEK_PHY set in your kernel?

[_Dyaaaa5]

Hi @WayneWWW ,

Thanks for your reply,
I just checked that CONFIG_REALTEK_PHY in the system is enabled correctly.

nvidia@tegra-ubuntu:~$ zgrep CONFIG_REALTEK_PHY /proc/config.gz
CONFIG_REALTEK_PHY=y

[WayneWWW]

I don’t directly work on this PHY before so cannot comment.

Maybe this thread might help. These users use this RTL Phy on their board and make it work in the end.

RGMII PHY RTL8211

你好！现在我们做RGMII的千兆网络方案，用的是RTL8211FDI-CG的芯片。 目前已经按照这个指导去配置了Jetson AGX Orin Platform Adaptation and Bring-Up — Jetson Linux Developer Guide documentation 但目前网络还是没有工作，量到mdio是没有data的波形的，只有一直上拉的1.8v电平。 这是相关的配置： eqos_sma_mdio_pf4 { nvidia,pins = "eqos_sma_mdio_pf4"; nvidia,function = "eqos"; nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_DISABLE>; nvidia,enable-input = <TEGRA_PIN_ENABLE>; }; eqos_sma_mdc_pf5 { nvidia,pins = "eqos_sma_mdc_pf5"; nv…

Realtek RTL8211F-CG on JP6/L36.3

Our customized Orin carrier board which replaces the Marvell AQR113C 10G PHY to Realtek RTL8211F-CG 1G PHY. It can works well when uses L4T from 35.1 to 35.4.1. I merge the configurations to L4T 36.3, but the ethernet device does not been created. Please help to check it, thanks. 8211f_jp6_36_3.zip (76.8 KB)

[_Dyaaaa5]

Hi @WayneWWW ,

I would like to ask you to help check the pinmux value.

In the previous reply, it was mentioned that it seems to be a hardware problem.
If the Pinmux value is normal, I will check the hardware configuration again.

root@tegra-ubuntu:/home/nvidia# busybox devmem 0x02434070
0x00000014
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x02434078
0x00000014
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x02445018
0x00002400
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x02445010
0x00002400
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x02445008
0x00002400
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x02445000
0x00002400
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x02445068
0x00002400
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x02445040
0x00002458
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x02445030
0x00002458
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x02445028
0x00002458
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x02445020
0x00002458
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x02445070
0x00002458
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x02445060
0x00002458
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x02445038
0x00002415
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x02445048
0x00002415
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x02445050
0x00002000
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x022140a0
0x00000003
root@tegra-ubuntu:/home/nvidia# busybox devmem 0x02214080
0x00000001

[WayneWWW]

Hi,

You could use this table to check the pinmux register.

[_Dyaaaa5]

Hi @WayneWWW

Currently, if Pinmux is added to MDC/MDIO, it will cause the system to be unable to enter.
Can you help analyze this issue?

MDC/MDIO: eqos_sma_mdio_pf4, eqos_sma_mdc_pf5

			eqos_sma_mdio_pf4 {
				nvidia,pins = "eqos_sma_mdio_pf4";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			eqos_sma_mdc_pf5 {
				nvidia,pins = "eqos_sma_mdc_pf5";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

RGMII_BootFail_0321.log (161.0 KB)

[WayneWWW]

Will the system give out wathdog timer timeout in this hang situation after waiting for a while?
Have you tried to add some prints to nvethernet driver and see if to hang in some probe stage? Looks like nvethernet driver is totally not showing up in the log.

[WayneWWW]

You could add ignore_loglevel to kernel cmdline and that will enable more logs.

[_Dyaaaa5]

Hi @WayneWWW ,

I added ignore_loglevel to CMDLINE_ADD in p3701.conf.common
This should be correct, right?

RGMII_ignore_loglevel.log (412.8 KB)

[WayneWWW]

Looks like no further log is printed. Please answer my previous questions first.

[_Dyaaaa5]

Hi @WayneWWW ,

This is the boot log I added to print some information in static int ether_probe(struct platform_device *pdev) in ether_linux.c

ether_linux.log (144.1 KB)

The specific code is as follows:
ether_probe.txt (10.4 KB)

It seems that the nvethernet driver is working, but I still cannot enter the system screen.

[WayneWWW]

@WayneWWW

Will the system give out wathdog timer timeout in this hang situation after waiting for a while?

Looks like above question was never answered. So let me point out this again.

[_Dyaaaa5]

Sorry I overlooked this issue. After the system displays using random host ethernet address, it will automatically reboot after about 2 minutes.

[2025-03-24 11:32:50.003] [   13.305334] using random self ethernet address
[2025-03-24 11:32:50.011] [   13.305343] using random host ethernet address
[2025-03-24 11:32:50.045] [   13.338974] loop0: detected capacity change from 0 to 32768
[2025-03-24 11:32:50.095] [   13.400883] loop1: detected capacity change from 0 to 8
[2025-03-24 11:32:50.184] [   13.488198] Mass Storage Function, version: 2009/09/11
[2025-03-24 11:32:50.190] [   13.488205] LUN: removable file: (no medium)
[2025-03-24 11:32:50.195] [   13.497093] using random self ethernet address
[2025-03-24 11:32:50.200] [   13.497098] using random host ethernet address
[2025-03-24 11:34:44.977]   
[2025-03-24 11:34:44.981] [0000.062] I> MB1 (version: 1.4.0.4-t234-54845784-e89ea9bc)
[2025-03-24 11:34:44.984] [0000.067] I> t234-A01-1-Silicon (0x12347) Prod
[2025-03-24 11:34:44.989] [0000.071] I> Boot-mode : Coldboot
[2025-03-24 11:34:44.991] [0000.074] I> Entry timestamp: 0x00000000
[2025-03-24 11:34:44.993] [0000.078] I> last_boot_error: 0x0
[2025-03-24 11:34:44.997] [0000.081] I> BR-BCT: preprod_dev_sign: 0

Detailed time is recorded in the log
bootfail.log (288.7 KB)

[WayneWWW]

Just to confirm. If you don’t enable 2310000 in the DT but with the pinmux still configured, then you won’t hit this error, right?

[_Dyaaaa5]

Hi @WayneWWW ,

Yes, can enter the system by completely removing 2310000 in tegra234-p3737-0000.dtsi and keeping Pinmux (Tx, Rx, MDC/MDIO/Reset and Interrupt) and GPIO (G4 G5).

[WayneWWW]

Does “ether_open” ever get called (also in ether_linux.c) on your board?

[_Dyaaaa5]

Probably not yet.