Hello,
I tried to run cuBB F08 E2E test, and suffered a segmentation fault with cuphycontroller.
1. Hardware
Two Intel SPR-EE Servers are Connected with Mallenox NICs (MT2892 Family, ConectX-6 Dx), one server is for cuphycontroller and testMAC (within one container), the other one for is RU Emulator:
- CPU: Intel(R) Xeon(R) Gold 6430
- GPU: NVIDIA L4 Tensor Core GPU
- NIC: MT2892 Family, ConectX-6 Dx
2. Software
- cuBB-25-3
3. Test Case String
- F08_1C_59c
4. cuphycontroller log
root@c_aerial_root:/opt/nvidia/cuBB/testBenches# $cuBB_SDK/testBenches/phase4_test_scripts/run2_cuPHYcontroller.sh $RUN2_CUPHYCONTROLLER_PARAMS
restarting MPS
Stopping MPS...
Cannot find MPS control daemon process
Starting MPS...
/opt/nvidia/cuBB build.perf.x86_64 F08_GL4
/opt/nvidia/cuBB/build.perf.x86_64/cuPHY-CP/cuphycontroller/examples/cuphycontroller_scf F08_GL4
F08_GL4
Started cuphycontroller on CPU core 11
08:14:31.749566 CON phy_init 0 [CTL.SCF] Config file: /opt/nvidia/cuBB/cuPHY-CP/cuphycontroller/config/cuphycontroller_F08_GL4.yaml
08:14:31.751292 CON phy_init 0 [CTL.SCF] low_priority_core=0
08:14:31.751318 CON phy_init 0 [APP.CONFIG] Current TAI offset: 0s
08:14:31.751380 CON phy_init 0 [NVLOG.CPP] Using /opt/nvidia/cuBB/cuPHY/nvlog/config/nvlog_config.yaml for nvlog configuration
08:14:31.766963 CON phy_init 0 [NVLOG.CPP] Output log file path /tmp/phy.log
Aerial metrics backend address: 127.0.0.1:60000
YAML invalid key: dlc_alloc_cplane_bfw_txq Using default value of 0 for YAML_PARAM_DLC_ALLOC_CPLANE_BFW_TXQ
YAML invalid key: ulc_alloc_cplane_bfw_txq Using default value of 0 for YAML_PARAM_ULC_ALLOC_CPLANE_BFW_TXQ
08:14:31.779855 CON phy_init 0 [CTL.YAML] cuphycontroller config. yaml does not have ul_order_timeout_gpu_srs_ns key; defaulting to 5200000 ns
08:14:31.779857 CON phy_init 0 [CTL.YAML] cuphycontroller config. yaml does not have ul_srs_aggr3_task_launch_offset_ns key; defaulting to 500000 ns
08:14:31.779869 WRN phy_init 0 [CTL.YAML] cuphycontroller config. yaml does not have ul_order_kernel_mode key; defaulting to 0 (Ping-Pong mode).
08:14:31.782816 WRN phy_init 0 [CTL.YAML] YAML invalid key: enable_l1_param_sanity_check Using default value of 0 to YAML_PARAM_ENABLE_L1_PARAM_SANITY_CHECK
08:14:31.782895 WRN phy_init 0 [CTL.YAML] YAML invalid key: pusch_weighted_average_cfo Using default value of 0 to PUSCH-WEIGHTED-AVERAGE-CFO
08:14:31.782924 WRN phy_init 0 [CTL.YAML] YAML invalid key: pucch_aggr_per_ctx Using default value of 4 to YAML_PARAM_PUCCH_AGGR_PER_CTX
08:14:31.782933 WRN phy_init 0 [CTL.YAML] YAML invalid key: srs_aggr_per_ctx Using default value of 2 to YAML_PARAM_SRS_AGGR_PER_CTX
08:14:31.782942 WRN phy_init 0 [CTL.YAML] YAML invalid key: ul_input_buffer_per_cell_srs Using default value of 4 to YAML_PARAM_UL_INPUT_BUFFER_NUM_PER_CELL_SRS
08:14:31.782951 WRN phy_init 0 [CTL.YAML] YAML invalid key: max_ru_unhealthy_ul_slots Using default value of 0 for YAML_PARAM_MAX_RU_UNHEALTHY_UL_SLOTS
08:14:31.782971 WRN phy_init 0 [CTL.YAML] YAML invalid key: bfw_beta_prescaler Using default value of 16384 for YAML_PARAM_BFW_BETA_PRESCALER 16384
08:14:31.782986 WRN phy_init 0 [CTL.YAML] YAML invalid key: ul_pcap_capture_enable Using default value of 0 for YAML_PARAM_UL_PCAP_CAPTURE_ENABLE
08:14:31.782996 WRN phy_init 0 [CTL.YAML] YAML invalid key: pcap_logger_ul_cplane_enable PCAP Logging parameters are set incorrectly, so logger is disabled by default
08:14:31.783063 WRN phy_init 0 [CTL.YAML] YAML invalid key: bfw_c_plane_chaining_mode Using default value of 0 for YAML_PARAM_BFW_C_PLANE_CHAINING_MODE
08:14:31.783074 WRN phy_init 0 [CTL.YAML] YAML invalid key: enable_tx_notification Using default value of 0 for YAML_PARAM_ENABLE_TX_NOTIFICATION
08:14:31.783223 WRN phy_init 0 [CTL.YAML] YAML invalid key: pusch_nMaxLdpcHetConfigs Using default value of 32 to PUSCH-N-MAX-LDPC-HET-CONFIGS
08:14:31.783286 CON phy_init 0 [CTL.YAML] cell_id 1 nic_index :0
08:14:31.783412 CON phy_init 0 [CTL.YAML] ta4_min_ns_srs/ta4_max_ns_srs not set in config file, using default ta4_min_ns_srs = 621 us and ta4_max_ns_srs = 1831 us
08:14:31.783420 CON phy_init 0 [CTL.YAML] t1a_min_cp_dl_ns/t1a_max_cp_dl_ns not set in config file, using default t1a_min_cp_dl_ns = 419 us and t1a_max_cp_dl_ns = 669 us
08:14:31.783426 CON phy_init 0 [CTL.YAML] t1a_min_cp_ul_ns not set in config file, using default of 285 us
08:14:31.783520 CON phy_init 0 [CTL.YAML] Num Slots: 8
08:14:31.783521 CON phy_init 0 [CTL.YAML] Enable UL cuPHY Graphs: 1
08:14:31.783522 CON phy_init 0 [CTL.YAML] Enable DL cuPHY Graphs: 1
08:14:31.783522 CON phy_init 0 [CTL.YAML] Accurate TX scheduling clock resolution (ns): 500
08:14:31.783523 CON phy_init 0 [CTL.YAML] DPDK core: 0
08:14:31.783523 CON phy_init 0 [CTL.YAML] Prometheus core: -1
08:14:31.783523 CON phy_init 0 [CTL.YAML] UL cores:
08:14:31.783524 CON phy_init 0 [CTL.YAML] - 2
08:14:31.783524 CON phy_init 0 [CTL.YAML] - 3
08:14:31.783524 CON phy_init 0 [CTL.YAML] DL cores:
08:14:31.783524 CON phy_init 0 [CTL.YAML] - 4
08:14:31.783524 CON phy_init 0 [CTL.YAML] - 5
08:14:31.783524 CON phy_init 0 [CTL.YAML] - 6
08:14:31.783525 CON phy_init 0 [CTL.YAML] - 7
08:14:31.783525 CON phy_init 0 [CTL.YAML] Debug worker: 9
08:14:31.783525 CON phy_init 0 [CTL.YAML] Data Lake core: -1
08:14:31.783525 CON phy_init 0 [CTL.YAML] SRS starting Section ID: 3072
08:14:31.783526 CON phy_init 0 [CTL.YAML] PRACH starting Section ID: 2048
08:14:31.783527 CON phy_init 0 [CTL.YAML] USE GREEN CONTEXTS: 0
08:14:31.783527 CON phy_init 0 [CTL.YAML] USE BATCHED MEMCPY: 1
08:14:31.783527 CON phy_init 0 [CTL.YAML] MPS SM PUSCH: 32
08:14:31.783527 CON phy_init 0 [CTL.YAML] MPS SM PUCCH: 8
08:14:31.783528 CON phy_init 0 [CTL.YAML] MPS SM PRACH: 4
08:14:31.783528 CON phy_init 0 [CTL.YAML] MPS SM UL ORDER: 12
08:14:31.783528 CON phy_init 0 [CTL.YAML] MPS SM PDSCH: 40
08:14:31.783528 CON phy_init 0 [CTL.YAML] MPS SM PDCCH: 4
08:14:31.783528 CON phy_init 0 [CTL.YAML] MPS SM PBCH: 2
08:14:31.783528 CON phy_init 0 [CTL.YAML] MPS SM GPU_COMMS: 16
08:14:31.783528 CON phy_init 0 [CTL.YAML] MPS SM SRS: 4
08:14:31.783529 CON phy_init 0 [CTL.YAML] UL Order Kernel Mode: 0
08:14:31.783529 CON phy_init 0 [CTL.YAML] PDSCH fallback: 0
08:14:31.783529 CON phy_init 0 [CTL.YAML] Massive MIMO enable: 0
08:14:31.783529 CON phy_init 0 [CTL.YAML] mMIMO_enable feature 0
08:14:31.783529 CON phy_init 0 [CTL.YAML] Enable SRS : 0
08:14:31.783530 CON phy_init 0 [CTL.YAML] ul_order_timeout_gpu_log_enable: 1
08:14:31.783530 CON phy_init 0 [CTL.YAML] ue_mode: 0
08:14:31.783530 CON phy_init 0 [CTL.YAML] Aggr Obj Non-availability threshold: 5
08:14:31.783530 CON phy_init 0 [CTL.YAML] sendCPlane_timing_error_th_ns: 0
08:14:31.783530 CON phy_init 0 [CTL.YAML] pusch_aggr_per_ctx: 4
08:14:31.783530 CON phy_init 0 [CTL.YAML] prach_aggr_per_ctx: 2
08:14:31.783531 CON phy_init 0 [CTL.YAML] pucch_aggr_per_ctx: 4
08:14:31.783531 CON phy_init 0 [CTL.YAML] srs_aggr_per_ctx: 2
08:14:31.783531 CON phy_init 0 [CTL.YAML] max_harq_pools: 512
08:14:31.783531 CON phy_init 0 [CTL.YAML] max_harq_tx_count_bundled: 10
08:14:31.783531 CON phy_init 0 [CTL.YAML] max_harq_tx_count_non_bundled: 4
08:14:31.783531 CON phy_init 0 [CTL.YAML] ul_input_buffer_per_cell: 10
08:14:31.783531 CON phy_init 0 [CTL.YAML] ul_input_buffer_per_cell_srs: 4
08:14:31.783532 CON phy_init 0 [CTL.YAML] max_ru_unhealthy_ul_slots: 0
08:14:31.783532 CON phy_init 0 [CTL.YAML] srs_chest_algo_type: 0
08:14:31.783532 CON phy_init 0 [CTL.YAML] srs_chest_tol2_normalization_algo_type: 1
08:14:31.783533 CON phy_init 0 [CTL.YAML] srs_chest_tol2_constant_scaler: 32768
08:14:31.783533 CON phy_init 0 [CTL.YAML] bfw_power_normalization_alg_selector: 1
08:14:31.783533 CON phy_init 0 [CTL.YAML] bfw_beta_prescaler: 16384
08:14:31.783533 CON phy_init 0 [CTL.YAML] total_num_srs_chest_buffers: 6144
08:14:31.783533 CON phy_init 0 [CTL.YAML] send_static_bfw_wt_all_cplane: 1
08:14:31.783534 CON phy_init 0 [CTL.YAML] ul_pcap_capture_enable: 0
08:14:31.783534 CON phy_init 0 [CTL.YAML] ul_pcap_capture_thread_cpu_affinity: 0
08:14:31.783534 CON phy_init 0 [CTL.YAML] ul_pcap_capture_thread_sched_priority: 0
08:14:31.783534 CON phy_init 0 [CTL.YAML] pcap_logger_ul_cplane_enable: 0
08:14:31.783534 CON phy_init 0 [CTL.YAML] pcap_logger_dl_cplane_enable: 0
08:14:31.783534 CON phy_init 0 [CTL.YAML] pcap_logger_thread_cpu_affinity: 0
08:14:31.783535 CON phy_init 0 [CTL.YAML] pcap_logger_thread_sched_prio: 0
08:14:31.783535 CON phy_init 0 [CTL.YAML] pcap_logger_file_save_dir: .
08:14:31.783535 CON phy_init 0 [CTL.YAML] static_beam_id_start: 1
08:14:31.783536 CON phy_init 0 [CTL.YAML] static_beam_id_end: 16527
08:14:31.783536 CON phy_init 0 [CTL.YAML] dynamic_beam_id_start: 16528
08:14:31.783536 CON phy_init 0 [CTL.YAML] dynamic_beam_id_end: 32767
08:14:31.783536 CON phy_init 0 [CTL.YAML] ul_order_timeout_gpu_log_enable: 1
08:14:31.783536 CON phy_init 0 [CTL.YAML] pusch_workCancelMode: 2
08:14:31.783536 CON phy_init 0 [CTL.YAML] GPU-initiated comms DL: 1
08:14:31.783537 CON phy_init 0 [CTL.YAML] GPU-initiated comms (via CPU): 1
08:14:31.783537 CON phy_init 0 [CTL.YAML] CPU-initiated comms : 0
08:14:31.783537 CON phy_init 0 [CTL.YAML] Cell group: 1
08:14:31.783537 CON phy_init 0 [CTL.YAML] Cell group num: 1
08:14:31.783537 CON phy_init 0 [CTL.YAML] puxchPolarDcdrListSz: 8
08:14:31.783537 CON phy_init 0 [CTL.YAML] split_ul_cuda_streams: 0
08:14:31.783538 CON phy_init 0 [CTL.YAML] serialize_pucch_pusch: 0
08:14:31.783538 CON phy_init 0 [CTL.YAML] bfw_c_plane_chaining_mode: 0
08:14:31.783538 CON phy_init 0 [CTL.YAML] fh_stats_dump_cpu_core: -1
08:14:31.783538 CON phy_init 0 [CTL.YAML] fix_beta_dl: 1
08:14:31.783538 CON phy_init 0 [CTL.YAML] pdump_client_thread: -1
08:14:31.783538 CON phy_init 0 [CTL.YAML] profiler_sec: 0
08:14:31.783538 CON phy_init 0 [CTL.YAML] datalake_address: localhost
08:14:31.783539 CON phy_init 0 [CTL.YAML] dpdk_file_prefix: cuphycontroller
08:14:31.783539 CON phy_init 0 [CTL.YAML] puschrxChestFactorySettingsFilename:
08:14:31.783539 CON phy_init 0 [CTL.YAML] accu_tx_sched_disable: 0
08:14:31.783539 CON phy_init 0 [CTL.YAML] cplane_disable: 0
08:14:31.783539 CON phy_init 0 [CTL.YAML] disable_empw: 0
08:14:31.783540 CON phy_init 0 [CTL.YAML] dlc_alloc_cplane_bfw_txq: 0
08:14:31.783540 CON phy_init 0 [CTL.YAML] dlc_bfw_enable_divide_per_cell: 0
08:14:31.783540 CON phy_init 0 [CTL.YAML] dpdk_verbose_logs: 0
08:14:31.783540 CON phy_init 0 [CTL.YAML] enable_cpu_task_tracing: 1
08:14:31.783540 CON phy_init 0 [CTL.YAML] enable_dl_cqe_tracing: 0
08:14:31.783540 CON phy_init 0 [CTL.YAML] enable_l1_param_sanity_check: 0
08:14:31.783541 CON phy_init 0 [CTL.YAML] enable_ok_tb: 0
08:14:31.783541 CON phy_init 0 [CTL.YAML] enable_prepare_tracing: 1
08:14:31.783541 CON phy_init 0 [CTL.YAML] mCh_segment_proc_enable: 0
08:14:31.783541 CON phy_init 0 [CTL.YAML] pmu_metrics: 3
08:14:31.783541 CON phy_init 0 [CTL.YAML] puschCfo: 1
08:14:31.783541 CON phy_init 0 [CTL.YAML] puschDftSOfdm: 0
08:14:31.783542 CON phy_init 0 [CTL.YAML] puschEnablePerPrgChEst: 0
08:14:31.783542 CON phy_init 0 [CTL.YAML] puschRssi: 1
08:14:31.783542 CON phy_init 0 [CTL.YAML] puschSelectChEstAlgo: 1
08:14:31.783542 CON phy_init 0 [CTL.YAML] puschSelectEqCoeffAlgo: 3
08:14:31.783542 CON phy_init 0 [CTL.YAML] puschSinr: 2
08:14:31.783542 CON phy_init 0 [CTL.YAML] puschTbSizeCheck: 1
08:14:31.783542 CON phy_init 0 [CTL.YAML] puschTdi: 1
08:14:31.783543 CON phy_init 0 [CTL.YAML] puschTo: 1
08:14:31.783543 CON phy_init 0 [CTL.YAML] pusch_deviceGraphLaunchEn: 1
08:14:31.783543 CON phy_init 0 [CTL.YAML] ulc_alloc_cplane_bfw_txq: 0
08:14:31.783543 CON phy_init 0 [CTL.YAML] ulc_bfw_enable_divide_per_cell: 0
08:14:31.783543 CON phy_init 0 [CTL.YAML] ul_rx_pkt_tracing_level: 0
08:14:31.783543 CON phy_init 0 [CTL.YAML] ul_rx_pkt_tracing_level_srs: 0
08:14:31.783543 CON phy_init 0 [CTL.YAML] ul_warmup_frame_count: 8
08:14:31.783545 CON phy_init 0 [CTL.YAML] forcedNumCsi2Bits: 0
08:14:31.783545 CON phy_init 0 [CTL.YAML] pusch_waitTimeOutPostEarlyHarqUs: 3000
08:14:31.783545 CON phy_init 0 [CTL.YAML] pusch_waitTimeOutPreEarlyHarqUs: 3000
08:14:31.783546 CON phy_init 0 [CTL.YAML] validation: 0
08:14:31.783546 CON phy_init 0 [CTL.YAML] cqe_trace_slot_mask: 196800
08:14:31.783546 CON phy_init 0 [CTL.YAML] datalake_samples: 1000000
08:14:31.783546 CON phy_init 0 [CTL.YAML] num_ok_tb_slot: 0
08:14:31.783546 CON phy_init 0 [CTL.YAML] pusch_nMaxLdpcHetConfigs: 32
08:14:31.783546 CON phy_init 0 [CTL.YAML] sendCPlane_dlbfw_backoff_th_ns: 300000
08:14:31.783546 CON phy_init 0 [CTL.YAML] sendCPlane_ulbfw_backoff_th_ns: 300000
08:14:31.783547 CON phy_init 0 [CTL.YAML] ul_order_max_rx_pkts: 256
08:14:31.783547 CON phy_init 0 [CTL.YAML] ul_order_rx_pkts_timeout_ns: 50000
08:14:31.783547 CON phy_init 0 [CTL.YAML] ul_order_timeout_cpu_ns: 8000000
08:14:31.783547 CON phy_init 0 [CTL.YAML] ul_order_timeout_gpu_ns: 8000000
08:14:31.783547 CON phy_init 0 [CTL.YAML] ul_order_timeout_gpu_srs_ns: 5200000
08:14:31.783547 CON phy_init 0 [CTL.YAML] ul_order_timeout_log_interval_ns: 0
08:14:31.783547 CON phy_init 0 [CTL.YAML] ul_srs_aggr3_task_launch_offset_ns: 500000
08:14:31.783547 CON phy_init 0 [CTL.YAML] workers_sched_priority: 95
08:14:31.783548 CON phy_init 0 [CTL.YAML] cqe_trace_cell_mask: 1
08:14:31.783548 CON phy_init 0 [CTL.YAML] Number of Cell Configs: 1
08:14:31.783548 CON phy_init 0 [CTL.YAML] L2Adapter config file: /opt/nvidia/cuBB/cuPHY-CP/cuphycontroller/config/l2_adapter_config_F08_CG1.yaml
08:14:31.783549 CON phy_init 0 [CTL.YAML] Cell name: O-RU 0
08:14:31.783549 CON phy_init 0 [CTL.YAML] MU: 1
08:14:31.783549 CON phy_init 0 [CTL.YAML] ID: 1
08:14:31.783550 CON phy_init 0 [CTL.YAML] Number of MPlane Configs: 1
08:14:31.783550 CON phy_init 0 [CTL.YAML] Mplane ID: 1
08:14:31.783550 CON phy_init 0 [CTL.YAML] VLAN ID: 2
08:14:31.783551 CON phy_init 0 [CTL.YAML] Source Eth Address: b8:ce:f6:fe:62:f4
08:14:31.783552 CON phy_init 0 [CTL.YAML] Destination Eth Address: 20:04:9b:9e:27:a3
08:14:31.783552 CON phy_init 0 [CTL.YAML] NIC port: 0000:38:00.0
08:14:31.783552 CON phy_init 0 [CTL.YAML] RU Type: 3
08:14:31.783553 CON phy_init 0 [CTL.YAML] U-plane TXQs: 1
08:14:31.783553 CON phy_init 0 [CTL.YAML] DL compression method: 1
08:14:31.783553 CON phy_init 0 [CTL.YAML] DL iq bit width: 9
08:14:31.783553 CON phy_init 0 [CTL.YAML] UL compression method: 1
08:14:31.783553 CON phy_init 0 [CTL.YAML] UL iq bit width: 9
08:14:31.783554 CON phy_init 0 [CTL.YAML]
08:14:31.783554 CON phy_init 0 [CTL.YAML] Flow list SSB/PBCH:
08:14:31.783554 CON phy_init 0 [CTL.YAML] 8
08:14:31.783554 CON phy_init 0 [CTL.YAML] 0
08:14:31.783554 CON phy_init 0 [CTL.YAML] 1
08:14:31.783555 CON phy_init 0 [CTL.YAML] 2
08:14:31.783555 CON phy_init 0 [CTL.YAML] Flow list PDCCH:
08:14:31.783555 CON phy_init 0 [CTL.YAML] 8
08:14:31.783555 CON phy_init 0 [CTL.YAML] 0
08:14:31.783555 CON phy_init 0 [CTL.YAML] 1
08:14:31.783555 CON phy_init 0 [CTL.YAML] 2
08:14:31.783556 CON phy_init 0 [CTL.YAML] Flow list PDSCH:
08:14:31.783556 CON phy_init 0 [CTL.YAML] 8
08:14:31.783556 CON phy_init 0 [CTL.YAML] 0
08:14:31.783556 CON phy_init 0 [CTL.YAML] 1
08:14:31.783556 CON phy_init 0 [CTL.YAML] 2
08:14:31.783556 CON phy_init 0 [CTL.YAML] Flow list CSIRS:
08:14:31.783556 CON phy_init 0 [CTL.YAML] 8
08:14:31.783557 CON phy_init 0 [CTL.YAML] 0
08:14:31.783557 CON phy_init 0 [CTL.YAML] 1
08:14:31.783557 CON phy_init 0 [CTL.YAML] 2
08:14:31.783557 CON phy_init 0 [CTL.YAML] Flow list PUSCH:
08:14:31.783557 CON phy_init 0 [CTL.YAML] 8
08:14:31.783557 CON phy_init 0 [CTL.YAML] 0
08:14:31.783557 CON phy_init 0 [CTL.YAML] 1
08:14:31.783558 CON phy_init 0 [CTL.YAML] 2
08:14:31.783558 CON phy_init 0 [CTL.YAML] Flow list PUCCH:
08:14:31.783558 CON phy_init 0 [CTL.YAML] 8
08:14:31.783558 CON phy_init 0 [CTL.YAML] 0
08:14:31.783558 CON phy_init 0 [CTL.YAML] 1
08:14:31.783558 CON phy_init 0 [CTL.YAML] 2
08:14:31.783558 CON phy_init 0 [CTL.YAML] Flow list SRS:
08:14:31.783559 CON phy_init 0 [CTL.YAML] 8
08:14:31.783559 CON phy_init 0 [CTL.YAML] 0
08:14:31.783559 CON phy_init 0 [CTL.YAML] 1
08:14:31.783559 CON phy_init 0 [CTL.YAML] 2
08:14:31.783559 CON phy_init 0 [CTL.YAML] Flow list PRACH:
08:14:31.783559 CON phy_init 0 [CTL.YAML] 15
08:14:31.783560 CON phy_init 0 [CTL.YAML] 7
08:14:31.783560 CON phy_init 0 [CTL.YAML] 0
08:14:31.783560 CON phy_init 0 [CTL.YAML] 1
08:14:31.783560 CON phy_init 0 [CTL.YAML] PUSCH TV: /opt/nvidia/cuBB/testVectors/cuPhyChEstCoeffs.h5
08:14:31.783560 CON phy_init 0 [CTL.YAML] SRS TV: /opt/nvidia/cuBB/testVectors/cuPhyChEstCoeffs.h5
08:14:31.783560 CON phy_init 0 [CTL.YAML] Section_3 time offset: 58369
08:14:31.783560 CON phy_init 0 [CTL.YAML] nMaxRxAnt: 4
08:14:31.783561 CON phy_init 0 [CTL.YAML] PUSCH PRBs Stride: 273
08:14:31.783561 CON phy_init 0 [CTL.YAML] PRACH PRBs Stride: 12
08:14:31.783561 CON phy_init 0 [CTL.YAML] SRS PRBs Stride: 12
08:14:31.783561 CON phy_init 0 [CTL.YAML] PUSCH nMaxPrb: 273
08:14:31.783561 CON phy_init 0 [CTL.YAML] PUSCH nMaxRx: 4
08:14:31.783561 CON phy_init 0 [CTL.YAML] UL Gain Calibration: 48.68
08:14:31.783561 CON phy_init 0 [CTL.YAML] Lower guard bw: 845
08:14:35.091025 CON phy_init 0 [CTL.SCF] Network interface for PCIe address 0000:38:00.0 : aerial00
08:14:35.091086 CON phy_init 0 [APP.UTILS] PHC clock: 1769674475.91082288
08:14:35.091120 CON phy_init 0 [APP.UTILS] CLOCK_TAI: 1769674475.91113967
08:14:35.091121 CON phy_init 0 [APP.UTILS] CLOCK_REALTIME: 1769674475.91113910
08:14:35.091122 CON phy_init 0 [APP.UTILS] TAI/REALTIME offset: 0 seconds
08:14:35.096843 WRN phy_init 0 [DRV.WORKER] Unable to set pmu_type=3 for non Grace system. Disabling pmu_metrics.
08:14:35.096858 WRN phy_init 0 [DRV.WORKER] Unable to set pmu_type=3 for non Grace system. Disabling pmu_metrics.
08:14:35.096859 WRN phy_init 0 [DRV.WORKER] Unable to set pmu_type=3 for non Grace system. Disabling pmu_metrics.
08:14:35.096864 WRN phy_init 0 [DRV.WORKER] Unable to set pmu_type=3 for non Grace system. Disabling pmu_metrics.
08:14:35.096865 WRN phy_init 0 [DRV.WORKER] Unable to set pmu_type=3 for non Grace system. Disabling pmu_metrics.
08:14:35.096865 WRN phy_init 0 [DRV.WORKER] Unable to set pmu_type=3 for non Grace system. Disabling pmu_metrics.
08:14:35.096865 WRN phy_init 0 [DRV.WORKER] Unable to set pmu_type=3 for non Grace system. Disabling pmu_metrics.
08:14:35.098184 CON phy_init 0 [DRV.CTX] CUDA_DEVICE_MAX_CONNECTIONS 8
08:14:35.098184 CON phy_init 0 [DRV.CTX] use_green_contexts 0
EAL: Detected CPU lcores: 64
EAL: Detected NUMA nodes: 2
EAL: Detected shared linkage of DPDK
EAL: Multi-process socket /var/run/dpdk/cuphycontroller/mp_socket
EAL: Selected IOVA mode 'PA'
EAL: 64 hugepages of size 2097152 reserved, but no mounted hugetlbfs found for that size
EAL: VFIO support initialized
EAL: Probe PCI driver: gpu_cuda (10de:27b8) device: 0000:27:00.0 (socket 0)
EAL: Probe PCI driver: mlx5_pci (15b3:101d) device: 0000:38:00.0 (socket 0)
08:14:36.810353 CON phy_init 0 [DRV.FH] Dynamic beam id start: 16528, end: 32767, num of beam ids per slots: 2192, number of consecutive slots with unique of beam ids: 7
[08:14:37:446767][6687][DOCA][ERR][doca_gpunetio.cpp:461][doca_gpu_dmabuf_fd] cuMemGetHandleForAddressRange returned 1.
08:14:37.550692 CON phy_init 0 [FH.DOCA] doca_gpu_dmabuf_fd returned 0 (DOCA_SUCCESS is 0)
08:14:37.550703 CON phy_init 0 [FH.DOCA] Mapping transmit queue buffer (0x7f923e000000 size 4294967296B dmabuf fd 203) with dmabuf mode
PCAP_LOGGER Initialized
gRPC Server listening on 0.0.0.0:50051
08:14:42.301590 CON phy_init 0 [CTL.SCF] ====> PhyDriver initialized!
08:14:42.302859 CON phy_init 0 [NVIPC:YAML] nv_ipc_parse_yaml_node: PCAP msg_filter: enable all messages: 0x00-0xFF
08:14:42.302891 CON phy_init 0 [NVIPC:YAML] nv_ipc_parse_yaml_node: PCAP cell_filter: enable all cells 0-255
08:14:42.303305 CON phy_init 0 [NVIPC.DEBUG] nv_ipc_debug_open: prefix=nvipc fapi_type=1 nvipc_version=25.3.0 OK
08:14:42.311184 CON 6754 0 [NVIPC.DEBUG] pcap_shm_caching_thread_func: thread [nvipc_pcap_shm] started on CPU core [10] ...
08:14:42.384301 CON phy_init 0 [NVIPC.SHM] nvipc server initialized
08:14:42.384410 CON phy_init 0 [NVIPC.SHM] shm_ipc_open: forward_enable=0 fw_max_msg_buf_count=1365 fw_max_data_buf_count=341
08:14:42.384414 CON phy_init 0 [NVIPC.SHM] create_shm_nv_ipc_interface: OK. buf_size: cpu_msg=15000 cpu_data=576000 cpu_large=4096000
08:14:42.384427 CON phy_init 0 [L2A.TRANSPORT] phy_mac_transport[0] created. phy_cell_map.size=0 mac_cell_map.size=0 mapped=false cell_num=1
08:14:42.384432 CON phy_init 0 [L2A.TRANSPORT] init: loaded 1 nvipc instance, total_cell_num=1
08:14:42.384579 CON phy_init 0 [L2A.MODULE] PHY_module: transport_num=1 total_cell_num=1
08:14:42.406354 CON 6755 0 [NVIPC.EFD] [nvipc][core 00 ] share event_fd thread info: sched_policy=0 sched_priority=0
08:14:42.406398 CON 6755 0 [NVIPC.EFD] [nvipc] Listening for nvipc client to connect ...
08:14:43.305782 CON UlPhyDriver02 0 [DRV.WORKER] Thread UlPhyDriver02(worker_default) on CPU 2 initialized fmtlog
08:14:43.305786 CON DlPhyDriver07 0 [DRV.WORKER] Thread DlPhyDriver07(worker_default) on CPU 7 initialized fmtlog
08:14:43.305786 CON UlPhyDriver03 0 [DRV.WORKER] Thread UlPhyDriver03(worker_default) on CPU 3 initialized fmtlog
08:14:43.305802 CON DlPhyDriver06 0 [DRV.WORKER] Thread DlPhyDriver06(worker_default) on CPU 6 initialized fmtlog
08:14:43.305833 CON DlPhyDriver05 0 [DRV.WORKER] Thread DlPhyDriver05(worker_default) on CPU 5 initialized fmtlog
08:14:43.305865 CON DebugWorker09 0 [DRV.WORKER] Thread DebugWorker09(worker_default) on CPU 9 initialized fmtlog
08:14:43.305874 CON DlPhyDriver04 0 [DRV.WORKER] Thread DlPhyDriver04(worker_default) on CPU 4 initialized fmtlog
Lookup table populated with 13104 entries
08:14:46.365318 CON phy_main 0 [CTL.SCF] cuPHYController configured for 1 cells
08:14:46.365320 CON phy_main 0 [CTL.SCF] ====> cuPHYController initialized, L1 is ready!
08:14:46.365336 CON phy_main 0 [CTL.STARTUP_TIMES] {TI PERCENTAGE} <cuphycontroller main> Start Main:0.0,Parse Cuphycontroller YAML:0.0,Init nvlog:0.2,Cuda Set Device:1.7,Cuphy PTI Init:20.9,Init PHYDriver:49.3,Init cuphydriver:0.0,Make PHYDriverProxy:0.0,Init SCF FAPI:0.0,Create PHY_group:27.8,Start PHY_group:0.0, (total: 14623914.7us),
08:14:46.365343 CON phy_main 0 [CTL.STARTUP_TIMES] {TI DURATION} <cuphycontroller main> Start Main:6940.327,Parse Cuphycontroller YAML:2997.062,Init nvlog:32218.934,Cuda Set Device:251339.094,Cuphy PTI Init:3056222.970,Init PHYDriver:7210468.115,Init cuphydriver:0.359,Make PHYDriverProxy:22.419,Init SCF FAPI:5.222,Create PHY_group:4063445.613,Start PHY_group:254.618,
08:14:46.365345 CON phy_main 0 [CTL.STARTUP_TIMES] {TI TIMESTAMPS} <cuphycontroller main> Start Main:1769674471741406153,Parse Cuphycontroller YAML:1769674471748346480,Init nvlog:1769674471751343542,Cuda Set Device:1769674471783562476,Cuphy PTI Init:1769674472034901570,Init PHYDriver:1769674475091124540,Init cuphydriver:1769674482301592655,Make PHYDriverProxy:1769674482301593014,Init SCF FAPI:1769674482301615433,Create PHY_group:1769674482301620655,Start PHY_group:1769674486365066268,End Main:1769674486365320886,
08:14:46.365368 CON 6757 0 [L2A.MODULE] cell_update_thread_func: OAM thread affinity set to cpu core 0
08:14:46.373118 CON msg_processing 0 [L2A.MODULE] Thread thread_func on CPU 8 initialized fmtlog
08:15:15.728508 CON 6755 0 [NVIPC.EFD] [nvipc] nvipc unix socket server connected
08:15:15.728545 CON 6755 0 [NVIPC.EFD] [nvipc] Received peer event_fd: 209
08:15:15.928618 CON 6755 0 [NVIPC.EFD] Share event_fd succeed: efd_tx=209, efd_rx=217
08:15:15.928619 CON 6755 0 [NVIPC.EFD] [nvipc] Listening for nvipc client to connect ...
08:15:16.761420 CON msg_processing 0 [SCF.PHY] on_config_request: CONFIG.req received for cell_id=0 numTLVs=69 state=0
08:15:16.761686 CON msg_processing 0 [SCF.PHY] update_phy_stat_configs_l1: PHY Cell Id = 41, M-Plane Id= 1
08:15:16.782737 CON msg_processing 0 [DRV.PUSCH] tvStatPrms: PUSCH enableDeviceGraphLaunch=1 enableCsiP2Fapiv3 = 1 nMaxLdpcHetConfigs = 32
08:15:16.782740 CON msg_processing 0 [DRV.PUSCH] Timeout values for wait kernels are 3000us and 3000us
08:15:16.782742 CON msg_processing 0 [DRV.PUSCH] static_params.nMaxPrb: 273
08:15:16.782743 CON msg_processing 0 [DRV.PUSCH] static_params.nMaxRx: 4
08:15:16.811965 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 54.710 MiB for cuPHY PUSCH channel object (0x501954c6000).
08:15:16.811983 CON msg_processing 0 [CUPHY.PUSCH_RX] PuschRx: Running with eqCoeffAlgo 3
08:15:16.826186 CON msg_processing 0 [DRV.PUSCH] tvStatPrms: PUSCH enableDeviceGraphLaunch=1 enableCsiP2Fapiv3 = 1 nMaxLdpcHetConfigs = 32
08:15:16.826187 CON msg_processing 0 [DRV.PUSCH] Timeout values for wait kernels are 3000us and 3000us
08:15:16.826187 CON msg_processing 0 [DRV.PUSCH] static_params.nMaxPrb: 273
08:15:16.826187 CON msg_processing 0 [DRV.PUSCH] static_params.nMaxRx: 4
08:15:16.834659 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 54.710 MiB for cuPHY PUSCH channel object (0x501954d2000).
08:15:16.834664 CON msg_processing 0 [CUPHY.PUSCH_RX] PuschRx: Running with eqCoeffAlgo 3
08:15:16.855367 CON msg_processing 0 [DRV.PUSCH] tvStatPrms: PUSCH enableDeviceGraphLaunch=1 enableCsiP2Fapiv3 = 1 nMaxLdpcHetConfigs = 32
08:15:16.855368 CON msg_processing 0 [DRV.PUSCH] Timeout values for wait kernels are 3000us and 3000us
08:15:16.855369 CON msg_processing 0 [DRV.PUSCH] static_params.nMaxPrb: 273
08:15:16.855369 CON msg_processing 0 [DRV.PUSCH] static_params.nMaxRx: 4
08:15:16.863448 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 54.710 MiB for cuPHY PUSCH channel object (0x501954de000).
08:15:16.863453 CON msg_processing 0 [CUPHY.PUSCH_RX] PuschRx: Running with eqCoeffAlgo 3
08:15:16.877427 CON msg_processing 0 [DRV.PUSCH] tvStatPrms: PUSCH enableDeviceGraphLaunch=1 enableCsiP2Fapiv3 = 1 nMaxLdpcHetConfigs = 32
08:15:16.877427 CON msg_processing 0 [DRV.PUSCH] Timeout values for wait kernels are 3000us and 3000us
08:15:16.877428 CON msg_processing 0 [DRV.PUSCH] static_params.nMaxPrb: 273
08:15:16.877428 CON msg_processing 0 [DRV.PUSCH] static_params.nMaxRx: 4
08:15:16.885405 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 54.710 MiB for cuPHY PUSCH channel object (0x501954ea000).
08:15:16.885410 CON msg_processing 0 [CUPHY.PUSCH_RX] PuschRx: Running with eqCoeffAlgo 3
08:15:16.888830 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 3.344 MiB for cuPHY PUCCH channel object (0x50195399a00).
08:15:16.890764 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 3.344 MiB for cuPHY PUCCH channel object (0x5019539a800).
08:15:16.891670 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 3.344 MiB for cuPHY PUCCH channel object (0x5019539b600).
08:15:16.892537 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 3.344 MiB for cuPHY PUCCH channel object (0x5019539c400).
08:15:16.896277 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.182 MiB for cuPHY PRACH channel object (0x50196d0a500).
08:15:16.897810 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.182 MiB for cuPHY PRACH channel object (0x50196d0a880).
08:15:16.904122 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 98.130 MiB for cuPHY PDSCH channel object (0x50196a43000).
08:15:16.907904 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 98.130 MiB for cuPHY PDSCH channel object (0x50196a46c00).
08:15:16.911670 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 98.130 MiB for cuPHY PDSCH channel object (0x50196a48400).
08:15:16.915366 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 98.130 MiB for cuPHY PDSCH channel object (0x50196a49c00).
08:15:16.919245 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 98.130 MiB for cuPHY PDSCH channel object (0x50196a4b400).
08:15:16.923202 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 98.130 MiB for cuPHY PDSCH channel object (0x50196a4cc00).
08:15:16.927267 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 98.130 MiB for cuPHY PDSCH channel object (0x50196a4e400).
08:15:16.932040 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 98.130 MiB for cuPHY PDSCH channel object (0x5019c850000).
08:15:16.936112 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 98.130 MiB for cuPHY PDSCH channel object (0x5019c851800).
08:15:16.940222 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 98.130 MiB for cuPHY PDSCH channel object (0x5019c853000).
08:15:16.942664 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.001 MiB for cuPHY SSB channel object (0x50196d55100).
08:15:16.942938 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.001 MiB for cuPHY SSB channel object (0x50196d53c00).
08:15:16.943124 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.001 MiB for cuPHY SSB channel object (0x50196d54d80).
08:15:16.943291 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.001 MiB for cuPHY SSB channel object (0x50196d55480).
08:15:16.943450 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.001 MiB for cuPHY SSB channel object (0x50196d55800).
08:15:16.943613 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.001 MiB for cuPHY SSB channel object (0x50196d55b80).
08:15:16.943793 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.001 MiB for cuPHY SSB channel object (0x50196d55f00).
08:15:16.943958 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.001 MiB for cuPHY SSB channel object (0x50196d56280).
08:15:16.944118 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.001 MiB for cuPHY SSB channel object (0x50196d56600).
08:15:16.944275 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.001 MiB for cuPHY SSB channel object (0x50196d56980).
08:15:16.944600 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.607 MiB for cuPHY PDCCH channel object (0x50196edc800).
08:15:16.944851 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.607 MiB for cuPHY PDCCH channel object (0x50196edcd00).
08:15:16.945178 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.607 MiB for cuPHY PDCCH channel object (0x50196edd200).
08:15:16.945423 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.607 MiB for cuPHY PDCCH channel object (0x50196edd700).
08:15:16.946522 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.607 MiB for cuPHY PDCCH channel object (0x50196eddc00).
08:15:16.946925 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.607 MiB for cuPHY PDCCH channel object (0x50196ede100).
08:15:16.947187 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.607 MiB for cuPHY PDCCH channel object (0x50196ede600).
08:15:16.947447 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.607 MiB for cuPHY PDCCH channel object (0x50196edeb00).
08:15:16.948512 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.607 MiB for cuPHY PDCCH channel object (0x50196edf000).
08:15:16.948804 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 1.607 MiB for cuPHY PDCCH channel object (0x50196edf500).
08:15:16.949048 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.093 MiB for cuPHY CSIRS channel object (0x5019d35e480).
08:15:16.949204 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.093 MiB for cuPHY CSIRS channel object (0x5019d35e780).
08:15:16.949378 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.093 MiB for cuPHY CSIRS channel object (0x5019d35ea80).
08:15:16.949508 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.093 MiB for cuPHY CSIRS channel object (0x5019d35ed80).
08:15:16.949630 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.093 MiB for cuPHY CSIRS channel object (0x5019d35f080).
08:15:16.949738 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.093 MiB for cuPHY CSIRS channel object (0x5019d35f380).
08:15:16.949878 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.093 MiB for cuPHY CSIRS channel object (0x5019d35f680).
08:15:16.950019 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.093 MiB for cuPHY CSIRS channel object (0x5019d35f980).
08:15:16.950146 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.093 MiB for cuPHY CSIRS channel object (0x5019d35fc80).
08:15:16.950270 CON msg_processing 0 [CUPHY.MEMFOOT] cuphyMemoryFootprint - GPU allocation: 0.093 MiB for cuPHY CSIRS channel object (0x5019d510080).
08:15:16.950284 CON msg_processing 0 [DRV.API] Update cell: mplane_id=1 dl_grid_sz=273
08:15:16.950285 CON msg_processing 0 [DRV.API] Update cell: mplane_id=1 ul_grid_sz=273
08:15:16.950301 CON msg_processing 0 [SCF.PHY] on_config_request: create_cell_configs for cell_id=0 phy_cell_id=41 returned error_code=0
08:15:16.950319 CON msg_processing 0 [SCF.PHY] send_cell_config_response: Send CONFIG.response: cell_id=0 error_code=0x0
08:15:16.950356 CON msg_processing 0 [L2A.TRANSPORT] wrapper: configured_cells_mask=0x1 expected_mask=0x1 all_cells_configured=true - all cells configured
08:15:16.950398 CON msg_processing 0 [SCF.PHY] on_cell_start_request: Cell 0 Received START.request, sending START.response... phy_cell_id=41
08:15:16.950911 CON msg_processing 0 [L2A.TRANSPORT] wrapper: configured_cells_mask=0x1 expected_mask=0x1 all_cells_configured=true - all cells configured
08:15:16.959348 CON timer_thread 0 [L2A.TICK] Thread slot_indication_thread_sleep_method initialized fmtlog
08:15:16.959355 CON timer_thread 0 [L2A.TICK] PTP Configs: gps_alpha: 0 gps_beta: 0
08:15:16.959362 CON timer_thread 0 [L2A.TICK] Start time: tick=1769674516959350821, seconds since epoch = 1769674516, nanoseconds = 959350821
08:15:16.959363 CON timer_thread 0 [L2A.TICK] FIRST tick scheduled for: tick=1769674520120000000, seconds since epoch = 1769674520, nanoseconds = 120000000
/opt/nvidia/cuBB/testBenches/phase4_test_scripts/run2_cuPHYcontroller.sh: line 270: 6685 Segmentation fault sudo -E $WITH_TIMEOUT $GDB_SCRIPT "$cuBB_SDK/$BUILD_DIR/cuPHY-CP/cuphycontroller/examples/cuphycontroller_scf" $CONTROLLER_MODE
The detailed configuration and log files are attached. Could you please give some suggestions for next step
phy.log (33.0 KB)
ru.log (396.8 KB)
testmac.log (15.1 KB)
config.yaml.txt (24.3 KB)
cuphycontroller_F08_GL4.yaml.txt (30.1 KB)
test_mac_config.yaml.txt (2.7 KB)