Software Configuration for Tegra K1 with Additional USB3.0 Port

We made a custom board based on the Jetson Board with some modifications. The only issue that we are having is that we added a 2nd USB3.0 port. It is connected to PEX_USB3_TX1N, PEX_USB3_TX1N, PEX_USB3_RX1N, PEX_USB3_RX1N and USB1_DN, USB1_DP. It works but in USB2.0 mode.

We tried editing ss_portmap property in the DTS and set it to 0x12 and also tried to 0x2 but still shows up as USB2.0. The standard USB3.0 port that is also on the Jetson Board does show up as USB3.0 but the new one which we added shows up as USB2.0.

I don’t think that the issue has to do with hardware since the USB port functions appropriately, the issue has to do with software configuration (getting the port to run as USB3.0).

The custom board is running smoothly on Ubuntu 14.04 with Linux for Tegra 21.4 Kernel 3.10. We haven’t modified the kernel, just the DTV.

The second SS Port is disabled by default.

You can try the following changes:

  1. file /boot/extlinux/extlinux.conf, usb_port_owner_info=3 lane_owner_info=6
  2. file kernel/arch/arm/boot/dts/tegra124-jetson_tk1-pm375-000-c00-00.dts, in ‘xusb@7009000’, nvidia,ss_portmap = <0x12>; (NOTE: if you have changed the DTS part for your own board, please change the corresponding code.)
  3. file kernel/arch/arm/mach-tegra/board-ardbeg.c in function ardbeg_xusb_init, the following part code:
    } else if (board_info.board_id == BOARD_PM375) {
    if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB))
    xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P0);
    if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB))
    xusb_pdata.portmap &= ~(TEGRA_XUSB_USB2_P2 |
    TEGRA_XUSB_USB2_P1 | TEGRA_XUSB_SS_P0);
    //xusb_pdata.portmap &= ~(TEGRA_XUSB_SS_P1);
    } else {
    /* Ardbeg */
    if (board_info.board_id == BOARD_E1781) {
    pr_info(“Shield ERS-S. 0x%x\n”, board_info.board_id);
    This code ‘xusb_pdata.portmap &= ~(TEGRA_XUSB_SS_P1);’ must be commented out. (NOTE: same as before, if your board changed the board ID, please check the corresponding code.)

Hi edli,

we need to enable both USB host port on our customized board. Here is how USB2/USB3/USB_VBUS_EN grouped together

  1. USB_VBUS_EN1 + USB1_D_P/N + PEX_USB3_RX/Tx0_N/P (port 0)
  2. USB_VBUS_EN2 + USB2_D_P/N + PEX_USB3_Rx/Tx1_N/P (port 1)

We have USB3 port 1 working (USB_VBUS_EN2 is asserted high and etc), however the USB port 0 doesn’t work at all, neither the USB2.0 portion on that port 0.

here is our device tree file for USB, any idea about enabling the extra USB host port (either USB3 or USB2)?

xusb@70090000 {
		compatible = "nvidia,tegra124-xhci";
		reg = <0x0 0x70090000 0x0 0x8000 0x0 0x70098000 0x0 0x1000 0x0 0x70099000 0x0 0x1000 0x0 0x7009f000 0x0 0x1000>;
		interrupts = <0x0 0x27 0x4 0x0 0x28 0x4 0x0 0x31 0x4 0x0 0x61 0x4 0x0 0x15 0x4>;
		nvidia,memory-clients = <0x14>;
		status = "okay";
		hvdd_usb-supply = <0xe>;
		avdd_pll_utmip-supply = <0xa>;
		vddio_hsic-supply = <0x11>;
		avddio_usb-supply = <0x15>;
		nvidia,gpio_ss1_sata = <0x0>;
		nvidia,portmap = <0x402>;
		nvidia,ss_portmap = <0x27>;
		nvidia,lane_owner = <0x2>;
		nvidia,ulpicap = <0x0>;
		usb_vbus2-supply = <0x16>;
	}
	usb@7d004000 {
		compatible = "nvidia,tegra124-ehci", "nvidia,tegra20-ehci", "usb-ehci";
		reg = <0x0 0x7d004000 0x0 0x4000>;
		interrupts = <0x0 0x15 0x4>;
		nvidia,memory-clients = <0xe>;
		nvidia,has-hostpc;
		status = "okay";
		avdd_usb-supply = <0xe>;
		avdd_pll_utmip-supply = <0xa>;
	};

	usb@7d008000 {
		compatible = "nvidia,tegra124-ehci", "nvidia,tegra20-ehci", "usb-ehci";
		reg = <0x0 0x7d008000 0x0 0x4000>;
		interrupts = <0x0 0x61 0x4>;
		nvidia,memory-clients = <0xe>;
		nvidia,has-hostpc;
		status = "okay";
		avdd_usb-supply = <0xe>;
		avdd_pll_utmip-supply = <0xa>;
	};;

This is the last hw/sw hurdle before production release. Any further input on how best to enable both USB host ports?

Alan

Hello,
Please follow the steps pasted by ‘edli1983’ @ #2. That covers the 2 USB SS ports changes in Jetson. With those changes, if SS ports still fail to work, please provide the following information.

  1. USB part schematic. (we need know USB HS/SS port map.)
  2. Kernel log when a USB SS device attached to both USB SS port in Jetson. (Also, lsusb result is welcomed.)

br
Chenjian

i face the same problem.is there any solution for that?