Hello,
USB3.0 composed of usbss2 and usb2 is only attached to usb2.0. is this right?
Thank you.
You can refer to the schematic to confirm that.
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Hello, @WayneWWW
Attached is the circuit for USBSS2_RX_P/N, USBSS2_TX_P/N.
Our Jetson Orin Nano Carrier Board USB3.0 Interface:
USBSS2_RX_P : SODIMM #53 PIN
USBSS2_RX_N : SODIMM #51 PIN
USBSS2_TX_P : SODIMM #59 PIN
USBSS2_TX_N : SODIMM #57 PIN
Configure USB3.0 by directly connecting SODIMM #51, 53, 57, 59 PIN without using USB HUB chip
In this case, how should I implement the S/W? What if I need to modify the device tree? I checked the design guide, but there was no information about the device tree.
Jetson Orin Nano Carrier Dev Kit Board USB3.0 Interface:
USBSS2_RX_P : SODIMM #53 PIN (TP100)
USBSS2_RX_N : SODIMM #51 PIN (TP101)
USBSS2_TX_P : SODIMM #59 PIN (TP102)
USBSS2_TX_N : SODIMM #57 PIN (TP103)
Available only as TP100 to TP103.
Thank you.
Hi,
Design guide is always hardware info. For software side, it will be in developer guide document.
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Trivia: USB2 and earlier used a single controller with legacy modes. USB3 is a dedicated controller. When a port is capable of both USB2 and USB3, software (including device tree, and perhaps sensing pins) is used to properly route to either the USB3 controller, or to a USB2 and legacy controller.
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Hello, @WayneWWW
By reviewing the contents of hardware/nvidia/platform/t23x/p3768/kernel-dts/cvb/tegra234-p3768-0000-a0.dtsi and assuming
usb2-0 in dtsi
USB0_D_P: 111 (sodimm number)
USB0_D_N: 109
usb2-1 is
USB1_D_P: 117
USB1_D_N: 115
usb2-2 is
USB2_D_P: 123
USB2_D_N: 121
is understood as pointing to
usb3-0 is
USBSS0_RX_P: 163
USBSS0_RX_N: 161
USBSS0_TX_P: 168
USBSS0_TX_N: 166
usb3-1 is
DP0_TXD0_P(USBSS1_RX_P) : 41
DP0_TXD0_N(USBSS1_RX_N) : 39
DP0_TXD1_P(USBSS1_TX_P) : 47
DP0_TXD1_N (USBSS1_TX_N) : 35
usb3-2 is
DP0_TXD2_P(USBSS2_RX_P) : 53
DP0_TXD2_N(USBSS2_RX_N) : 51
DP0_TXD3_P(USBSS2_TX_P) : 59
DP0_TXD3_N(USBSS2_TX_N) : 57
is understood as pointing to
Of these, currently USB 3.0 does not work,
Combination of USB2_D_P, USB2_D_N, USBSS2_RX_P, USBSS2_RX_N, USBSS2_TX_P, USBSS2_TX_N
To attempt to enable USB 3.0, I modified hardware/nvidia/platform/t23x/p3768/kernel-dts/cvb/tegra234-p3768-0000-a0.dtsi as shown in the attached file.
tegra234-p3767-0004-p3768-0000-a0.dtb was applied,
tegra-xudc 3550000.xudc: failed to get usbphy-2: -517
Message repeats, USB 3.0 not enabled.
Need to check if the dtsi is correct
dtsi file is attached.
tegra234-p3768-0000-a0.dtsi (7.2 KB)
Thank you.
You can directly check you finalized dtb file instead of dtsi file.
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Hello,
Could you please check the above schematic and the attached dtsi changes to see if the settings for using usb3.0 are set well?
Thank you.
Sorry, it is actually not a precise way to check your dtsi file.
You should convert your dtb file back to dts file and share it here. I am willing to check your dts file but not dtsi file. Hope you could understand what I mean here.
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Hello, @WayneWWW
Yes, since the final application is the dtb file, you need to make sure that the settings for using usb3.0 are properly set for dtb.
I will attach the dts created by decompiling the generated dtb to dtc.
I’d appreciate it if you could tell me which part of that file is wrong.
Thank you.
Also, What is the status of all the ports in use here?
Are they all running as host mode or you need something to be device mode? You cannot just give a part of schematic and tell me you want to find out the answer. It is totally not sufficient.
Fore example, you said you hit tegra-xudc 3550000.xudc error. But this driver is for usb device mode. So which port here is device mode? If it is device mode, is it otg or just pure device mode?
I don’t know or your board. You only gave me few lines and and partial schematic which does not help either.
Not able to reply your question.
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What does that mean if I need then you can send me more???
You should give me the whole usb configuration from the beginning.
Where is the otg part schematic? You don’t want to care about the function of that otg port?
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Your schematic does not match to what you said… What are you doing exactly?
Are you sharing me a NV devkit schematic for me to refer?
Is the block diagram in the first few page a correct one to check?
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Hello,
Your schematic does not match to what you said
=> Which part doesn’t match what I said?
we didn’t use the usb hub chip
It’s a custom carrierboard, not a devkit.
You can refer to the contents below.
Thank you.
Hi,
Please directly give me the same thing your custom board is using but not something copy from NV devkit …
For example, below diagram is from your pdf file. If this is just a copy from devkit, then it is wasting time to read. Please share correct info.
For example,
Your content is still not helping. For example, you told me you are not using usb hub. But you asked me to refer to below and below is still USB type A (hub) and even M.2.
Also, that page 5 and page 6 does not provide any helpful content here.
Do you really understand what we need here? I need the whole connection of usb part. The tegra side and the connector side and it has to match what you are using.
You don’t need to send a NVIDIA document to a NVIDIA engineer…we already have same thing here…
Hello,
Have you checked pages 15 and 16?
There is a 2-port type on page 15 and a 1-port (usb-c) type on page 16.
Thank you.
Hi
Page 16 has no type C…
Also, do you use fusb301 on your board or not…
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Hello,
The schemtic was made from the circuit of Orin-nano development kit.
- I removed the USB HUB chip
- The host port of USB HUB chip (USB1_AP_N, USB1_AP_P, USBSS0_RX_N, USBSS0_RX_P, USBSS0_TX_N, USBSS0_TX_P is connected to a port of USB-Type-A.
- The USB port of USB2_AP_N, USB2_AP_P from M.2 connector and USBSS2_RX_N, USBSS2_RX_P, USBSS2_TX_N, USBSS2_TX_P from TP100, TP101, TP102, TP103 is connected to the other port of USB-Type-A.
I just change the circuit diagram from Orin-nano development kit. So please ignore the image and comment from the orignal circuit.
Hi,
You are still not in the situation.
USB requires a fully correct one to make it work. For example, I need not only your info about 2 type A but I also need the info of how you implement your otg port.
Every usb port must be configured correctly so that they can work fine. For example, if usb device port is configured wrong, then your type A port may have problem too.
That is why I need to know if the otg part in the schematic is still correct. Also, not many users use fusb301 to implement type C port either. That is why I need to know if you also use fusb301 too…
- The host port of USB HUB chip (USB1_AP_N, USB1_AP_P, USBSS0_RX_N, USBSS0_RX_P, USBSS0_TX_N, USBSS0_TX_P is connected to a port of USB-Type-A.
ok, type A
The USB port of USB2_AP_N, USB2_AP_P from M.2 connector and USBSS2_RX_N, USBSS2_RX_P, USBSS2_TX_N, USBSS2_TX_P from TP100, TP101, TP102, TP103 is connected to the other port of USB-Type-A.
ok, type A again.
So where is your otg part? Where should I refer to?
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Hello,
otg port does not changed from orin nano devkit carrierboard.
Thank you.