Disable all the usb3.0 in Jetson Orin NX

I want to disable all the USB3.0 port of my orin nx carrier board, and i delete all the usb3.0 term in the device tree file cub/tegra234-p3768-0000-a0.dtsi
like this:

/*

  • Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
  • This program is free software; you can redistribute it and/or modify
  • it under the terms of the GNU General Public License as published by
  • the Free Software Foundation; version 2 of the License.
  • This program is distributed in the hope that it will be useful, but WITHOUT
  • ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  • FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  • more details.
    */
    include <dt-bindings/gpio/tegra234-gpio.h>
    include “dt-bindings/input/input.h”
    include “tegra234-p3768-0000-a0-pwm-fan.dtsi”
    include “tegra234-p3768-0000-a0-pcie.dtsi”
    include “tegra234-p3768-0000-a0-fixed-regulator.dtsi”
    include “tegra234-p3768-audio.dtsi”
    include “tegra234-p3768-camera-rbpcv3-imx477.dtsi”
    include “tegra234-p3768-camera-rbpcv2-imx219.dtsi”

/ {
gpio-keys {
compatible = “gpio-keys”;
gpio-keys,name = “gpio-keys”;
status = “okay”;

	forcerecovery {
		label = "force-recovery";
		gpios = <&tegra_main_gpio TEGRA234_MAIN_GPIO(G, 0) GPIO_ACTIVE_LOW>;
		linux,code = <BTN_1>;
	};

	power_key {
		label = "power-key";
		gpios = <&tegra_aon_gpio TEGRA234_AON_GPIO(EE, 4) GPIO_ACTIVE_LOW>;
		linux,code = <KEY_POWER>;
		gpio-key,wakeup;
	};
};

eeprom-manager {
	data-size = <0x100>;
	bus@0 {
		i2c-bus = <&gen1_i2c>;
		eeprom@1 {
			slave-address = <0x57>;
			label = "cvb";
		};
	};

	bus@1 {
		i2c-bus = <&gen2_i2c>;
		eeprom@1 {
			slave-address = <0x50>;
			label = "super-module";
		};
	};
};

xusb_padctl: xusb_padctl@3520000 {
	status = "okay";
	pads {
		usb2 {
			lanes {
				usb2-0 {
					nvidia,function = "xusb";
					status = "okay";
				};
				usb2-1 {
					nvidia,function = "xusb";
					status = "okay";
				};
				usb2-2 {
					nvidia,function = "xusb";
					status = "okay";
				};
			};
		};
	};

	ports {
		usb2-0 {/* Goes to recovery port */
			mode = "otg";
			status = "okay";
			vbus-supply = <&p3768_vdd_5v_sys>;
			usb-role-switch;
			port {
				typec_p0: endpoint {
					remote-endpoint = <&fusb_p0>;
				};
			};
		};
		usb2-1 {/* Goes to hub */
			mode = "host";
			vbus-supply = <&p3768_vdd_av10_hub>;
			status = "okay";
		};
		usb2-2 {/* Goes to M2.E */
			mode = "host";
			vbus-supply = <&p3768_vdd_5v_sys>;
			status = "okay";
		};
	};
};

tegra_xudc: xudc@3550000 {
	status = "okay";
	phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>;
	phy-names = "usb2-0";
	nvidia,xusb-padctl = <&xusb_padctl>;
};

tegra_xhci: xhci@3610000 {
	status = "okay";
	phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>,
		<&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-1}>,
		<&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-2}>;
	phy-names = "usb2-0", "usb2-1", "usb2-2";
	nvidia,xusb-padctl = <&xusb_padctl>;
};

i2c@c240000{
	status = "okay";
	fusb301@25 {
		compatible = "onsemi,fusb301";
		reg = <0x25>;
		status = "okay";
		#address-cells = <1>;
		#size-cells = <0>;
		interrupt-parent = <&tegra_main_gpio>;
		interrupts = <TEGRA234_MAIN_GPIO(Z, 1) IRQ_TYPE_LEVEL_LOW>;
		connector@0 {
			port@0 {
				fusb_p0: endpoint {
					remote-endpoint = <&typec_p0>;
				};
			};
		};
	};
};
spi@3210000{ /* SPI1 in 40 pin conn */
	status = "okay";
	spi@0 { /* chip select 0 */
		compatible = "tegra-spidev";
		reg = <0x0>;
		spi-max-frequency = <50000000>;
		controller-data {
			nvidia,enable-hw-based-cs;
			nvidia,rx-clk-tap-delay = <0x10>;
			nvidia,tx-clk-tap-delay = <0x0>;
		};
	};
	spi@1 { /* chip select 1 */
		compatible = "tegra-spidev";
		reg = <0x1>;
		spi-max-frequency = <50000000>;
		controller-data {
			nvidia,enable-hw-based-cs;
			nvidia,rx-clk-tap-delay = <0x10>;
			nvidia,tx-clk-tap-delay = <0x0>;
		};
	};
};

spi@3230000{ /* SPI3 in 40 pin conn */
	status = "okay";
	spi@0 { /* chip select 0 */
		compatible = "tegra-spidev";
		reg = <0x0>;
		spi-max-frequency = <50000000>;
		controller-data {
			nvidia,enable-hw-based-cs;
			nvidia,rx-clk-tap-delay = <0x10>;
			nvidia,tx-clk-tap-delay = <0x0>;
		};
	};
	spi@1 { /* chips select 1 */
		compatible = "tegra-spidev";
		reg = <0x1>;
		spi-max-frequency = <50000000>;
		controller-data {
			nvidia,enable-hw-based-cs;
			nvidia,rx-clk-tap-delay = <0x10>;
			nvidia,tx-clk-tap-delay = <0x0>;
		};
	};
};

serial@3100000 {/* UARTA, for 40 pin header */
	status = "okay";
};

/* enable UART1 */
	serial@3110000 {/* Enable UART1 */
	status = "okay";
};

mttcan@c310000 {
	status = "okay";
};

serial@3140000 {
	/* UARTE, Goes to M2.E and also some of the pins to bootstrap */
	status = "okay";
};

serial@31d0000 {/* UARTI - SBSA */
	status = "okay";
};

tachometer@39c0000 {
	status = "okay";
	upper-threshold = <0xfffff>;
	lower-threshold = <0x0>;
};

pwm@3280000 {/* PWM1 40pin header, pin 15 */
	status = "okay";
};

pwm@32a0000 {/* PWM3 - FAN */
	status = "okay";
};

pwm@c340000 { /* PWM4 - OVR */
	status = "disabled";
};

pwm@32c0000 {/* PWM5 40 pin header, pin 33 */
	status = "okay";
};

pwm@32d0000 {/* PWM6 OVR */
	status = "disabled";
};

bluedroid_pm {
	status = "disabled";
};

display@13800000 {
	status = "okay";
};

tegra-capture-vi  {
	ports {
		port@0 {
			endpoint {
				port-index = <1>;
			};
		};
	};
};

host1x@13e00000 {
	nvcsi@15a00000 {
		csi_chan0 {
			ports {
				port@0 {
					endpoint@0 {
						port-index = <1>;
					};
				};
			};
		};
	};
};

cam_i2cmux{
	i2c@0 {
		rbpcv2_imx219_a@10 {
			mode0 {
				tegra_sinterface = "serial_b";
				lane_polarity = "6";
			};
			mode1 {
				tegra_sinterface = "serial_b";
				lane_polarity = "6";
			};
			mode2 {
				tegra_sinterface = "serial_b";
				lane_polarity = "6";
			};
			mode3 {
				tegra_sinterface = "serial_b";
				lane_polarity = "6";
			};
			mode4 {
				tegra_sinterface = "serial_b";
				lane_polarity = "6";
			};
			ports {
				port@0 {
					endpoint {
						port-index = <1>;
					};
				};
			};
		};

		rbpcv3_imx477_a@1a {
			mode0 {
				tegra_sinterface = "serial_b";
				lane_polarity = "6";
			};
			mode1 {
				tegra_sinterface = "serial_b";
				lane_polarity = "6";
			};
			ports {
				port@0 {
					endpoint {
						port-index = <1>;
					};
				};
			};
		};
	};
};

};

But still , two ports can connect to usb3.0 device and recognize it . What should I do?

Are you sure the device tree really updated to the board?

I replace the /boot/kernel_tegra234-p3767-0001-p3768-0000-a0.dtb and /boot/dtb/kernel_tegra234-p3767-0001-p3768-0000-a0.dtb with the new one and reboot the nx.

Not sure if that correct.

Before replacing, all three ports can connect to usb3.0 device(realsense d435) , after replacing only 2 can do that. the other one can just recognice d435 as a usb2.0 device.

What board are you using here? NV devkit?

Damiao nx carrier board

Does it have something to do with board type?
I thought it was just about the device tree setting

Or there is other way to disable the usb3.0 function?

我直接用中文解釋好了…

  1. device tree的設定永遠都跟底板的硬體如何設計有關…

  2. 如果你用custom board, 請你找那個vendor回報你的需求. 我們並不清楚他們那幾個port背後是如何做的
    比方說哪個device tree對應到哪個port. 你確定你真的有清楚背後的線路怎麼接的嗎?

我对硬件的原理不了解
之前我想使能打开所有3个usb3.0的时候,vendor提出的方法是修改tegra234-p3767-0001-p3768-0000-a0.dtb,如下:
serial@3100000 {/* UARTA, for 40 pin header */
status = “okay”;
};

/* 增加下面这部分开启串口1 /
serial@3110000 {/
Enable UART1 */
status = “okay”;
};

/* … */

/* 找到这部分,并按照下面的修改,增加usb2-2和usb3-2,用于开启额外的USB3.0 */
xusb_padctl: xusb_padctl@3520000 {
status = “okay”;
pads {
usb2 {
lanes {
usb2-0 {
nvidia,function = “xusb”;
status = “okay”;
};
usb2-1 {
nvidia,function = “xusb”;
status = “okay”;
};
usb2-2 {
nvidia,function = “xusb”;
status = “okay”;
};
};
};
usb3 {
lanes {
usb3-0 {
nvidia,function = “xusb”;
status = “okay”;
};
usb3-1 {
nvidia,function = “xusb”;
status = “okay”;
};
usb3-2 {
nvidia,function = “xusb”;
status = “okay”;
};
};
};
};

ports {
usb2-0 {/* Goes to recovery port /
mode = “otg”;
status = “okay”;
vbus-supply = <&p3768_vdd_5v_sys>;
usb-role-switch;
port {
typec_p0: endpoint {
remote-endpoint = <&fusb_p0>;
};
};
};
usb2-1 {/
Goes to hub /
mode = “host”;
vbus-supply = <&p3768_vdd_av10_hub>;
status = “okay”;
};
usb2-2 {/
Goes to M2.E /
mode = “host”;
vbus-supply = <&p3768_vdd_5v_sys>;
status = “okay”;
};
usb3-0 {/
Goes to hub /
nvidia,usb2-companion = <1>;
status = “okay”;
};
usb3-1 {/
Goes to J5 /
nvidia,usb2-companion = <0>;
status = “okay”;
};
usb3-2 {/
Goes to J5 */
nvidia,usb2-companion = <2>;
status = “okay”;
};
};
};

tegra_xudc: xudc@3550000 {
status = “okay”;
phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>,
<&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-1}>;
phy-names = “usb2-0”, “usb3-1”;
nvidia,xusb-padctl = <&xusb_padctl>;
};

tegra_xhci: xhci@3610000 {
status = “okay”;
phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>,
<&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-1}>,
<&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-2}>,
<&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-0}>,
<&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-1}>,
<&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-2}>;
phy-names = “usb2-0”, “usb2-1”, “usb2-2”, “usb3-0”, “usb3-1”, “usb3-2”;
nvidia,xusb-padctl = <&xusb_padctl>;
};
我现在想全部的usb口都关掉

因為你說你對硬體不了解, 我不確定你能不能準確回答我的問題

  1. 請問你那塊底板上有幾個USB port? USB port不止包含常見的type A/type C, 連m.2上也可能有usb data lane連接. 另外有沒有USB hub? 那幾個usb port裡面又是哪幾個usb2 + usb3配對出來?

  2. 請問那塊底板上有沒有東西是pcie轉usb port的? 比方說看起來是個usb port但實際上是透過pcie接在Jetson上的 (這種case實際上對Jetson而言它是一塊pcie裝置, 你改usb設定也改不到它)

要全部關掉usb是可以的, 就把上面你列出來的tegra_xhci/ tegra_xudc/ xusb_padctl全部都設成disabled就可以了. 雖然我不知道做這件事情的意義在哪.

板子上一共3个typed口,据我所知另外一些口比如m.2实际上也是usb口,我只想关闭typec口的usb3.0保留他的usb2.0功能,因为usb3.0的干扰太大了

我三个typec口都试过能连usb3.0设备,是不是能说明这些都是usb口?

Hi,

我們這裡根本無法根據你回的內容給答案… 目前的狀況是你連符合你這片板子的device tree都給不出來, 硬體設計是如何也給不出來…

我的意思是你現在說有三個type C port. 但你下面貼出來的device tree完全跟你講的內容不一樣.

你貼的東西就只是我們devkit提供的device tree. 然後不知道為何額外加了一對 usb2-2+ usb3-2.
這個device tree不可能直接支援3個type C port, 應該說這個東西能支援的type C功能也都是不完全的.
而且請問你這塊板子有跟devkit一樣使用fusb301嗎?

如同我前面所說的…請你跟你的board vendor討論你的需求.

你可以嘗試看看把上面的usb3-0 ~usb3-2 disabled加上xhci/xudc裡面的usb3-x都從phys移掉. 但我不保證你的usb port在這之後還能正常工作

另外, 如果type C port+ m.2數量真的如你所說, 這個硬體設計感覺也有問題. 所有的usb3都要搭配usb2使用. 但你說你有3個type C port. 又有m.2 socket. 代表usb2一定跟usb3是有拆開的狀態. 不然不可能完成這樣的組合. (或是有額外接hub/pcie轉接)

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