Sysfs GPIO number for the Xavier AGX / CVM pin gpio32?

Please provide the following info:
Hardware Platform: [AGX Xavier™ Developer Kit, Jetson Xavier AGX]
Software Version: [Linux Jetpack 4.4 DP]
Host Machine Version: [native Linux]
SDK Manager Version: [1.2.0.6738]

I’m looking to drive gpio32 pin J55. What sysfs gpio number should be used to control this pin?

Hi Joel,

Here are my notes for determining the Linux GPIO number from the NVIDIA pin ID.

  1. Identify NVIDIA’s pin ID. This will be something like Q08 or AA05. There is always a letter (or two letters) and then a number. This is in the NVIDIA pinmux spreadsheet has this value in the GPIO column in the Pin Muxing section (e.g. GPIO3_PG.00 is pin G00).
  2. Open the proper GPIO header file from the device tree area of the source tree. (` find hardware/nvidia/ -name ‘*gpio*.h’). tegra194-gpio.h is an example.
  3. Inside the gpio header file, towards the end, you’ll see macros for computing a pin offet. You will find the index of the alpha value. For example I is 8. The formula is : ($alpha * 8) + $offset. Therefore I07 is (8 * 8) + 7 == 71. This is the pin id OFFSET.
  4. The last step is to examine /sys/kernel/debuig/gpio to find the BASE pin id value from the kernels point of view.
  5. The final step is to add BASE + OFFSET which gives the Linux pin id number that can be used with the /sys/class/gpio facility.

In tegra194-gpio.h there is this macro:

#define TEGRA194_MAIN_GPIO(port, offset) \
	((TEGRA194_MAIN_GPIO_PORT_##port * 8) + offset)

So, the offset for J55 would be (J * 8) + 55) Since J is 9 the offset is 127.

I hope this helps.

Yes @D3_growe thank you. Once I found the pin mux doc to correlate GPIO32->J55->PP.04 your formula worked great!
In my case it was P.04 so (15*8)+4 = 124 OFFSET
288 BASE in tegra194-gpio.h
So the sysfs gpio number was 412!
Thank you!

1 Like

where do you find the BASE value. the tegra194-gpio.h does not have this base value.
I am missing something?