Only tells me what the pins in the expansion header do, but they do not tell me how I can use the pins as GPIO in linux. In addition, the Jetson Hacks website only provides the same information. Can you please provide the GPIO numbers or a quick to find out what those are?
I was going to go through the kernel source and document the process, but that is on my future TODO list. Perhaps someone who has already done this can comment on how to relate the sysfs entry to the GPIO designation…eventually I will get to that though.
That would be for the TX1/TX2 carrier though. The actual wiring isn’t the issue so much as mapping the “/sys” numeric designation to a physical pin of the Xavier J30 connector. I have not had time yet to go through and find the mapping scheme, but I do have these images I use for reference…
You can also get a PhD in mathematics to figure out gradient descent and the back-propagation algorithm on your own. But I prefer to have a ready-made reference, because this is knowledge that humanity already has.
Could we please get a chart that shows the 40-pin connector, labeled with the GPIO number, and at least the “standard” alternate function? (Where “standard” means “the one that maps to Raspberry Pi-style signals”)
Someone can do this, once, and it will help everybody. That someone should be NVIDIA.
There are also links to the worksheets which follow the flow from the Tegra Xavier chip all the way to the Expansion Header pin, along with a couple of application notes.
Special thanks to Stephen Warren from NVIDIA who provided the information.
I am curious about something…sometimes voltages on this header (for GPIO) don’t seem to actually reach the 3.3V or 1.8V setting (depending on which the voltage select header is set to…3.3V should be the default). Basically, it seems like the level converter is not reliable.
One of my co-workers figured this out. For some reason export and unexport had no permissions set. Running chmod with the appropriate permissions fixed this issue.
For anyone wondering how to follow the above procedure for the Jetson AGX Xavier, the port names are listed in tegra194-gpio.h, and the calculations are as follows:
MAIN = 288 + (port * 8) + offset
AON = 248 + (port * 8) + offset
Example: SPI1_CLK is GPIO PZ.03 in pinmux file. PZ is a MAIN GPIO. Therefore, PZ.03 = 288 + (25 * 8) + 3 = 491
My question is how to numbering the GPIO for B26,B27 and B28 in above picture.
B26: GPIO_EDP0==> Is the port E and offest 0?
lcd-vdd-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(E, 0) 0>;
B27: GPIO_DIS0 ==> Is the port D and offest 0? xxx-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(D, 0) 0>;
B28: GPIO_DIS3 ==> Is the port D and offest 3? xxx-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(D, 3) 0>;
GPIO lines are attached to gpiochips. Look in /sys/class/gpio and you should see gpiochip240, 248, and 288. I haven’t yet determined which GPIOs are connected to 240.
If you download the pinmux spreadsheet and unhide column G you’ll see GPIO names like GPIO3_PA.00. Ignore the GPIO3_P portion, the A.00 is the important part. The alpha portion is the port, the numeric is the IO in the port. Some ports have a double alpha designation, like AA. Single alphas are attached to gpiochip288 while double alphas are on gpiochip248.
Take the alpha portion as a number (A=0, B=1, …) and multiply by 8 then add the numeric value. Finally add the gpiochip number. For double alphas AA=0, BB=1, …
e.g. GPIO3_PG.02: Single alpha so the gpiochip is 288, G = 6. So we have 288 + 6 * 8 + 2 = 338
Back to the spreadsheet, column A has the signal name and column B has the ball number. The expansion header is labelled with the signal name. The signal name for GPIO3_PG.02 is GPIO28.