Where/how can I determine the GPIO numbering on the expansion header on Xavier?

Unless I am missing something, the following documentation

https://developer.download.nvidia.com/assets/embedded/secure/jetson/xavier/docs/Jetson_Xavier_Developer_Kit_Carrier_Board_Specification.pdf?IyMRfiQORSFmzMUdCNWb7owl8HEPyx6yHIYIlSC2dFDVyjcc0uIZ6bosen7b_9RWZZukT9VrH6mExxpKRg_Byd4qqfzpLsjstuET_Re9shgLwQO6I2vMj1mexh34OOJ2jqcg5UyqtQR8Ji7hKoDmFXgwA8lNSGTb_ypj8XmVYCAQQGjcPgRtyQ-DCiq3Q-jYJrygjkzU5NqiQAWqXP6WHvRHGZ8

Only tells me what the pins in the expansion header do, but they do not tell me how I can use the pins as GPIO in linux. In addition, the Jetson Hacks website only provides the same information. Can you please provide the GPIO numbers or a quick to find out what those are?

Pin 22, “GPIO17_40HEADER”, is “417” if exporting through “/sys”. Pin 15, “GPIO27_PWM2”, is “393” if exporting via “/sys”.

# GPIO17_40HEADER (pin 22):
echo '417' > /sys/class/gpio/export
# GPIO27_PWM2 (pin 15):
echo '393' > /sys/class/gpio/export
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Thank you linuxdev for the information. That will help me get started on a couple things.

Can I export more pins than just those two? Is there a way to “figure out” what pins correspond to which GPIO numbers?

I was going to go through the kernel source and document the process, but that is on my future TODO list. Perhaps someone who has already done this can comment on how to relate the sysfs entry to the GPIO designation…eventually I will get to that though.

Below document have a very detail information.

That would be for the TX1/TX2 carrier though. The actual wiring isn’t the issue so much as mapping the “/sys” numeric designation to a physical pin of the Xavier J30 connector. I have not had time yet to go through and find the mapping scheme, but I do have these images I use for reference…

Is the same exact scheme used for Xavier?
xavier_j30_header.png
xavier_j30_header_description.png

ShaneCCC,

That document is for the Jetson TX2. Can you confirm the mapping scheme is the same for the Jetson Xavier?

That doc is tell how to map the GPIO pin to linux gpio number. You can get the Xavier’s pinmux and Xavier expander pin map to figure it out.

You can also get a PhD in mathematics to figure out gradient descent and the back-propagation algorithm on your own. But I prefer to have a ready-made reference, because this is knowledge that humanity already has.

Could we please get a chart that shows the 40-pin connector, labeled with the GPIO number, and at least the “standard” alternate function? (Where “standard” means “the one that maps to Raspberry Pi-style signals”)

Someone can do this, once, and it will help everybody. That someone should be NVIDIA.

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gpio pin
422 7
424 13
393 15
344 18
417 22
491 23
248 33
429 36?
249 37

The Jetson AGX Xavier GPIO Expansion Header table has been updated to include the GPIO Linux mappings:

NVIDIA Jetson AGX Xavier GPIO Header Pinout: https://www.jetsonhacks.com/nvidia-jetson-agx-xavier-gpio-header-pinout/

There are also links to the worksheets which follow the flow from the Tegra Xavier chip all the way to the Expansion Header pin, along with a couple of application notes.

Special thanks to Stephen Warren from NVIDIA who provided the information.

Here’s the JetsonHacks article: https://www.jetsonhacks.com/2018/11/07/nvidia-jetson-agx-xavier-expansion-header/

This is great; thanks @Kangalow!

@snarky You’re welcome. Hopefully people will find it useful.

I am curious about something…sometimes voltages on this header (for GPIO) don’t seem to actually reach the 3.3V or 1.8V setting (depending on which the voltage select header is set to…3.3V should be the default). Basically, it seems like the level converter is not reliable.

I’ve been working on GPIO access today and have been hitting a wall. Per #2 in this thread:

When I try that, I get:

bash: /sys/class/gpio/export: Permission denied

Even if I try sudo.

I also get “Permission denied” if I try to do the same thing in c code.

What am I missing?

One of my co-workers figured this out. For some reason export and unexport had no permissions set. Running chmod with the appropriate permissions fixed this issue.

For anyone wondering how to follow the above procedure for the Jetson AGX Xavier, the port names are listed in tegra194-gpio.h, and the calculations are as follows:

MAIN = 288 + (port * 8) + offset
AON = 248 + (port * 8) + offset

Example: SPI1_CLK is GPIO PZ.03 in pinmux file. PZ is a MAIN GPIO. Therefore, PZ.03 = 288 + (25 * 8) + 3 = 491

Hi, I have a simillar question on GPIO numbering for Tx2.

My question is how to numbering the GPIO for B26,B27 and B28 in above picture.
B26: GPIO_EDP0==> Is the port E and offest 0?
lcd-vdd-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(E, 0) 0>;
B27: GPIO_DIS0 ==> Is the port D and offest 0? xxx-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(D, 0) 0>;
B28: GPIO_DIS3 ==> Is the port D and offest 3? xxx-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(D, 3) 0>;

thanks