SDK Version
root@user-desktop:/home/user# cat /etc/nv_tegra_release
R32 (release), REVISION: 6.1, GCID: 27863751, BOARD: t186ref, EABI: aarch64, DATE: Mon Jul 26 19:36:31 UTC 2021
I sent two channels of RGB888 data from FPGA
video0 can display the screen but video1 will have an error
[ 99.424766] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 99.424924] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 99.425069] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 99.426485] tegra194-vi5 15c10000.vi: vi_capture_shutdown–
[ 99.426505] tegra194-vi5 15c10000.vi: vi_capture_ivc_send_control: sending chan_id 0 msg_id 18
[ 99.427673] tegra194-vi5 15c10000.vi: vi_capture_ivc_send_control: response chan_id 0 msg_id 19
[ 99.427685] tegra194-vi5 15c10000.vi: vi_capture_ivc_send_control: sending chan_id 0 msg_id 20
[ 99.428638] tegra194-vi5 15c10000.vi: vi_capture_ivc_send_control: response chan_id 0 msg_id 21
[ 99.428835] Unable to handle kernel NULL pointer dereference at virtual address 00000010
[ 99.429010] Mem abort info:
[ 99.429073] ESR = 0x96000005
[ 99.429131] Exception class = DABT (current EL), IL = 32 bits
[ 99.429235] SET = 0, FnV = 0
[ 99.429292] EA = 0, S1PTW = 0
[ 99.429353] Data abort info:
[ 99.429410] ISV = 0, ISS = 0x00000005
[ 99.429481] CM = 0, WnR = 0
[ 99.429542] user pgtable: 4k pages, 39-bit VAs, pgd = ffffffc7c47dd000
[ 99.429652] [0000000000000010] *pgd=0000000000000000, *pud=0000000000000000
[ 99.429798] Internal error: Oops: 96000005 [#1] PREEMPT SMP
[ 99.429899] Modules linked in: bnep fuse xt_conntrack ipt_MASQUERADE nf_nat_masquerade_ipv4 nf_conntrack_netlink nfnetlink xt_addrtype iptable_filter iptable_nat nf_conntrack_ipv4 nf_defrag_ipv4 nf_nat_ipv4 nf_nat nf_conntrack br_netfilter zram overlay bluedroid_pm userspace_alert psm_amb_gen3_kcku15p nvgpu ip_tables x_tables
[ 99.441523] CPU: 2 PID: 9387 Comm: vi-output, tc35 Not tainted 4.9.253-tegra #1
[ 99.448429] Hardware name: Jetson-AGX (DT)
[ 99.452629] task: ffffffc7bb4a6200 task.stack: ffffffc73c0e8000
[ 99.458414] PC is at _raw_write_lock+0x30/0x58
[ 99.463130] LR is at destroy_buffer_table+0x40/0xd8
[ 99.467855] pc : [] lr : [] pstate: 20c00045
[ 99.475115] sp : ffffffc73c0ebc70
[ 99.478354] x29: ffffffc73c0ebc70 x28: 0000000000000000
[ 99.483787] x27: 0000000000000000 x26: 0000000000000000
[ 99.489548] x25: 0000000000000010 x24: 0000000000000098
[ 99.495073] x23: 0000000000000018 x22: ffffff8009087d58
[ 99.500220] x21: 0000000000000000 x20: ffffffc776851680
[ 99.505646] x19: 0000000000000010 x18: 0000000000000000
[ 99.511336] x17: 0000000000000002 x16: 0000000000000003
[ 99.517108] x15: 0000000000000038 x14: 000b0000000bfed9
[ 99.522548] x13: 000b000000000000 x12: ffffff800c000064
[ 99.528235] x11: 0000000000000400 x10: 0000000000000000
[ 99.533926] x9 : ffffffc73c0eba80 x8 : 0000000000000000
[ 99.539699] x7 : ffffffc775afcf40 x6 : ffffffc77671f781
[ 99.545210] x5 : ffffff800852d944 x4 : ffffffbf1dd9c7d0
[ 99.550796] x3 : 0000000000000000 x2 : ffffffc77671f780
[ 99.556134] x1 : 0000000000000000 x0 : 0000000080000000
[ 99.562883] Process vi-output, tc35 (pid: 9387, stack limit = 0xffffffc73c0e8000)
[ 99.569875] Call trace:
[ 99.572162] [] _raw_write_lock+0x30/0x58
[ 99.577492] [] destroy_buffer_table+0x40/0xd8
[ 99.583095] [] vi_capture_shutdown+0xfc/0x128
[ 99.588691] [] vi_channel_close_ex+0x34/0x88
[ 99.594291] [] vi5_channel_error_recover+0x48/0x1c8
[ 99.599984] [] tegra_channel_error_recover+0x58/0x90
[ 99.606109] [] tegra_channel_kthread_capture_dequeue+0xf8/0x1c0
[ 99.613023] [] kthread+0xec/0xf0
[ 99.617919] [] ret_from_fork+0x10/0x30
[ 99.622911] —[ end trace c7a08da73d24392a ]—
[ 99.644172] note: vi-output, tc35[9387] exited with preempt_count 1
Could this be the cause of the error?
The detailed LOG is as follows
video0
1.txt (36.9 KB)
video1
2.txt (10.8 KB)
The video1 connect to which CSI port? 4 lanes configure should connect to CSI-C port-index=2?
Yes
if video 0 num_lanes = “2”; video1 set port-index = <2>;
if video 0 num_lanes = “4”; video1 set port-index = <4 >; ???
Please check with your HW designer for the CSI configure to correct the port-index.
Also you can check the below document https://developer.nvidia.com/embedded/dlc/jetson-agx-xavier-series-camera-module-hardware-design-guide
My hardware
my dts
i2c@3160000 { /* I2C_PM, “adapter” 0 /
tc358746_a@1e { //0x1e take any address
…
reg = <0x1e>; / shifted by 2 /
devnode = “video0”; / V4L2 device node location */
…
mode0 { //TC358748_MODE_1920x1080_30FPS
…
num_lanes = “4”;
…
};
ports {
......
port@0 {
reg = <0>;
litc358746_tc358746_out0: endpoint {
port-index = <0>; /* CSI A */
bus-width = <4>;
.....
};};};};
tc358746_b@2e { //0x2e take any address
....
reg = <0x2e>; /* shifted by 2 */
devnode = "video1"; /* V4L2 device node location */
....
mode0 { //TC358748_MODE_1920x1080_30FPS
....
num_lanes = "4";
....
};
ports {
....
port@0 {
reg = <0>;
litc358746_tc358746_out1: endpoint {
....
port-index = <2>; /* CSI A */
bus-width = <4>;
....
};};};};
};
tegra-camera-platform {
...
num_csi_lanes = <4>;
...
};
Will not be displayed and there will be an error
[ 83.726935] tc358746 0-002e: tc358746_start_streaming: Mode ID : 0
[ 83.783407] tegra194-vi5 15c10000.vi: corr_err: discarding frame 0, flags: 96, err_data 4194402
[ 83.816587] tegra194-vi5 15c10000.vi: corr_err: discarding frame 0, flags: 32, err_data 162
[ 83.850262] tegra194-vi5 15c10000.vi: corr_err: discarding frame 0, flags: 32, err_data 162
[ 83.883093] tegra194-vi5 15c10000.vi: corr_err: discarding frame 0, flags: 96, err_data 4194402
How can this be corrected?
Have a check VI trace log to check if can get any clue.
https://elinux.org/Jetson/l4t/Camera_BringUp
Are there DTS related documents for the camera?
What’s the difference between these
mode0 { //TC358748_MODE_1920x1080_30FPS
…
num_lanes = “4”;
…
};
tegra-camera-platform {
…
num_csi_lanes = <4>;
…
};
These configure shouldn’t reference by v4l2 base driver. It only reference by the argus(ISP) base use case.
I mainly refer to this file setting
tegra194-camera-imx274-dual.dtsi.txt (25.1 KB)
The hardware design of my board is shown in the figure
The reference setting is set to
num_lanes = “4”;
num_csi_lanes = <8>;
But will appear
Must be changed to
num_lanes = “2”;
num_csi_lanes = <4>;
It can be displayed normally! What is the meaning of these two parameters?
num_lanes is the camera lanes
num_csi_lanes is all camera lanes like if you have two sensor and each of then are 4 lanes the it’s 8
So if you set
Num_lanes = “2”;
NUM_CSI_LANES = <4>
Can display
But change setting
Num_lanes = “4”;
Num_csi_lanes = <8>
Unable to show the actual video Each only 2 lanes?
Those configure depend on your HW and fpga configure.
if HW and fpga configure 4 lanes
set Num_lanes = “2”;
Can I receive MIPI data in this way?
Is this kind of error message receiving wrong data??? ???
[ 46.540811] tegra194-vi5 15c10000.vi: corr_err: discarding frame 0, flags: 32, err_data 160
[ 46.557424] tegra194-vi5 15c10000.vi: corr_err: discarding frame 0, flags: 32, err_data 160
[ 46.590318] tegra194-vi5 15c10000.vi: corr_err: discarding frame 0, flags: 32, err_data 160
enable debug trace
I try set Num_lanes = “2”; is ok
2lanes_ok_trace.log (621.7 KB)
but set Num_lanes = “4”; is error
4lanes_err_trace.log (2.0 MB)
kworker/0:3-1749 [000] .... 85.781582: rtcpu_nvcsi_intr: tstamp:3178416613 class:CORRECTABLE_ERR type:STREAM_VC phy:0 cil:0 st:0 vc:0 status:0x00000004
kworker/0:3-1749 [000] .... 85.781582: rtcpu_nvcsi_intr: tstamp:3178416613 class:CORRECTABLE_ERR type:PHY_INTR phy:0 cil:0 st:0 vc:0 status:0x00000110
kworker/0:3-1749 [000] .... 85.781582: rtcpu_nvcsi_intr: tstamp:3178416613 class:CORRECTABLE_ERR type:PHY_INTR phy:0 cil:1 st:0 vc:0 status:0x00000110
kworker/0:3-1749 [000] .... 85.781582: rtcpu_nvcsi_intr: tstamp:3178417916 class:GLOBAL type:STREAM_VC phy:0 cil:0 st:0 vc:0 status:0x00000004
kworker/0:3-1749 [000] .... 85.781583: rtcpu_nvcsi_intr: tstamp:3178417916 class:GLOBAL type:PHY_INTR0 phy:0 cil:0 st:0 vc:0 status:0x00000110
kworker/0:3-1749 [000] .... 85.781583: rtcpu_nvcsi_intr: tstamp:3178417916 class:GLOBAL type:PHY_INTR0 phy:0 cil:1 st:0 vc:0 status:0x00000110
Not possible if fpga configure as 4 lanes and AGX set as 2 lanes. And current the lane configure should the the bus-width for AGX CSI/VI configure.
As shown above
How much should Num_lanes be set?
It’s 4 lanes HW connection.
bus-width Number of CSI lanes connected to sensor; determines the bus width.
num_lanes Number of lane channels the sensor is programmed to output.
I have doubts about these two parameters. What is the difference between them?
In the environment of the above figure, what is the setting?
It’s the same thing here. It’s for different driver.
But I have to set it like this now to see the image
bus-width = <4>;
num_lanes = “2”;
Have you ever encountered a similar situation?
If you are using v4l2-ctl or v4l2 base APP that will ignore the num_lanes configure.
The num_lanes only apply to ARGUS base APP.
