Test pattern from FPGA is not received on xavier NX

Hi,
We are generating a test pattern from an FPGA( RG12 bayer format with 1080p resolution, with 4 lane) connected to xavier nx mipi csi.
When I use v4l2-ctl(command mentioned below) to generate capture the stream , I get the below mentioned error(it keeps on flooding).

v4l2-ctl -d /dev/video0 --set-fmt-video=width=1920,height=1080,pixelformat=GB12 -c bypass_mode=0 -c frame_rate=160000000 --stream-mmap

[ 41.812174] tegra194-vi5 15c10000.vi: corr_err: discarding frame 0, flags: 0, err_data 256
[ 41.843693] tegra194-vi5 15c10000.vi: corr_err: discarding frame 0, flags: 0, err_data 256
[ 41.875072] tegra194-vi5 15c10000.vi: corr_err: discarding frame 0, flags: 0, err_data 256

On probing the mipi lines the data seems fine.
Also I am able to receive 1080p bayer GB12 data from a sensor with the same dtb and kernel configuration. Only the test pattern from FPGA is giving this error.
I am also attaching the trace logs.
test-pattern-GB12-trace.log (110.0 KB)
test-pattern-GB12-dmesg.log (23.6 KB)

Can someone guiide what is configured wrong ?

1 Like

Sorry for the late response, have you managed to get issue resolved? Thanks

Looks like PIXEL_LONG_LINE in CHANSEL_FAULT
It tell receive more pixel as expect.

https://elinux.org/Jetson/l4t/Camera_BringUp

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