Timing Information of I2S and I2C

Hi,

We are in the process of designing a board that connects to the Nano and will utilize the I2S and I2C interfaces. We haven’t been able to find any relevant timing information from the documents released so far.

Would you please be able to point us in the direction of this documentation?

Regards
Ben

The hyperlink is lose from your comment. Check the download center to looking for the document.

https://developer.nvidia.com/embedded/downloads

Hi ShaneCCC,

Thanks for the link. We found timing information for the SPI interface in [1] (Page 28, Figure 5 and 6). We are looking for similar timing information for the I2S and I2C interfaces.

Regards
Ben

[1] https://developer.nvidia.com/embedded/dlc/jetson-nano-system-module-datasheet

Hi ShaneCCC,

Did you have any luck finding the information above?

Kind Regards,
Ben

Have a check TX1 TRM.

Hi ShaneCCC,

Thanks for the helpful pointer to the timing diagram of the I2S interface on the TX1. We also found timing information for the TX2 in Table 41 & 42 (below) of the TX2 Datasheet. Is the same information available for the Jetson Nano or can you confirm that the timing information below is the same for both the TX2 and the Jetson Nano.

Regards
Ben

Nano is the same with TX1, and the timing are the same with TX2 as standard i2c/i2s spec.