i have a customer design board. the board support two mini pcie(PEX1 & PEX0)
and two usb3.0 (USB_SS1 & USB_SS0).
i want to setting to config 4 (USB3.02 pcie21 SATA*1)
please see the document as below (Table 12. Jetson TX1 USB 3.0, PCIe & SATA Lane Mapping Configurations)
how do i modify the dts or pinmux?
i see the https://devtalk.nvidia.com/default/topic/932956/jetson-tx1/pinmux-config-for-second-usb3-usb_ss2-/1
but the way is to modify the PEX1.
Are you looking for information on building dtb files with the device tree compiler? Or are you looking for information about specific changes to source code going in to those files? It looks like you want to know if your configuration can be achieved, and what changes are required for that, but I am unsure if that is correct.
That document gives quite detailed information about configuration changes in DTS.
You can search related files in arch/arm64/boot/dts.
BTW: use-case 4 is to enable USB_SS#1 and USB_SS#2. USB_SS#0 is always occupied by LAN.
how do i modify the dts file?
i think i need to modify the tegra210-jetson-cv-base-p2597-2180-a00.dts
could you provide more information ?
You can check the boot log to get the dtb file system loaded. Then check the corresponding source code in kernel package.