Pinmux is not generating a pinmux file which contains PEX/USB configuration

Hi, Down towards the bottom of the TX2i page of the excel pinmux document (Jetson-TX2-Series-Pinmux-Template.xlsm) we find the UPHY pin controls for the PEX/USB3.0 pins.

These are pre-selected for the default config, config #2:

PEX1_RX-/USB_SS0_RX-
PEX1_RX+/USB_SS0_RX+
PEX1_TX-/USB_SS0_TX-
PEX1_TX+/USB_SS0_TX+
PEX_RFU_RX-
PEX_RFU_RX+
PEX_RFU_TX-
PEX_RFU_TX+
USB_SS1_RX-
USB_SS1_RX+
USB_SS1_TX-
USB_SS1_TX+
PEX2_RX-
PEX2_RX+
PEX2_TX-
PEX2_TX+
PEX0_RX-
PEX0_RX+
PEX0_TX-
PEX0_TX+

Since we’re using Config #5, we’ve set these pins for two mini-PCIe cards each with 1x PCIe, a 2x M.2 card interface, and a USB3.0 port, giving us a 2x, 1x, 1x PCIe config.

Here is the same section of UPHY pins once we’ve selected the alternate configuration #5 choices:

PEX2_RX0N LANE0 Mini-PCIe 1x Card 2
PEX2_RX0P …
PEX2_TX0N …
PEX2_TX0P …
USB_SS1_RXN LANE1 USB3.0 Superspeed port
USB_SS1_RXP …
USB_SS1_TXN …
USB_SS1_TXP …
PEX0_RX1N LANE2 M.2 (2x Card) UPPER PCIe Lanes
PEX0_RX1P …
PEX0_TX1N …
PEX0_TX1P …
PEX1_RX0N LANE3 Mini-PCIe 1x Card 1
PEX1_RX0P …
PEX1_TX0N …
PEX1_TX0P …
PEX0_RX0N LANE4 M.2 (2x Card) LOWER PCIe Lanes
PEX0_RX0P …
PEX0_TX0N …
PEX0_TX0P …

So to change from config2 to config5 we made changes in the pinmux excel document to LANE0 through LANE3, and LANE4 stayed the same.

The problem is that when we press the “Generate DT File” button, we don’t see any of these pins changes appear in any of the three .dtsi documents that the pinmux template generates.

Are we missing something?
Do we need to figure out these commands manually and insert them manually? If so, where?
If the pinmux template has these pins listed and allows you to change them, why doesn’t it generate the associated pin changes in the .dtsi documents?

Thanks.

Hi,
Please refer to oem design guide and adaptation guide for hardware design and device tree programming.


https://developer.nvidia.com/embedded/dlc/jetson-tx2-series-oem-product-design-guide
https://elinux.org/Jetson/TX2_USB