Equivalents on Device tree for PCI

In the Adaptation guide for TX2,
PCIe#0_2 comes under PEX2, and as I have come to understand , is not pcie port 2( Do validate this opinion if correct).

What would represent PCIe#0_2 at config1 ie ODMDATA=0x90000 in the device tree? Because nothing is getting detected on the same.

dmesg.txt (136.3 KB)

pcidump.txt (1.3 KB)

My intent is to access the pcie device via PEX2 on a custom board.

I have referenced the following until now.

  1. Adaptation guide
  2. Jetson/TX2_USB

We only have 3 ports and it could be either 4,0,1 or 2,1,1 configuration.

So what is the config # you want to use here? It is a fixed combination but not nothing you can freely configure.

My requirement would be a single lane on PEX2, I do not know which port corresponds to it, or the node in the device tree.

I hope I’m being clear.

Hi,

Ok, just first question here. Are you able to understand this table or not? If you can, then which configuration do you want to use?

If you cannot, please tell me which part you cannot understand.

image

Also, do you have experience in device tree configuration or not?

Yes I think I understand the table.

  • The PCIe on the custom board is connected via a single lane ie (rx,tx) to PEX2.

  • Now depending on config n it would either be PCIe#0_2(for config1-2) and PCIe#1_0(for config 3-6).

At the moment I’m on config 1. So I want to know if I have to make any device tree changes wrt to PCIe#0_2(and where if required).

In terms of previous experience on device tree configuration,
I have made device tree changes to accomodate IMX cameras via ov5693 drivers and external emmc via sdmmc3, on custom boards for nano, TX2 and Xavier NX.

Sorry that your reply indicates you still do not fully understand this table means…

PCIe#0_X means pcie controller 1. And the follow up number means it is which lane.
And PCIe#1_X means pcie controller 2… and so on.

Config 1 and 2 mean below mapping…

PCIe controller 1 owns 4 lane. Start from PEX0 to PEX_RFU.
PCIe controller 2 owns nothing.
PCIe controller 3 owns 1 lane on lane 0/PEX1 or could be own by usb3.

You cannot use just 1 lane in such configuration. Thus, you need to pick up one config from config #3,4,5,6.

Also, which jetpack release are you using?

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Thank you for explaining it clearly. I’ll change the config to 3 and try seeing if that works.

I have some doubts though.

  • What does PCIe#0_2 mean exactly?

  • Does your suggestion imply that I’ll need PCIe#1_0 for a device at PEX2 for a single lane in Lane 3 to work?

  • How do you form the bits for ODMDATA (let’s say for config 4)

Thanks,

What does PCIe#0_2 mean exactly?

It means it is the 3rd lane of PCIe controller 1 and this controller is a 4 lane slot. What you are doing is you try to use the 3rd lane only in a 4 lane design. This is not allowed…

How do you form the bits for ODMDATA (let’s say for config 4)

Why ask me this question when you already had a document? You can just search ODMDATA in the document and find the answer. I also don’t “memorize” these as this info is not worth to memorizing… I also check the same document as what you just shared…
If you still don’t know how to configure that, then I can tell. But at least try to do it by yourself first. Just start from using config #1 and then try to change it to other configuration… that would be easier…

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Understood.

Sorry If it came off as I have not attempted. I checked the adaptation guide and saw the config values for odmdata 1-3.

I think the forming part is based off on ODMDATA bis for UPHY lane assignment table 2. but had trouble understanding how to form the bits in the first place.

I have also tried reforming existing odmdata bits for given examples ie config 1,2,3 had no luck for the same.

In the meantime I’ll try what you have suggested and get back to you.
Thanks.

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This table from that document would be helpful in understanding ODMDATA.

image

And device tree still need to configure to 2,1,1 (default one is 4,0,1) for pcie part.

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I have made the changes while flashing and to the device tree.

Dmesg has the following text:
“tegra-pcie 10003000.pcie-controller: 2x1, 1x1, 1x1 configuration” @Jetpack4.6

Also, odm-data in /proc/device-tree also reflects configuration 3.

Yet the attached hardware isn’t being detected.

But since I’ve successfully changed the odm-data config. My question is mostly answered.

I’ll be pursuing the rest on a separate thread.

Thanks!

Please also disable unused usb devices.

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