Dears
We design a TX2 extension board.
Verify camera interface MIPI CSI now.
Base on TX2 with L4T r28.2 .
We use ov5693 camera (from TX2 Dev kits) verify our CSI PortC(2 lane) and PortD(2 lane) could normal work. So the trace CSI PortC/D should be normal.
We use sony camera module that output format is YUV(uyuv), reference many forum info we could display 1080p30 on CSI PortC(2 lane), by
gst-launch-1.0 -v v4l2src device=“/dev/video0” ! “video/x-raw,width=1920,height=1080, format=(string)I420” ! nvvidconv ! “video/x-raw(memory:NVMM)” ! nvoverlaysink
Currently we try to use 1080p30 4 lane(same sony camera module could setting output) on CSI PortC and PortD but get green screen in monitor.
Below is what I modify base on 2 lane(PortC) chang to 4 lane(PortC+D) in camera module dts file.
host1x {
vi@15700000 {
…
csi-port = <2>; // same as 2 lane setup
bus-width = <4>;
…
};
nvcsi@150c0000 {
…
csi-port = <2>; // same as 2 lane setup
bus-width = <4>;
…
};
};
mode0 { // OV5693_MODE_2592X1944
.....
num_lanes = "4";
tegra_sinterface = "serial_c";// same as 2 lane setup
.....
};
ports {
.....
csi-port = <2>; // same as 2 lane setup
bus-width = <4>;
.....
};
tegra-camera-platform {
.....
num_csi_lanes = <4>;
.....
};
The log show CHANSEL_SHORT_FRAME that means the output line didn’t as expect. Make sure the sensor output is 1080 lines or try modify the driver to report less to try.
Dear Shane,
Could I know what value output line system expect, and what value system got or count.
I try some value to active_h in dts, but still got CHANSEL_SHORT_FRAME message.
“try modify the driver to report less”
Did you means is adjust below setting in ov5693.c (our test driver) #define OV5693_DEFAULT_HEIGHT 1080
I try use 1050, also got CHANSEL_SHORT_FRAME message.
And use below command check, and got same resule
v4l2-ctl --set-fmt-video=width=1920,height=1080ixelformat=“UYVY” --device=/dev/video0 --stream-count=3 --stream-mmap
<< 0.97 fps
< 0.97 fps
Currently for test MIPI CSI port the camera module is fiexd 1080p30 4 lane output.
Base on 1080p30 2 lane YUV portC experience,
In ov5693 dts I jsut modify below:
pixel_t = “uyvy”;
embedded_metadata_height = “1”;
even the dts not include 1080p30 mode, but still could normal work for 1080p30 2 lane.
So, I am not sure the setting value how to transfer in system. Where I could set the value correct.
Copy your modify, did this you want?
nvidia@tegra-ubuntu:~$ v4l2-ctl --list-formats-ext
ioctl: VIDIOC_ENUM_FMT
Index : 0
Type : Video Capture
Pixel Format: ‘UYVY’
Name : UYVY 4:2:2
Size: Discrete 2592x1944
Interval: Discrete 0.033s (30.000 fps)
Index : 1
Type : Video Capture
Pixel Format: 'NV16'
Name : Y/CbCr 4:2:2
I test from 1079~1070
Below is result for 1079, others 1078~1070 different just “1079”
nvidia@tegra-ubuntu:~$ v4l2-ctl --list-formats-extioctl: VIDIOC_ENUM_FMT
Index : 0
Type : Video Capture
Pixel Format: ‘UYVY’
Name : UYVY 4:2:2
Size: Discrete 1920x1079
Interval: Discrete 0.033s (30.000 fps)
Index : 1
Type : Video Capture
Pixel Format: 'NV16'
Name : Y/CbCr 4:2:2
For 1079,1077,1075,1073,1071 below command will got error below and no trace message.
nvidia@tegra-ubuntu:~$ gst-launch-1.0 -v v4l2src device=“/dev/video0” ! “video/x-raw,width=1920,height=1079, format=(string)I420” ! nvvidconv ! “video/x-raw(memory:NVMM)” ! nvoverlaysink
Setting pipeline to PAUSED …
Pipeline is live and does not need PREROLL …
Setting pipeline to PLAYING …
New clock: GstSystemClock
ERROR: from element /GstPipeline:pipeline0/GstV4l2Src:v4l2src0: Internal data flow error.
Additional debug info:
gstbasesrc.c(2948): gst_base_src_loop (): /GstPipeline:pipeline0/GstV4l2Src:v4l2src0:
streaming task paused, reason not-negotiated (-4)
Execution ended after 0:00:03.830170345
Setting pipeline to PAUSED …
Setting pipeline to READY …
Setting pipeline to NULL …
Freeing pipeline …
nvidia@tegra-ubuntu:~$
For 1078,1076,1074,1072,1070
nvidia@tegra-ubuntu:~$ gst-launch-1.0 -v v4l2src device=“/dev/video0” ! “video/x-raw,width=1920,height=1078, format=(string)I420” ! nvvidconv ! “video/x-raw(memory:NVMM)” ! nvoverlaysink
=> result got green screen
=> trace message same as 1080 about the tag: and data:
kworker/0:3-1279 [000] …1 238.595174: rtcpu_vinotify_handle_msg: tstamp:7849421085 tag:CSIMUX_FRAME channel:0x00 frame:3979 vi_tstamp:3554453068 data:0x000000a2
kworker/0:3-1279 [000] …1 238.595176: rtcpu_vinotify_handle_msg: tstamp:7849421222 tag:CHANSEL_SHORT_FRAME channel:0x04 frame:3979 vi_tstamp:3554453068 data:0x00000001
kworker/0:3-1279 [000] …1 238.595177: rtcpu_vinotify_handle_msg: tstamp:7849421358 tag:ATOMP_FE channel:0x00 frame:3979 vi_tstamp:3554453070 data:0x00000001
kworker/0:3-1279 [000] …1 238.595177: rtcpu_vinotify_handle_msg: tstamp:7849941614 tag:CSIMUX_FRAME channel:0x00 frame:12429 vi_tstamp:3554973904 data:0x000000a2
In the TRM,chapter “28.3.3.1 SCIL Features” shows the SCIL can support “Data lane swapping in D-PHY and trio swapping in C-PHY”. And chapter “28.4.2.2” and chapter “28.4.4” shows the details info about “Lane Merger”.
So i think this can fixed the HW issue of FoxK, but i didn’t find any source code about this function, neither in the driver nor in the dts files, how to enable and config this function ?
I find the register “NVCSI_PHY_0_NVCSI_CIL_LANE_SWIZZLE_CTRL_0”
I think this is the keypoint so i search “swizzle” in the kernel source, i find it!!
FoxK can try this or maybe you have modified your schematic, yes, it was more than one years ago