Hello,
TX2NX is encountering an issue with MIPI CSI 4K30 receiving, and the SOC is reporting the following error repeatedly: "
[66.421363] tegra-vi4 15700000.vi : PXL_SOF syncpt timeout! err = -11".
The detailed explanation is as follows: (Format is RGB888, MIPI channel uses 4 data + 1 clock mode)
Camera 4K60 comes in with 8 lanes, MIPI CLK speed is 1.86g, and reception is normal.
Camera 2K60 comes in with 4 lanes, MIPI CLK speed is 968M, and reception is normal (720P reception is also normal).
Camera 4K30 comes in with 4 lanes, MIPI CLK speed is 1.85g, and reception is abnormal, always reporting (PXL_SOF syncpt timeout).
Please help to investigate this issue. Thank you. he following is the DST configuration
DTS:
i2c@3160000 {
e2832@2b {
compatible = “nvidia,lt6911uxc”;
/* I2C device address */
reg = <0x2b>;
/* V4L2 device node location */
devnode = "video0";
/* Physical dimensions of sensor */
physical_w = "3.674";
physical_h = "2.738";
sensor_model = "e2832";
/* Define any required hw resources needed by driver */
/* ie. clocks, io pins, power sources */
avdd-reg = "vana";
iovdd-reg = "vif";
dvdd-reg = "vdig";
/* Defines number of frames to be dropped by driver internally after applying */
/* sensor crop settings. Some sensors send corrupt frames after applying */
/* crop co-ordinates */
/*post_crop_frame_drop = "0";*/
/**
* ==== Modes ====
* A modeX node is required to support v4l2 driver
* implementation with NVIDIA camera software stack
*
* == Signal properties ==
*
* phy_mode = "";
* PHY mode used by the MIPI lanes for this device
*
* tegra_sinterface = "";
* CSI Serial interface connected to tegra
* Incase of virtual HW devices, use virtual
* For SW emulated devices, use host
*
* pix_clk_hz = "";
* Sensor pixel clock used for calculations like exposure and framerate
*
* readout_orientation = "0";
* Based on camera module orientation.
* Only change readout_orientation if you specifically
* Program a different readout order for this mode
*
* == Image format Properties ==
*
* active_w = "";
* Pixel active region width
*
* active_h = "";
* Pixel active region height
*
* pixel_t = "";
* The sensor readout pixel pattern
*
* line_length = "";
* Pixel line length (width) for sensor mode.
*
* == Source Control Settings ==
*
* Gain factor used to convert fixed point integer to float
* Gain range [min_gain/gain_factor, max_gain/gain_factor]
* Gain step [step_gain/gain_factor is the smallest step that can be configured]
* Default gain [Default gain to be initialized for the control.
* use min_gain_val as default for optimal results]
* Framerate factor used to convert fixed point integer to float
* Framerate range [min_framerate/framerate_factor, max_framerate/framerate_factor]
* Framerate step [step_framerate/framerate_factor is the smallest step that can be configured]
* Default Framerate [Default framerate to be initialized for the control.
* use max_framerate to get required performance]
* Exposure factor used to convert fixed point integer to float
* For convenience use 1 sec = 1000000us as conversion factor
* Exposure range [min_exp_time/exposure_factor, max_exp_time/exposure_factor]
* Exposure step [step_exp_time/exposure_factor is the smallest step that can be configured]
* Default Exposure Time [Default exposure to be initialized for the control.
* Set default exposure based on the default_framerate for optimal exposure settings]
* For convenience use 1 sec = 1000000us as conversion factor
*
* gain_factor = ""; (integer factor used for floating to fixed point conversion)
* min_gain_val = ""; (ceil to integer)
* max_gain_val = ""; (ceil to integer)
* step_gain_val = ""; (ceil to integer)
* default_gain = ""; (ceil to integer)
* Gain limits for mode
*
* exposure_factor = ""; (integer factor used for floating to fixed point conversion)
* min_exp_time = ""; (ceil to integer)
* max_exp_time = ""; (ceil to integer)
* step_exp_time = ""; (ceil to integer)
* default_exp_time = ""; (ceil to integer)
* Exposure Time limits for mode (sec)
*
* framerate_factor = ""; (integer factor used for floating to fixed point conversion)
* min_framerate = ""; (ceil to integer)
* max_framerate = ""; (ceil to integer)
* step_framerate = ""; (ceil to integer)
* default_framerate = ""; (ceil to integer)
* Framerate limits for mode (fps)
*
* embedded_metadata_height = "";
* Sensor embedded metadata height in units of rows.
* If sensor does not support embedded metadata value should be 0.
* num_of_exposure = "";
* Digital overlap(Dol) frames
*
* num_of_ignored_lines = "";
* Used for cropping, eg. OB lines + Ignored area of effective pixel lines
*
* num_of_lines_offset_0 = "";
* Used for cropping, vertical blanking in front of short exposure data
* If more Dol frames are used, it can be extended, eg. num_of_lines_offset_1
*
* num_of_ignored_pixels = "";
* Used for cropping, The length of line info(pixels)
*
* num_of_left_margin_pixels = "";
* Used for cropping, the size of the left edge margin before
* the active pixel area (after ignored pixels)
*
* num_of_right_margin_pixels = "";
* Used for cropping, the size of the right edge margin after
* the active pixel area
*
*/
mode0 { // E2832_1920x1080_60Fps
mclk_khz = "12000";
num_lanes = "4";
tegra_sinterface = "serial_a";
phy_mode = "DPHY";
discontinuous_clk = "yes";
dpcm_enable = "false";
cil_settletime = "0";
active_w = "1920";
active_h = "1080";
mode_type = "rgb";
pixel_phase = "rgb888";
csi_pixel_bit_depth = "24";
readout_orientation = "0";
line_length = "1920";
inherent_gain = "1";
mclk_multiplier = "1";
pix_clk_hz = "1";
gain_factor = "16";
framerate_factor = "1000000";
exposure_factor = "1000000";
min_gain_val = "16"; /* 1.00x */
max_gain_val = "170"; /* 10.66x */
step_gain_val = "1";
default_gain = "16"; /* 1.00x */
min_hdr_ratio = "1";
max_hdr_ratio = "1";
min_framerate = "2000000"; /* 2.0 fps */
max_framerate = "30"; /* 60.0 fps */
step_framerate = "1";
default_framerate = "20000000"; /* 60.0 fps */
min_exp_time = "13"; /* us */
max_exp_time = "300000"; /* us */
step_exp_time = "1";
default_exp_time = "666666"; /* us */
};
mode1 { // E2832_3840x2160
mclk_khz = "24000";
num_lanes = "8";
tegra_sinterface = "serial_a";
phy_mode = "DPHY";
discontinuous_clk = "yes";
dpcm_enable = "false";
cil_settletime = "0";
active_w = "3840";
active_h = "2160";
mode_type = "rgb";
pixel_phase = "rgb888";
csi_pixel_bit_depth = "24";
readout_orientation = "0";
line_length = "3840";
inherent_gain = "1";
mclk_multiplier = "24";
pix_clk_hz = "576000000";
gain_factor = "16";
framerate_factor = "1000000";
exposure_factor = "1000000";
min_gain_val = "16"; /* 1.00x */
max_gain_val = "170"; /* 10.66x */
step_gain_val = "1";
default_gain = "16"; /* 1.00x */
min_hdr_ratio = "1";
max_hdr_ratio = "1";
min_framerate = "2000000"; /* 2.0 fps */
max_framerate = "60000000"; /* 60.0 fps */
step_framerate = "1";
default_framerate = "60000000"; /* 60.0 fps */
min_exp_time = "13"; /* us */
max_exp_time = "683709"; /* us */
step_exp_time = "1";
default_exp_time = "16667"; /* us */
};
mode2 { // E2832_1280x720_60Fps
mclk_khz = "24000";
num_lanes = "4";
tegra_sinterface = "serial_a";
phy_mode = "DPHY";
discontinuous_clk = "yes";
dpcm_enable = "false";
cil_settletime = "0";
active_w = "1280";
active_h = "720";
mode_type = "rgb";
pixel_phase = "rgb888";
csi_pixel_bit_depth = "24";
readout_orientation = "0";
line_length = "1280";
inherent_gain = "1";
mclk_multiplier = "24";
pix_clk_hz = "576000000";
gain_factor = "16";
framerate_factor = "1000000";
exposure_factor = "1000000";
min_gain_val = "16"; /* 1.00x */
max_gain_val = "170"; /* 10.66x */
step_gain_val = "1";
default_gain = "16"; /* 1.00x */
min_hdr_ratio = "1";
max_hdr_ratio = "1";
min_framerate = "2000000"; /* 2.0 fps */
max_framerate = "60000000"; /* 60.0 fps */
step_framerate = "1";
default_framerate = "60000000"; /* 60.0 fps */
min_exp_time = "13"; /* us */
max_exp_time = "683709"; /* us */
step_exp_time = "1";
default_exp_time = "16667"; /* us */
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
e2832_out0: endpoint {
port-index = <0>;
bus-width = <8>;
remote-endpoint = <&e2832_csi_in0>;
};
};
};
};
};
};
hello 15521198701,
your DST configuration still works with 8-lane config.
for example,
also, please check Sensor Pixel Clock section to examine your clock settings.
hi ,jerry
When receiving 1080P60 with the configuration bus-width = <8>;
, the VI can still obtain the image
hello 15521198701,
device tree settings need to be identical with your hardware setups.
if your camera stream actually output with 4-lane, please use bus-width = <4>;
in device tree accordingly.
TrevinN:
bus-width = <8>;
OK, and may I ask what does num_lanes = ""
represent, and is it necessary to match the value in bus-width = <>
?"
OK, and may I ask what does num_lanes = ""
represent, and is it necessary to match the value in bus-width = <>
?"
“After modifying bus-width = <4>;
, there are exceptions when receiving 4K30, with an error of ‘tegra-vi4 15700000.vi : PXL_SOF syncpt timeout! err = -11’ reported. Is there any way to locate the problem, such as checking the clock and data status of the camera? Currently unable to locate the problem, which is more troublesome.”
DTS:
mode0 { // E2832_1920x1080_60Fps
mclk_khz = "12000";
num_lanes = "4";
tegra_sinterface = "serial_a";
phy_mode = "DPHY";
discontinuous_clk = "yes";
dpcm_enable = "false";
cil_settletime = "0";
active_w = "1920";
active_h = "1080";
mode_type = "rgb";
pixel_phase = "rgb888";
csi_pixel_bit_depth = "24";
readout_orientation = "0";
line_length = "1920";
inherent_gain = "1";
mclk_multiplier = "1";
pix_clk_hz = "1";
gain_factor = "16";
framerate_factor = "1000000";
exposure_factor = "1000000";
min_gain_val = "16"; /* 1.00x */
max_gain_val = "170"; /* 10.66x */
step_gain_val = "1";
default_gain = "16"; /* 1.00x */
min_hdr_ratio = "1";
max_hdr_ratio = "1";
min_framerate = "2000000"; /* 2.0 fps */
max_framerate = "30"; /* 60.0 fps */
step_framerate = "1";
default_framerate = "20000000"; /* 60.0 fps */
min_exp_time = "13"; /* us */
max_exp_time = "300000"; /* us */
step_exp_time = "1";
default_exp_time = "666666"; /* us */
};
mode1 { // E2832_3840x2160
mclk_khz = "24000";
num_lanes = "4";
tegra_sinterface = "serial_a";
phy_mode = "DPHY";
discontinuous_clk = "yes";
dpcm_enable = "false";
cil_settletime = "0";
active_w = "3840";
active_h = "2160";
mode_type = "rgb";
pixel_phase = "rgb888";
csi_pixel_bit_depth = "24";
readout_orientation = "0";
line_length = "3840";
inherent_gain = "1";
mclk_multiplier = "24";
pix_clk_hz = "576000000";
gain_factor = "16";
framerate_factor = "1000000";
exposure_factor = "1000000";
min_gain_val = "16"; /* 1.00x */
max_gain_val = "170"; /* 10.66x */
step_gain_val = "1";
default_gain = "16"; /* 1.00x */
min_hdr_ratio = "1";
max_hdr_ratio = "1";
min_framerate = "2000000"; /* 2.0 fps */
max_framerate = "60000000"; /* 60.0 fps */
step_framerate = "1";
default_framerate = "60000000"; /* 60.0 fps */
min_exp_time = "13"; /* us */
max_exp_time = "683709"; /* us */
step_exp_time = "1";
default_exp_time = "16667"; /* us */
};
mode2 { // E2832_1280x720_60Fps
mclk_khz = "24000";
num_lanes = "4";
tegra_sinterface = "serial_a";
phy_mode = "DPHY";
discontinuous_clk = "yes";
dpcm_enable = "false";
cil_settletime = "0";
active_w = "1280";
active_h = "720";
mode_type = "rgb";
pixel_phase = "rgb888";
csi_pixel_bit_depth = "24";
readout_orientation = "0";
line_length = "1280";
inherent_gain = "1";
mclk_multiplier = "24";
pix_clk_hz = "576000000";
gain_factor = "16";
framerate_factor = "1000000";
exposure_factor = "1000000";
min_gain_val = "16"; /* 1.00x */
max_gain_val = "170"; /* 10.66x */
step_gain_val = "1";
default_gain = "16"; /* 1.00x */
min_hdr_ratio = "1";
max_hdr_ratio = "1";
min_framerate = "2000000"; /* 2.0 fps */
max_framerate = "60000000"; /* 60.0 fps */
step_framerate = "1";
default_framerate = "60000000"; /* 60.0 fps */
min_exp_time = "13"; /* us */
max_exp_time = "683709"; /* us */
step_exp_time = "1";
default_exp_time = "16667"; /* us */
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
e2832_out0: endpoint {
port-index = <0>;
bus-width = <4>;
remote-endpoint = <&e2832_csi_in0>;
};
};
};
TrevinN:
“After modifying bus-width = <4>;
, there are exceptions when receiving 4K30, with an error of ‘tegra-vi4 15700000.vi : PXL_SOF syncpt timeout! err = -11’ reported. Is there any way to locate the problem, such as checking the clock and data status of the camera? Currently unable to locate the problem, which is more troublesome.”
DTS:
mode0 { // E2832_1920x1080_60Fps
mclk_khz = "12000";
num_lanes = "4";
tegra_sinterface = "serial_a";
phy_mode = "DPHY";
discontinuous_clk = "yes";
dpcm_enable = "false";
cil_settletime = "0";
active_w = "1920";
active_h = "1080";
mode_type = "rgb";
pixel_phase = "rgb888";
csi_pixel_bit_depth = "24";
readout_orientation = "0";
line_length = "1920";
inherent_gain = "1";
mclk_multiplier = "1";
pix_clk_hz = "1";
gain_factor = "16";
framerate_factor = "1000000";
exposure_factor = "1000000";
min_gain_val = "16"; /* 1.00x */
max_gain_val = "170"; /* 10.66x */
step_gain_val = "1";
default_gain = "16"; /* 1.00x */
min_hdr_ratio = "1";
max_hdr_ratio = "1";
min_framerate = "2000000"; /* 2.0 fps */
max_framerate = "30"; /* 60.0 fps */
step_framerate = "1";
default_framerate = "20000000"; /* 60.0 fps */
min_exp_time = "13"; /* us */
max_exp_time = "300000"; /* us */
step_exp_time = "1";
default_exp_time = "666666"; /* us */
};
mode1 { // E2832_3840x2160
mclk_khz = "24000";
num_lanes = "4";
tegra_sinterface = "serial_a";
phy_mode = "DPHY";
discontinuous_clk = "yes";
dpcm_enable = "false";
cil_settletime = "0";
active_w = "3840";
active_h = "2160";
mode_type = "rgb";
pixel_phase = "rgb888";
csi_pixel_bit_depth = "24";
readout_orientation = "0";
line_length = "3840";
inherent_gain = "1";
mclk_multiplier = "24";
pix_clk_hz = "576000000";
gain_factor = "16";
framerate_factor = "1000000";
exposure_factor = "1000000";
min_gain_val = "16"; /* 1.00x */
max_gain_val = "170"; /* 10.66x */
step_gain_val = "1";
default_gain = "16"; /* 1.00x */
min_hdr_ratio = "1";
max_hdr_ratio = "1";
min_framerate = "2000000"; /* 2.0 fps */
max_framerate = "60000000"; /* 60.0 fps */
step_framerate = "1";
default_framerate = "60000000"; /* 60.0 fps */
min_exp_time = "13"; /* us */
max_exp_time = "683709"; /* us */
step_exp_time = "1";
default_exp_time = "16667"; /* us */
};
mode2 { // E2832_1280x720_60Fps
mclk_khz = "24000";
num_lanes = "4";
tegra_sinterface = "serial_a";
phy_mode = "DPHY";
discontinuous_clk = "yes";
dpcm_enable = "false";
cil_settletime = "0";
active_w = "1280";
active_h = "720";
mode_type = "rgb";
pixel_phase = "rgb888";
csi_pixel_bit_depth = "24";
readout_orientation = "0";
line_length = "1280";
inherent_gain = "1";
mclk_multiplier = "24";
pix_clk_hz = "576000000";
gain_factor = "16";
framerate_factor = "1000000";
exposure_factor = "1000000";
min_gain_val = "16"; /* 1.00x */
max_gain_val = "170"; /* 10.66x */
step_gain_val = "1";
default_gain = "16"; /* 1.00x */
min_hdr_ratio = "1";
max_hdr_ratio = "1";
min_framerate = "2000000"; /* 2.0 fps */
max_framerate = "60000000"; /* 60.0 fps */
step_framerate = "1";
default_framerate = "60000000"; /* 60.0 fps */
min_exp_time = "13"; /* us */
max_exp_time = "683709"; /* us */
step_exp_time = "1";
default_exp_time = "16667"; /* us */
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
e2832_out0: endpoint {
port-index = <0>;
bus-width = <4>;
remote-endpoint = <&e2832_csi_in0>;
};
};
};
hello 15521198701,
VI tracing logs… tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
which means VI engine cannot wait start-of-frame within timeout limit.
this usually due to the signal issue on CSI channel, such as incomplete or intermittent MIPI signaling.
the quickest way is setting up oscilloscope to probe/check the high-speed signals.
“Hello, in our project, the camera end increased the pixel clock by 10M, which translates to a MIPI CLK of 232MHZ * 8 = 1.856gb/s, while the normal theoretical value is 222MHZ*8 =1.76gb/s. Would this increase in 10M pixel clock deviation affect the SOC and cause VI reception timeout?”
2023/4/17 10:49:56
in this case :
“Adding to the information: the camera signal format is 4K30 RGB888.”
hello 15521198701,
had you update the pixel clock settings, and update the device tree binary to your target correctly?
HI Jerry,
If the input resolution, such as 3840*1080, is a non-standard resolution and is not configured in the DTS mode, can the VI work properly?
device tree settings should be identical with the active pixels that sensor actually outputting.
So does this mean that in order to add a resolution, the corresponding mode for that resolution must be configured in the dts, and only then VCAP can capture images?
hello 15521198701
may I double confirm what’s VCAP you’re mentioned.
furthermore, it’s device tree settings to report hardware specific settings.
there are… sensor_signal_properties / sensor_image_properties / sensor_control_properties.
there’re hardware specific settings, i.e. clocks, GPIOs, regulators…etc
sensor specific settings, i.e. slave add., width/height, pixel format, pixel clock…etc.
camera platform specific settings, i.e. all the settings within the field of tegra-camera-platform{…}
and… V4L2 media controller specific settings. i.e. those VI/CSI/sensor port bindings.
2023/4/18 15:19:31
“I would like to know if it is possible to dynamically add resolutions, in addition to manually adding them through modeX nodes in the device tree, and have them take effect with the VIDIOC_S_FMT command. According to testing, if a resolution used by VIDIOC_S_FMT is not included in the modeX list , it will not work.”
hello TrevinN,
is the process involved reload the kernel module, *.ko file?
otherwise, it parse the mode table while kernel init.
hello,jerry ,
I will be very grateful for your answer。 I have a general understanding of what you are saying. Regarding the modeX list in the device tree, do we need to differentiate between 30fps and 60fps for the same resolution? Currently, my modeX configuration is set to 60fps, but it also works properly when the input frame rate is 30fps. If the frame rate is not differentiated in the DTS modeX list, what impact will this have?"