Configuration of imx264 with mipi 2 lane for LI-JTX1-MIPI-ADPT-6CAM on TX2

Camera sensor is working Properly with mipi 4 lane configuration with “LI-JTX1-MIPI-ADPT” on TX2 board, but as per requirement it needs to be configured for mipi 2 lane with “LI-JTX1-MIPI-ADPT-6CAM” on TX2 board.

For make it work:
- The camera sensor Imx264 is programmed for 2 lane configuration using FPGA binary file “cmos2mipi_top_cmos2mipi_top.rbt” (which is used for 2 lane mipi output with LI-TX1-CB-6CAM liopard board ).
- Modified dtsi file “tegra186-camera-li-mipi-adpt-a00.dtsi” for mipi 2 lane.

After All this modification we are not getting any frame.
We are getting error “PXL_SOF syncpt timeout! err = -11”

command for capture:

v4l2-ctl -V --set-fmt-video=width=2464,height=2058,pixelformat=RG12 --set-ctrl bypass_mode=0 --stream-mmap --stream-count=1 --stream-to=imx264.raw -d /dev/video0

dmesg log:

[  365.328949] imx264 30-0010: imx264_power_on: power on
[  365.334072] reset-gpio: 461
[  365.338511] nvcsi 150c0000.nvcsi: csi port:0
[  365.375007] tegra-vi4 15700000.vi: Create Surface with imgW=2464, imgH=2058, memFmt=32
[  365.383643] nvcsi 150c0000.nvcsi: csi4_start_streaming ports index=0, lanes=2
[  365.390830] nvcsi 150c0000.nvcsi: csi4_stream_init
[  365.395658] nvcsi 150c0000.nvcsi: csi4_stream_config
[  365.400643] nvcsi 150c0000.nvcsi: csi4_stream_config (0) read VC0_DPCM_CTRL = 00000000
[  365.408567] nvcsi 150c0000.nvcsi: csi4_phy_config
[  365.413282] nvcsi 150c0000.nvcsi: NVCSI_CIL_CONFIG = 00000000
[  365.419042] nvcsi 150c0000.nvcsi: cil_settingtime is pulled from device
[  365.425660] nvcsi 150c0000.nvcsi: cil core clock: 204, csi clock: 102
[  365.432106] nvcsi 150c0000.nvcsi: cil_settingtime was autocalculated
[  365.438463] nvcsi 150c0000.nvcsi: csi settle time: 33, cil settle time: 25
[  365.445356] imx264 30-0010: imx264_s_stream++ enable 1
[  365.539131] video4linux video0: tegra_channel_capture_frame: vi4 got SOF syncpt buf[ffffffc1d09e1400]
[  365.548396] video4linux video0: tegra_channel_release_frame: vi4 got EOF syncpt buf[ffffffc1d09e1400]
[  365.557644] video4linux video0: release_buffer: capture init latency is 183 ms
[  365.565050] video4linux video0: release_buffer: release buf[ffffffc1d09e1400] frame[1] to user-space
[  366.545978] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  366.552356] video4linux video0: tegra_channel_capture_frame: vi4 got SOF syncpt buf[ffffffc1e460d000]
[  366.561639] video4linux video0: tegra_channel_release_frame: vi4 got EOF syncpt buf[ffffffc1e460d000]
[  366.570924] video4linux video0: release_buffer: release buf[ffffffc1e460d000] frame[2] to user-space
[  367.569962] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  367.576336] video4linux video0: tegra_channel_capture_frame: vi4 got SOF syncpt buf[ffffffc1d09de400]
[  367.585632] video4linux video0: tegra_channel_release_frame: vi4 got EOF syncpt buf[ffffffc1d09de400]
[  367.594898] video4linux video0: release_buffer: release buf[ffffffc1d09de400] frame[3] to user-space
[  368.593971] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  368.600357] video4linux video0: tegra_channel_capture_frame: vi4 got SOF syncpt buf[ffffffc1d09ddc00]
[  368.609661] video4linux video0: tegra_channel_release_frame: vi4 got EOF syncpt buf[ffffffc1d09ddc00]
[  368.618958] video4linux video0: release_buffer: release buf[ffffffc1d09ddc00] frame[4] to user-space
[  369.626000] tegra-vi4 15700000.vi: ATOMP_FE syncpt timeout!
[  369.631598] video4linux video0: release_buffer: release buf[ffffffc1d09e1400] frame[5] to user-space
[  369.641243] imx264 30-0010: imx264_s_stream++ enable 0
[  369.667638] nvcsi 150c0000.nvcsi: csi4_stop_streaming ports index=0, lanes=2
[  369.674691] nvcsi 150c0000.nvcsi: csi4_phy_config
[  369.679415] nvcsi 150c0000.nvcsi: NVCSI_CIL_CONFIG = 00000002
[  369.685745] nvcsi 150c0000.nvcsi: csi4_stream_check_status
[  369.691263] nvcsi 150c0000.nvcsi: csi4_cil_check_status 340
[  369.707195] imx264 30-0010: imx264_power_off: power off

Trace log:

root@tegra-ubuntu:~# cat /sys/kernel/debug/tracing/trace
# tracer: nop
#
# entries-in-buffer/entries-written: 35/35   #P:4
#
#                              _-----=> irqs-off
#                             / _----=> need-resched
#                            | / _---=> hardirq/softirq
#                            || / _--=> preempt-depth
#                            ||| /     delay
#           TASK-PID   CPU#  ||||    TIMESTAMP  FUNCTION
#              | |       |   ||||       |         |
     kworker/4:1-107   [004] ...1   365.413955: rtos_queue_peek_from_isr_failed: tstamp:11754003712 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   365.413965: rtcpu_start: tstamp:11754004922
     kworker/4:1-107   [004] ...1   365.574253: rtos_queue_peek_from_isr_failed: tstamp:11759004592 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   365.574261: rtcpu_vinotify_handle_msg: tstamp:11759138366 tag:CHANSEL_PXL_SOF channel:0x00 frame:1 vi_tstamp:3169203021 data:0x00000001
     kworker/4:1-107   [004] ...1   365.574261: rtcpu_vinotify_handle_msg: tstamp:11759138514 tag:ATOMP_FS channel:0x00 frame:1 vi_tstamp:3169203026 data:0x00000000
     kworker/4:1-107   [004] ...1   365.574262: rtcpu_vinotify_handle_msg: tstamp:11759138624 tag:CHANSEL_FAULT channel:0x00 frame:1 vi_tstamp:3169203363 data:0x00000200
     kworker/4:1-107   [004] ...1   365.574262: rtcpu_vinotify_handle_msg: tstamp:11759139415 tag:CHANSEL_LOAD_FRAMED channel:0x01 frame:1 vi_tstamp:3169204162 data:0x08000000
     kworker/4:1-107   [004] ...1   365.574263: rtcpu_vinotify_handle_msg: tstamp:11759139512 tag:CHANSEL_FAULT_FE channel:0x01 frame:1 vi_tstamp:3169204163 data:0x00000001
     kworker/4:1-107   [004] ...1   365.574263: rtcpu_vinotify_handle_msg: tstamp:11759139642 tag:ATOMP_FE channel:0x00 frame:1 vi_tstamp:3169204166 data:0x00000000
     kworker/4:1-107   [004] ...1   365.729950: rtos_queue_peek_from_isr_failed: tstamp:11764005120 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   365.885953: rtos_queue_peek_from_isr_failed: tstamp:11769005603 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   366.041954: rtos_queue_peek_from_isr_failed: tstamp:11774006144 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   366.197948: rtos_queue_peek_from_isr_failed: tstamp:11779006615 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   366.353949: rtos_queue_peek_from_isr_failed: tstamp:11784007123 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   366.509950: rtos_queue_peek_from_isr_failed: tstamp:11789007632 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   366.673953: rtos_queue_peek_from_isr_failed: tstamp:11794008140 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   366.829962: rtos_queue_peek_from_isr_failed: tstamp:11799008679 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   366.985949: rtos_queue_peek_from_isr_failed: tstamp:11804009153 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   367.141950: rtos_queue_peek_from_isr_failed: tstamp:11809009658 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   367.297953: rtos_queue_peek_from_isr_failed: tstamp:11814010185 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   367.505951: rtos_queue_peek_from_isr_failed: tstamp:11819010672 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   367.661979: rtos_queue_peek_from_isr_failed: tstamp:11824011171 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   367.817954: rtos_queue_peek_from_isr_failed: tstamp:11829011685 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   367.973975: rtos_queue_peek_from_isr_failed: tstamp:11834012193 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   368.129950: rtos_queue_peek_from_isr_failed: tstamp:11839012742 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   368.285950: rtos_queue_peek_from_isr_failed: tstamp:11844013207 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   368.441959: rtos_queue_peek_from_isr_failed: tstamp:11849013736 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   368.600347: rtos_queue_peek_from_isr_failed: tstamp:11854014220 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   368.753959: rtos_queue_peek_from_isr_failed: tstamp:11859014728 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   368.909955: rtos_queue_peek_from_isr_failed: tstamp:11864015232 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   369.065950: rtos_queue_peek_from_isr_failed: tstamp:11869015741 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   369.221964: rtos_queue_peek_from_isr_failed: tstamp:11874016292 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   369.377948: rtos_queue_peek_from_isr_failed: tstamp:11879016754 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   369.585977: rtos_queue_peek_from_isr_failed: tstamp:11884017259 queue:0x0b4a3c58
     kworker/4:1-107   [004] ...1   369.689964: rtos_queue_peek_from_isr_failed: tstamp:11887328462 queue:0x0b4a3c58
root@tegra-ubuntu:~#

bellow is dtsi node Configuration for mipi 2 lane:

/*
 * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

/ {
	host1x {
		vi@15700000 {
			num-channels = <1>;
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					liimx264_vi_in0: endpoint {
						csi-port = <0>;
						bus-width = <2>;
						remote-endpoint = <&liimx264_csi_out0>;
					};
				};
			};
		};

		nvcsi@150c0000 {
			num-channels = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
			channel@0 {
				reg = <0>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						liimx264_csi_in0: endpoint@0 {
							csi-port = <0>;
							bus-width = <2>;
							remote-endpoint = <&liimx264_imx264_out0>;
						};
					};
					port@1 {
						reg = <1>;
						liimx264_csi_out0: endpoint@1 {
							remote-endpoint = <&liimx264_vi_in0>;
						};
					};
				};
			};

		};
	};

	i2c@3180000 {
		tca9548@77 {
			i2c@0 {
			imx264_a@10 {
				compatible = "nvidia,imx264";

				reg = <0x10>;
				devnode = "video0";

				/* Physical dimensions of sensor */
				physical_w = "15.0";
				physical_h = "12.5";

				sensor_model ="imx264";
				/* Define any required hw resources needed by driver */
				/* ie. clocks, io pins, power sources */

				/* Defines number of frames to be dropped by driver internally after applying */
				/* sensor crop settings. Some sensors send corrupt frames after applying */
				/* crop co-ordinates */
				post_crop_frame_drop = "0";

				/* Convert Gain to unit of dB (decibel) befor passing to kernel driver */
				use_decibel_gain = "true";

				/* if true, delay gain setting by one frame to be in sync with exposure */
				//delayed_gain = "true";

				/* enable CID_SENSOR_MODE_ID for sensor modes selection */
				use_sensor_mode_id = "true";

				/**
				* A modeX node is required to support v4l2 driver
				* implementation with NVIDIA camera software stack
				*
				* mclk_khz = "";
				* Standard MIPI driving clock, typically 24MHz
				*
				* num_lanes = "";
				* Number of lane channels sensor is programmed to output
				*
				* tegra_sinterface = "";
				* The base tegra serial interface lanes are connected to
				*
				* discontinuous_clk = "";
				* The sensor is programmed to use a discontinuous clock on MIPI lanes
				*
				* dpcm_enable = "true";
				* The sensor is programmed to use a DPCM modes
				*
				* cil_settletime = "";
				* MIPI lane settle time value.
				* A "0" value attempts to autocalibrate based on mclk_multiplier
				*
				* active_w = "";
				* Pixel active region width
				*
				* active_h = "";
				* Pixel active region height
				*
				* dynamic_pixel_bit_depth = "";
				* sensor dynamic bit depth for sensor mode
				*
				* csi_pixel_bit_depth = "";
				* sensor output bit depth for sensor mode
				*
				* mode_type="";
				* Sensor mode type, For eg: yuv, Rgb, bayer, bayer_wdr_pwl
				*
				* pixel_phase="";
				* Pixel phase for sensor mode, For eg: rggb, vyuy, rgb888
				*
				* readout_orientation = "0";
				* Based on camera module orientation.
				* Only change readout_orientation if you specifically
				* Program a different readout order for this mode
				*
				* line_length = "";
				* Pixel line length (width) for sensor mode.
				* This is used to calibrate features in our camera stack.
				*
				* mclk_multiplier = "";
				* Multiplier to MCLK to help time hardware capture sequence
				* TODO: Assign to PLL_Multiplier as well until fixed in core
				*
				* pix_clk_hz = "";
				* Sensor pixel clock used for calculations like exposure and framerate
				*
				*
				*
				*
				* inherent_gain = "";
				* Gain obtained inherently from mode (ie. pixel binning)
				*
				* min_gain_val = ""; (floor to 6 decimal places)
				* max_gain_val = ""; (floor to 6 decimal places)
				* Gain limits for mode
				* if use_decibel_gain = "true", please set the gain as decibel
				*
				* min_exp_time = ""; (ceil to integer)
				* max_exp_time = ""; (ceil to integer)
				* Exposure Time limits for mode (us)
				*
				*
				* min_hdr_ratio = "";
				* max_hdr_ratio = "";
				* HDR Ratio limits for mode
				*
				* min_framerate = "";
				* max_framerate = "";
				* Framerate limits for mode (fps)
				*
				* embedded_metadata_height = "";
				* Sensor embedded metadata height in units of rows.
				* If sensor does not support embedded metadata value should be 0.
				*/

				mode0 {/*mode IMX264_MODE_1920X1080_CROP_30FPS*/
					mclk_khz = "37125";
					num_lanes = "2";
					tegra_sinterface = "serial_a";
					discontinuous_clk = "no";
					dpcm_enable = "false";
					cil_settletime = "0";
					dynamic_pixel_bit_depth = "12";
					csi_pixel_bit_depth = "12";
					mode_type = "bayer";
					pixel_phase = "rggb";
					pixel_t = "bayer_rggb12";

					active_w = "2464";
					active_h = "2058";
					readout_orientation = "0";
					line_length = "2656";
					inherent_gain = "1";
					mclk_multiplier = "2";
					pix_clk_hz = "148500000";

					min_gain_val = "0"; /* dB */
					max_gain_val = "24"; /* dB */
					min_hdr_ratio = "1";
					max_hdr_ratio = "1";
					min_framerate = "1.5";
					max_framerate = "30";
					min_exp_time = "30";
					max_exp_time = "660000";
					embedded_metadata_height = "0";
				};
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						liimx264_imx264_out0: endpoint {
							csi-port = <0>;
							bus-width = <2>;
							remote-endpoint = <&liimx264_csi_in0>;
							};
						};
					};
				};
			};
		};
	};
};

/ {

	tegra-camera-platform {
		compatible = "nvidia, tegra-camera-platform";
		/**
		* Physical settings to calculate max ISO BW
		*
		* num_csi_lanes = <>;
		* Total number of CSI lanes when all cameras are active
		*
		* max_lane_speed = <>;
		* Max lane speed in Kbit/s
		*
		* min_bits_per_pixel = <>;
		* Min bits per pixel
		*
		* vi_peak_byte_per_pixel = <>;
		* Max byte per pixel for the VI ISO case
		*
		* vi_bw_margin_pct = <>;
		* Vi bandwidth margin in percentage
		*
		* max_pixel_rate = <>;
		* Max pixel rate in Kpixel/s for the ISP ISO case
		*
		* isp_peak_byte_per_pixel = <>;
		* Max byte per pixel for the ISP ISO case
		*
		* isp_bw_margin_pct = <>;
		* Isp bandwidth margin in percentage
		*/
		num_csi_lanes = <2>;  // updated it according to how many cameras are connected
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <10>;
		vi_peak_byte_per_pixel = <2>;
		vi_bw_margin_pct = <25>;
		isp_peak_byte_per_pixel = <5>;
		isp_bw_margin_pct = <25>;

		/**
		 * The general guideline for naming badge_info contains 3 parts, and is as follows,
		 * The first part is the camera_board_id for the module; if the module is in a FFD
		 * platform, then use the platform name for this part.
		 * The second part contains the position of the module, ex. "rear" or "front".
		 * The third part contains the last 6 characters of a part number which is found
		 * in the module's specsheet from the vender.
		 */
		modules {
			module0 {
				badge = "imx264_bottomleft_liimx264";
				position = "bottomleft";
				orientation = "1";
				drivernode0 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "imx264 30-0010";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@0/imx264_a@10";
				};
			};
		};
	};
};

hello Rathore0129,

according to your tracing logs, it shows there’s PIXEL_SHORT_LINE failure.

due to you had verified it’s working properly with 4-lane configuration, suggest you double check pixel_clk_hz property settings.
you might also check Sensor Driver Programming Guide, and please refer to [Sensor Pixel Clock] session for details.
thanks

Hi JerryChang,

With reference to the “Sensor Pixel Clock” session, pix_clk_hz is calculated with the method:
1.“Using sensor CSI lane output rate”
Sensor data rate per channel = 594 Mbps (from datasheet of Imx264)
number of CSI lane = 2
Bits per pixel = 12

DTS is modified with below values:

pix_clk_hz = "99000000";

Error remains same as “PXL_SOF syncpt timeout! err = -11”
Trace log error is also same as previous.

In driver for imx264 “pix_clk_hz” is only used to calculate frame rate and exposure time value.
So, We suspect that modification in “pix_clk_hz” value doesn’t come in picture when we use below command to capture raw image.

v4l2-ctl -V --set-fmt-video=width=2464,height=2058,pixelformat=RG12 --set-ctrl bypass_mode=0 --stream-mmap --stream-count=1 --stream-to=imx264.raw -d /dev/video0

Is there anything we are missing?
Please provide your inputs on it.

hello Rathore0129,

below register report there’s a PIXEL_SHORT_LINE failure.

CHANSEL_FAULT channel:0x00 frame:1 vi_tstamp:3169203363 data:0x00000200

please also share the VI tracing logs with your 99Mhz pixel clock configuration.
if you still saw the same failures,
please review the sensor specification and check the active_w and line_length settings.
thanks

Hi JerryChang,

Thanks for your input.
Below are the trace log for “99Mhz” pixel clock configuration, which are similar to previous log.

nvidia@tegra-ubuntu:~$ sudo cat /sys/kernel/debug/tracing/trace
# tracer: nop
#
# entries-in-buffer/entries-written: 35/35   #P:4
#
#                              _-----=> irqs-off
#                             / _----=> need-resched
#                            | / _---=> hardirq/softirq
#                            || / _--=> preempt-depth
#                            ||| /     delay
#           TASK-PID   CPU#  ||||    TIMESTAMP  FUNCTION
#              | |       |   ||||       |         |
     kworker/5:2-322   [005] ...1   136.957978: rtos_queue_peek_from_isr_failed: tstamp:4614916744 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   136.957983: rtcpu_start: tstamp:4614917793
     kworker/5:2-322   [005] ...1   137.114035: rtos_queue_peek_from_isr_failed: tstamp:4619917603 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   137.114042: rtcpu_vinotify_handle_msg: tstamp:4620125460 tag:CHANSEL_PXL_SOF channel:0x00 frame:1 vi_tstamp:325157394 data:0x00000001
     kworker/5:2-322   [005] ...1   137.114044: rtcpu_vinotify_handle_msg: tstamp:4620125653 tag:ATOMP_FS channel:0x00 frame:1 vi_tstamp:325157399 data:0x00000000
     kworker/5:2-322   [005] ...1   137.114045: rtcpu_vinotify_handle_msg: tstamp:4620125791 tag:<b>CHANSEL_FAULT channel:0x00 frame:1 vi_tstamp:325157736 data:0x00000200</b>
     kworker/5:2-322   [005] ...1   137.114047: rtcpu_vinotify_handle_msg: tstamp:4620126613 tag:CHANSEL_LOAD_FRAMED channel:0x01 frame:1 vi_tstamp:325158641 data:0x08000000
     kworker/5:2-322   [005] ...1   137.114048: rtcpu_vinotify_handle_msg: tstamp:4620126744 tag:CHANSEL_FAULT_FE channel:0x01 frame:1 vi_tstamp:325158651 data:0x00000001
     kworker/5:2-322   [005] ...1   137.114050: rtcpu_vinotify_handle_msg: tstamp:4620126907 tag:ATOMP_FE channel:0x00 frame:1 vi_tstamp:325158654 data:0x00000000
     kworker/5:2-322   [005] ...1   137.270026: rtos_queue_peek_from_isr_failed: tstamp:4624918116 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   137.426025: rtos_queue_peek_from_isr_failed: tstamp:4629918617 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   137.582025: rtos_queue_peek_from_isr_failed: tstamp:4634919121 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   137.738026: rtos_queue_peek_from_isr_failed: tstamp:4639919629 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   137.894027: rtos_queue_peek_from_isr_failed: tstamp:4644920134 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   138.050020: rtos_queue_peek_from_isr_failed: tstamp:4649920642 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   138.210037: rtos_queue_peek_from_isr_failed: tstamp:4654921147 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   138.366019: rtos_queue_peek_from_isr_failed: tstamp:4659921656 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   138.522020: rtos_queue_peek_from_isr_failed: tstamp:4664922161 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   138.678017: rtos_queue_peek_from_isr_failed: tstamp:4669922670 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   138.834020: rtos_queue_peek_from_isr_failed: tstamp:4674923177 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   138.990022: rtos_queue_peek_from_isr_failed: tstamp:4679923683 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   139.198015: rtos_queue_peek_from_isr_failed: tstamp:4684924190 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   139.354067: rtos_queue_peek_from_isr_failed: tstamp:4689924697 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   139.510025: rtos_queue_peek_from_isr_failed: tstamp:4694925204 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   139.666020: rtos_queue_peek_from_isr_failed: tstamp:4699925713 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   139.822024: rtos_queue_peek_from_isr_failed: tstamp:4704926217 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   139.978022: rtos_queue_peek_from_isr_failed: tstamp:4709926726 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   140.134007: rtos_queue_peek_from_isr_failed: tstamp:4714927230 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   140.290026: rtos_queue_peek_from_isr_failed: tstamp:4719927739 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   140.446022: rtos_queue_peek_from_isr_failed: tstamp:4724928247 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   140.602020: rtos_queue_peek_from_isr_failed: tstamp:4729928752 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   140.758030: rtos_queue_peek_from_isr_failed: tstamp:4734929260 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   140.914025: rtos_queue_peek_from_isr_failed: tstamp:4739929765 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   141.070021: rtos_queue_peek_from_isr_failed: tstamp:4744930273 queue:0x0b4a3c58
     kworker/5:2-322   [005] ...1   141.174112: rtos_queue_peek_from_isr_failed: tstamp:4747345843 queue:0x0b4a3c58

please review the sensor specification and check the active_h and line_length settings.
–> I have looked into active_h & line_length parameter setting, where according to my understanding “line_lenght” value should be equal or more than “active_w” and here it is already as per the requirement.

Here I want to update you with 4-lane dtsi configuration and 2-lane dtsi configuration.
Just to get idea about what changes are done for 2-lane configuration.

4-lane working dtsi configuration:

{
	host1x {
		vi@15700000 {
			num-channels = <1>;
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					liimx264_vi_in0: endpoint {
						csi-port = <0>;
						bus-width = <4>;
						remote-endpoint = <&liimx264_csi_out0>;
					};
				};
			};
		};

		nvcsi@150c0000 {
			num-channels = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
			channel@0 {
				reg = <0>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						liimx264_csi_in0: endpoint@0 {
							csi-port = <0>;
							bus-width = <4>;
							remote-endpoint = <&liimx264_imx264_out0>;
						};
					};
					port@1 {
						reg = <1>;
						liimx264_csi_out0: endpoint@1 {
							remote-endpoint = <&liimx264_vi_in0>;
						};
					};
				};
			};
		};
	};

	i2c@3180000 {
		tca9546@70 {
			i2c@0 {
			imx264_a@10 {
				compatible = "nvidia,imx264";

				reg = <0x10>;
				devnode = "video0";

				/* Physical dimensions of sensor */
				physical_w = "15.0";
				physical_h = "12.5";

				sensor_model ="imx264";
				/* Define any required hw resources needed by driver */
				/* ie. clocks, io pins, power sources */

				/* Defines number of frames to be dropped by driver internally after applying */
				/* sensor crop settings. Some sensors send corrupt frames after applying */
				/* crop co-ordinates */
				post_crop_frame_drop = "1";

				/* Convert Gain to unit of dB (decibel) befor passing to kernel driver */
				use_decibel_gain = "true";

				/* if true, delay gain setting by one frame to be in sync with exposure */
				//delayed_gain = "true";

				/* enable CID_SENSOR_MODE_ID for sensor modes selection */
				use_sensor_mode_id = "true";

				/**
				* A modeX node is required to support v4l2 driver
				* implementation with NVIDIA camera software stack
				*
				* mclk_khz = "";
				* Standard MIPI driving clock, typically 24MHz
				*
				* num_lanes = "";
				* Number of lane channels sensor is programmed to output
				*
				* tegra_sinterface = "";
				* The base tegra serial interface lanes are connected to
				*
				* discontinuous_clk = "";
				* The sensor is programmed to use a discontinuous clock on MIPI lanes
				*
				* dpcm_enable = "true";
				* The sensor is programmed to use a DPCM modes
				*
				* cil_settletime = "";
				* MIPI lane settle time value.
				* A "0" value attempts to autocalibrate based on mclk_multiplier
				*
				* active_w = "";
				* Pixel active region width
				*
				* active_h = "";
				* Pixel active region height
				*
				* dynamic_pixel_bit_depth = "";
				* sensor dynamic bit depth for sensor mode
				*
				* csi_pixel_bit_depth = "";
				* sensor output bit depth for sensor mode
				*
				* mode_type="";
				* Sensor mode type, For eg: yuv, Rgb, bayer, bayer_wdr_pwl
				*
				* pixel_phase="";
				* Pixel phase for sensor mode, For eg: rggb, vyuy, rgb888
				*
				* readout_orientation = "0";
				* Based on camera module orientation.
				* Only change readout_orientation if you specifically
				* Program a different readout order for this mode
				*
				* line_length = "";
				* Pixel line length (width) for sensor mode.
				* This is used to calibrate features in our camera stack.
				*
				* mclk_multiplier = "";
				* Multiplier to MCLK to help time hardware capture sequence
				* TODO: Assign to PLL_Multiplier as well until fixed in core
				*
				* pix_clk_hz = "";
				* Sensor pixel clock used for calculations like exposure and framerate
				*
				*
				*
				*
				* inherent_gain = "";
				* Gain obtained inherently from mode (ie. pixel binning)
				*
				* min_gain_val = ""; (floor to 6 decimal places)
				* max_gain_val = ""; (floor to 6 decimal places)
				* Gain limits for mode
				* if use_decibel_gain = "true", please set the gain as decibel
				*
				* min_exp_time = ""; (ceil to integer)
				* max_exp_time = ""; (ceil to integer)
				* Exposure Time limits for mode (us)
				*
				*
				* min_hdr_ratio = "";
				* max_hdr_ratio = "";
				* HDR Ratio limits for mode
				*
				* min_framerate = "";
				* max_framerate = "";
				* Framerate limits for mode (fps)
				*
				* embedded_metadata_height = "";
				* Sensor embedded metadata height in units of rows.
				* If sensor does not support embedded metadata value should be 0.
				*/

				mode0 {/*mode IMX264_MODE_1920X1080_CROP_15FPS*/
					mclk_khz = "37125";
					num_lanes = "4";
					tegra_sinterface = "serial_a";
					discontinuous_clk = "no";
					dpcm_enable = "false";
					cil_settletime = "0";
					dynamic_pixel_bit_depth = "12";
					csi_pixel_bit_depth = "12";
					mode_type = "bayer";
					pixel_phase = "rggb";
					pixel_t = "bayer_rggb12";

					active_w = "2464";
					active_h = "2058";
					readout_orientation = "0";
					line_length = "2656";
					inherent_gain = "1";
					mclk_multiplier = "2";
					pix_clk_hz = "198000000";

					min_gain_val = "0"; /* dB */
					max_gain_val = "48"; /* dB */
					min_hdr_ratio = "1";
					max_hdr_ratio = "1";
					min_framerate = "1.5";
					max_framerate = "30";
					min_exp_time = "30";
					max_exp_time = "660000";
					embedded_metadata_height = "0";
				};
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						liimx264_imx264_out0: endpoint {
							csi-port = <0>;
							bus-width = <4>;
							remote-endpoint = <&liimx264_csi_in0>;
							};
						};
					};
				};
			};
		};
	};
};

/ {

	tegra-camera-platform {
		compatible = "nvidia, tegra-camera-platform";
		/**
		* Physical settings to calculate max ISO BW
		*
		* num_csi_lanes = <>;
		* Total number of CSI lanes when all cameras are active
		*
		* max_lane_speed = <>;
		* Max lane speed in Kbit/s
		*
		* min_bits_per_pixel = <>;
		* Min bits per pixel
		*
		* vi_peak_byte_per_pixel = <>;
		* Max byte per pixel for the VI ISO case
		*
		* vi_bw_margin_pct = <>;
		* Vi bandwidth margin in percentage
		*
		* max_pixel_rate = <>;
		* Max pixel rate in Kpixel/s for the ISP ISO case
		*
		* isp_peak_byte_per_pixel = <>;
		* Max byte per pixel for the ISP ISO case
		*
		* isp_bw_margin_pct = <>;
		* Isp bandwidth margin in percentage
		*/
		num_csi_lanes = <4>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <10>;
		vi_peak_byte_per_pixel = <2>;
		vi_bw_margin_pct = <25>;
		isp_peak_byte_per_pixel = <5>;
		isp_bw_margin_pct = <25>;

		/**
		 * The general guideline for naming badge_info contains 3 parts, and is as follows,
		 * The first part is the camera_board_id for the module; if the module is in a FFD
		 * platform, then use the platform name for this part.
		 * The second part contains the position of the module, ex. "rear" or "front".
		 * The third part contains the last 6 characters of a part number which is found
		 * in the module's specsheet from the vender.
		 */
		modules {
			module0 {
				badge = "imx264_center_liimx264";
				position = "center";
				orientation = "1";
				drivernode0 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "imx264 30-0010";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@3180000/tca9546@70/i2c@0/imx264_a@10";
				};
			};
		};
	};
};

2-lane dtsi configuration:

{
	host1x {
		vi@15700000 {
			num-channels = <1>;
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					liimx264_vi_in0: endpoint {
						csi-port = <0>;
						bus-width = <2>;
						remote-endpoint = <&liimx264_csi_out0>;
					};
				};
			};
		};

		nvcsi@150c0000 {
			num-channels = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
			channel@0 {
				reg = <0>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						liimx264_csi_in0: endpoint@0 {
							csi-port = <0>;
							bus-width = <2>;
							remote-endpoint = <&liimx264_imx264_out0>;
						};
					};
					port@1 {
						reg = <1>;
						liimx264_csi_out0: endpoint@1 {
							remote-endpoint = <&liimx264_vi_in0>;
						};
					};
				};
			};

		};
	};

	i2c@3180000 {
		tca9548@77 {
			i2c@0 {
			imx264_a@10 {
				compatible = "nvidia,imx264";

				reg = <0x10>;
				devnode = "video0";

				/* Physical dimensions of sensor */
				physical_w = "15.0";
				physical_h = "12.5";

				sensor_model ="imx264";
				/* Define any required hw resources needed by driver */
				/* ie. clocks, io pins, power sources */

				/* Defines number of frames to be dropped by driver internally after applying */
				/* sensor crop settings. Some sensors send corrupt frames after applying */
				/* crop co-ordinates */
				post_crop_frame_drop = "1";

				/* Convert Gain to unit of dB (decibel) befor passing to kernel driver */
				use_decibel_gain = "true";

				/* if true, delay gain setting by one frame to be in sync with exposure */
				//delayed_gain = "true";

				/* enable CID_SENSOR_MODE_ID for sensor modes selection */
				use_sensor_mode_id = "true";

				/**
				* A modeX node is required to support v4l2 driver
				* implementation with NVIDIA camera software stack
				*
				* mclk_khz = "";
				* Standard MIPI driving clock, typically 24MHz
				*
				* num_lanes = "";
				* Number of lane channels sensor is programmed to output
				*
				* tegra_sinterface = "";
				* The base tegra serial interface lanes are connected to
				*
				* discontinuous_clk = "";
				* The sensor is programmed to use a discontinuous clock on MIPI lanes
				*
				* dpcm_enable = "true";
				* The sensor is programmed to use a DPCM modes
				*
				* cil_settletime = "";
				* MIPI lane settle time value.
				* A "0" value attempts to autocalibrate based on mclk_multiplier
				*
				* active_w = "";
				* Pixel active region width
				*
				* active_h = "";
				* Pixel active region height
				*
				* dynamic_pixel_bit_depth = "";
				* sensor dynamic bit depth for sensor mode
				*
				* csi_pixel_bit_depth = "";
				* sensor output bit depth for sensor mode
				*
				* mode_type="";
				* Sensor mode type, For eg: yuv, Rgb, bayer, bayer_wdr_pwl
				*
				* pixel_phase="";
				* Pixel phase for sensor mode, For eg: rggb, vyuy, rgb888
				*
				* readout_orientation = "0";
				* Based on camera module orientation.
				* Only change readout_orientation if you specifically
				* Program a different readout order for this mode
				*
				* line_length = "";
				* Pixel line length (width) for sensor mode.
				* This is used to calibrate features in our camera stack.
				*
				* mclk_multiplier = "";
				* Multiplier to MCLK to help time hardware capture sequence
				* TODO: Assign to PLL_Multiplier as well until fixed in core
				*
				* pix_clk_hz = "";
				* Sensor pixel clock used for calculations like exposure and framerate
				*
				*
				*
				*
				* inherent_gain = "";
				* Gain obtained inherently from mode (ie. pixel binning)
				*
				* min_gain_val = ""; (floor to 6 decimal places)
				* max_gain_val = ""; (floor to 6 decimal places)
				* Gain limits for mode
				* if use_decibel_gain = "true", please set the gain as decibel
				*
				* min_exp_time = ""; (ceil to integer)
				* max_exp_time = ""; (ceil to integer)
				* Exposure Time limits for mode (us)
				*
				*
				* min_hdr_ratio = "";
				* max_hdr_ratio = "";
				* HDR Ratio limits for mode
				*
				* min_framerate = "";
				* max_framerate = "";
				* Framerate limits for mode (fps)
				*
				* embedded_metadata_height = "";
				* Sensor embedded metadata height in units of rows.
				* If sensor does not support embedded metadata value should be 0.
				*/

				mode0 {/*mode IMX264_MODE_1920X1080_CROP_15FPS*/
					mclk_khz = "37125";
					num_lanes = "2";
					tegra_sinterface = "serial_a";
					discontinuous_clk = "no";
					dpcm_enable = "false";
					cil_settletime = "0";
					dynamic_pixel_bit_depth = "12";
					csi_pixel_bit_depth = "12";
					mode_type = "bayer";
					pixel_phase = "rggb";
			                pixel_t = "bayer_rggb12";

					active_w = "2464";
					active_h = "2058";
					readout_orientation = "0";
					line_length = "2656";
					inherent_gain = "1";
					mclk_multiplier = "2";
					pix_clk_hz = "99000000";

					min_gain_val = "0"; /* dB */
					max_gain_val = "48"; /* dB */
					min_hdr_ratio = "1";
					max_hdr_ratio = "1";
					min_framerate = "1.5";
					max_framerate = "30";
					min_exp_time = "30";
					max_exp_time = "660000";
					embedded_metadata_height = "0";
				};
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						liimx264_imx264_out0: endpoint {
							csi-port = <0>;
							bus-width = <2>;
							remote-endpoint = <&liimx264_csi_in0>;
							};
						};
					};
				};
			};
		};
	};
};

/ {

	tegra-camera-platform {
		compatible = "nvidia, tegra-camera-platform";
		/**
		* Physical settings to calculate max ISO BW
		*
		* num_csi_lanes = <>;
		* Total number of CSI lanes when all cameras are active
		*
		* max_lane_speed = <>;
		* Max lane speed in Kbit/s
		*
		* min_bits_per_pixel = <>;
		* Min bits per pixel
		*
		* vi_peak_byte_per_pixel = <>;
		* Max byte per pixel for the VI ISO case
		*
		* vi_bw_margin_pct = <>;
		* Vi bandwidth margin in percentage
		*
		* max_pixel_rate = <>;
		* Max pixel rate in Kpixel/s for the ISP ISO case
		*
		* isp_peak_byte_per_pixel = <>;
		* Max byte per pixel for the ISP ISO case
		*
		* isp_bw_margin_pct = <>;
		* Isp bandwidth margin in percentage
		*/
		num_csi_lanes = <2>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <10>;
		vi_peak_byte_per_pixel = <2>;
		vi_bw_margin_pct = <25>;
		isp_peak_byte_per_pixel = <5>;
		isp_bw_margin_pct = <25>;

		/**
		 * The general guideline for naming badge_info contains 3 parts, and is as follows,
		 * The first part is the camera_board_id for the module; if the module is in a FFD
		 * platform, then use the platform name for this part.
		 * The second part contains the position of the module, ex. "rear" or "front".
		 * The third part contains the last 6 characters of a part number which is found
		 * in the module's specsheet from the vender.
		 */
		modules {
			module0 {
				badge = "imx264_bottomleft_liimx264";
				position = "bottomleft";
				orientation = "1";
				drivernode0 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "imx264 30-0010";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@0/imx264_a@10";
				};
			};
		};
	};
};

To brief the modification for 2-lane configuration:

  1. bus-width
  2. pix_clk_hz
  3. num_csi_lanes

Please provide your inputs on it.

hello Rathore0129,

several suggestions for you to narrow down the issue.

  1. please keep using pix_clk_hz=“198000000” for your 2-lane configurations.
  2. since PIXEL_SHORT_LINE failure means actual signaling is less then VI engine expected. please have some padding to increase the active_h for try-and-error. please also note that, we don’t support resolution in odd-values.

Hello JerryChang,

We are working on your inputs regarding padding for “active_h”.
Here, Do we need to modify any other parameter when we are modifying value for “active_h”?

hello Rathore0129,

you should only increase active_w settings according to your failures logs.
please have some testing, and you might also contact with your sensor vendor to have details.
thanks

Hello JerryChang,

With below modification in dtsi raw image capture as well as stream with “argus_camera” application is working fine.

active_w = "2448"; 
active_h = "2058";
mclk_multiplier = "10";

Thanks for your all inputs.

Hello JerryChang,

There is one more observation with above provided configuration.

Sometimes image capture produces below error:

[  590.813202] tegra-vi4 15700000.vi: Status:  2 channel:00 frame:0001
<b>[  590.819480] [b]tegra-vi4 15700000.vi:          timestamp sof 601540740224 eof 601607370144 data 0x000000a0</b>
[/b][  590.829270] tegra-vi4 15700000.vi:          capture_id 693 stream  0 vchan  0
[  591.753975] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  591.760370] video4linux video0: tegra_channel_capture_frame: vi4 got SOF syncpt buf[ffffffc074c77400]
[  591.770978] video4linux video0: release_buffer: release buf[ffffffc074c77400] frame[2] to user-space
[  592.777948] tegra-vi4 15700000.vi: ATOMP_FE syncpt timeout!
[  592.783553] video4linux video0: release_buffer: release buf[ffffffc074c74000] frame[3] to user-space
[  592.792930] imx264 30-0010: imx264_s_stream++ enable 0
[  592.819344] nvcsi 150c0000.nvcsi: csi4_stop_streaming ports index=0, lanes=2
[  592.826408] nvcsi 150c0000.nvcsi: csi4_phy_config
[  592.831154] nvcsi 150c0000.nvcsi: NVCSI_CIL_CONFIG = 00000002
[  592.837004] nvcsi 150c0000.nvcsi: csi4_stream_check_status
[  592.842560] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) INTR_STATUS 0x00010004
[  592.850485] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERR_INTR_STATUS 0x00010004
[  592.858804] nvcsi 150c0000.nvcsi: csi4_cil_check_status 340
[  592.870665] imx264 30-0010: imx264_power_off: power off

Trace log for the same are as below:

kworker/0:1-106   [000] ...1   589.676146: rtcpu_vinotify_handle_msg: tstamp:18763546931 tag:CHANSEL_PXL_SOF channel:0x00 frame:2 vi_tstamp:1583677210 data:0x00000001
     kworker/0:1-106   [000] ...1   589.676147: rtcpu_vinotify_handle_msg: tstamp:18763547075 tag:ATOMP_FS channel:0x00 frame:2 vi_tstamp:1583677216 data:0x00000000
     kworker/0:1-106   [000] ...1   589.676147: rtcpu_vinotify_handle_msg: tstamp:18764409619 tag:CHANSEL_PXL_EOF channel:0x00 frame:2 vi_tstamp:1584539843 data:0x08090002
     kworker/0:1-106   [000] ...1   589.676148: rtcpu_vinotify_handle_msg: tstamp:18764409724 tag:ATOMP_FE channel:0x00 frame:2 vi_tstamp:1584539918 data:0x00000000
     kworker/0:1-106   [000] ...1   589.731509: rtos_queue_peek_from_isr_failed: tstamp:18764704438 queue:0x0b4a3c58
     kworker/0:0-2600  [000] ...1   590.613931: rtos_queue_peek_from_isr_failed: tstamp:18792996127 queue:0x0b4a3c58
     kworker/0:0-2600  [000] ...1   590.613942: rtcpu_start: tstamp:18792997125
     kworker/0:0-2600  [000] ...1   590.769925: rtos_queue_peek_from_isr_failed: tstamp:18797997017 queue:0x0b4a3c58
     kworker/0:0-2600  [000] ...1   590.769928: rtcpu_vinotify_handle_msg: tstamp:18798148678 tag:CHANSEL_PXL_SOF channel:0x00 frame:1 vi_tstamp:1618278948 data:0x00000001
     kworker/0:0-2600  [000] ...1   590.769929: rtcpu_vinotify_handle_msg: tstamp:18798148828 tag:ATOMP_FS channel:0x00 frame:1 vi_tstamp:1618278955 data:0x00000000
     kworker/0:0-2600  [000] ...1   590.769929: rtcpu_vinotify_handle_msg: tstamp:18798439332 tag:CHANSEL_LOAD_FRAMED channel:0x01 frame:1 vi_tstamp:1618569733 data:0x08000000
     kworker/0:0-2600  [000] ...1   590.821920: rtcpu_vinotify_handle_msg: tstamp:18799011190 tag:CHANSEL_PXL_EOF channel:0x00 frame:1 vi_tstamp:1619141581 data:0x08090002
     kworker/0:0-2600  [000] ...1   <b>590.821921: rtcpu_vinotify_handle_msg: tstamp:18800230909 tag:[b]CSIMUX_FRAME channel:0x00 frame:1 vi_tstamp:1620361133 data:0x000000a0</b>[/b]
     kworker/0:0-2600  [000] ...1   590.821922: rtcpu_vinotify_handle_msg: tstamp:18800231088 tag:ATOMP_FE channel:0x00 frame:1 vi_tstamp:1620361136 data:0x00000000
     kworker/0:0-2600  [000] ...1   590.925930: rtos_queue_peek_from_isr_failed: tstamp:18802997524 queue:0x0b4a3c58
     kworker/0:0-2600  [000] ...1   591.081929: rtos_queue_peek_from_isr_failed: tstamp:18807998035 queue:0x0b4a3c58
     kworker/0:0-2600  [000] ...1   591.237927: rtos_queue_peek_from_isr_failed: tstamp:18812998534 queue:0x0b4a3c58

hi Rathore0129,

sorry, I was having a typo of the suggestions.
there’re “frame length” and “line length” to represent sensor signaling, which frame length related to vertical active pixels, and line length related to horizontal active pixels. (I’ll also update my previous comments to avoid confusion)

regarding to your failures.
it seems there’s CRC error, suggest you contact with your sensor vendor to check the CRC header.

[  592.837004] nvcsi 150c0000.nvcsi: csi4_stream_check_status
[  592.842560] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) INTR_STATUS 0x00010004
[  592.850485] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERR_INTR_STATUS 0x00010004

you may also refer to [Tegra X2 (Parker Series SoC) Technical Reference Manual] and check the register description.
for example,

NVCSI_STREAM_0_INTR_STATUS_0 = 0x00010004
bit-16: intr_stat_ph_ecc_multi_bit_err
bit-2: intr_stat_pd_crc_err_vc0

Hi JerryChang,

Thanks for your input.

it seems there’s CRC error, suggest you contact with your sensor vendor to check the CRC header.
–> Yes,For that we can contact sensor vendor.

But here, still stuck up with the below error with “V4l2-ctl” command.

kworker/4:0-3006  [004] ...1  1327.054042: rtcpu_vinotify_handle_msg: tstamp:41817660150 tag:CSIMUX_FRAME channel:0x00 frame:1 vi_tstamp:3162953894 data:0x000000a0

Also mentioned in comment 10.

We are facing it sometimes while capturing raw image using below command:

v4l2-ctl -V --set-fmt-video=width=2448,height=2058,pixelformat=RG12 --set-ctrl bypass_mode=0 --stream-mmap --stream-count=1 --stream-to=imx264.raw -d /dev/video0

Please provide your inputs on it.

hello Rathore0129,

there’s FS_FAULT according to below error reporting.

tag:CSIMUX_FRAME channel:0x00 frame:1 vi_tstamp:1620361133 data:0x000000a0

since you got the failure sometimes,
suggest you also contact with your sensor vendor to review the settings.
thanks