TX2 R28.2.1 with TC358743 driver failed with "tegra-vi4 15700000.vi: all channel register failed"

Hi,
I am aimed to porting TC358743 driver to TX2 with R28.2.1 . And here is my own carryboard schematic.https://drive.google.com/open?id=1SvgWJqfRp-XYf37eGJFTQAtO0fb65fKI
and device tree with

host1x {
        vi@15700000  {
            num-channels = <1>;
            ports {
                #address-cells = <1>;
                #size-cells = <0>;
                tc358743_vi_port2: port@0 {
                    status = "okay";
                    reg = <0>;
                    tc358743_vi_in0: endpoint {
                        status = "okay";
                        csi-port = <2>;  /* CSI-C */
                        bus-width = <4>; /* Use CSI-CD*/
                        remote-endpoint = <&tc358743_csi_out0>;
                    };
                };
            };
        };


		nvcsi@150c0000 {
			num-channels = <1>;
			channel@0 {
				reg = <0>;
                status = "okay";
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						tc358743_csi_in0: endpoint@0 {
							csi-port = <2>;
							bus-width = <4>;
							remote-endpoint = <&tc358743_out0>;
						};
					};
					port@1 {
						reg = <1>;
						tc358743_csi_out0: endpoint@1 {
							remote-endpoint = <&tc358743_vi_in0>;
						};
					};
				};
			};
        };
    };
    
    i2c@3180000 {  /* I2C_0, "adapter" 0 */
        status = "okay";
        #address-cells = <1>;
        #size-cells = <0>;
        tc358743@0f {
            status = "okay";
            compatible = "tc358743";
            reg = <0x0f>; /* (normal = address not shifted) */
            devnode = "video0";
            mclk = "cam_mclk1";
            reset-gpios = <&tegra_main_gpio TEGRA_MAIN_GPIO(R,1) 0>;
            refclk_hz = <27000000>;
            /* Physical dimensions of sensor */
            physical_w = "4.713";
            physical_h = "3.494";
            /* Sensor Model */
            sensor_model ="tc358743";

            ports {
                #address-cells = <1>;
                #size-cells = <0>;

                port@0 {
                    reg = <0>;
                    tc358743_out0: endpoint {
                        csi-port = <2>;  /* CSI C */
                        bus-width = <4>; /* Use CSI-CD */
                        data-lanes = <1 2 3 4>;
                        clock-lanes = <2>;
                        clock-noncontinuous;
                        link-frequencies = /bits/ 64 <297000000>;
                        remote-endpoint = <&tc358743_csi_in0>;
                    };
                };
            };
        };
    };
    
    tcp: tegra-camera-platform {
	    status = "okay";
		compatible = "nvidia, tegra-camera-platform";
		num_csi_lanes = <12>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <16>;
		vi_peak_byte_per_pixel = <2>;
		vi_bw_margin_pct = <25>;
		max_pixel_rate = <408000>;
		isp_peak_byte_per_pixel = <2>;
		isp_bw_margin_pct = <25>;

	    /**
		* The general guideline for naming badge_info contains 3 parts, and is as follows,
		* The first part is the camera_board_id for the module; if the module is in a FFD
		* platform, then use the platform name for this part.
		* The second part contains the position of the module, ex. “rear” or “front”.
		* The third part contains the last 6 characters of a part number which is found
		* in the module's specsheet from the vender.
		*/
		modules {
            module0 {
                status = "okay";
                badge = "tc358743_top_i2c0_cd";
                position = "top";
                orientation = "3";
                drivernode0 {
                    status = "okay";
                    /* Declare PCL support driver (classically known as guid)  */
                    pcl_id = "v4l2_sensor";
                    /* Driver's v4l2 device name */
                    devname = "tc358743 0-000f";
                    /* Declare the device-tree hierarchy to driver instance */
                    proc-device-tree = "/proc/device-tree/i2c@3180000/tc358743@0f";
                };
                
            };
		};
	};
};

I refer the driver code from https://devtalk.nvidia.com/default/topic/1011640/jetson-tx2/tc358743-on-tx2/

When I start driver I get nothing error but no /dev/video0 show up . I look for the dmesg and find out the vi channel register failed .

tegra-vi4 15700000.vi: initialized
[    6.215184] tegra-vi4 15700000.vi: subdev 150c0000.nvcsi-2 bound
[    6.215328] tegra-vi4 15700000.vi: all channel register failed

Can anyone teach me how to debug with such situation !

hello askariz0503,

show some materials for your reference as below.

  1. please check [V4L2 Sensor Driver Development Tutorial] via https://developer.nvidia.com/embedded/learn/tutorials
  2. please download the [L4T Documentation], you could refer to [NVIDIA Tegra Linux Driver Package]-> [Development Guide]-> [Camera Development] for [Sensor Driver Programming Guide]
  3. you may also check https://elinux.org/Jetson_TX2/28.1_Camera_BringUp for some debug tips.

Hi JerryChang ,
Thank you for your reply .
Now, I successfully capture the HDMI signal . Here is my v4l2-ctl --log-status info

[  807.572630] tegra-vi4 15700000.vi: =================  START STATUS  =================
   [  807.587335] tc358743 2-000f: tc358743_get_edid i2c_rd return 0
<7>[  807.593264] 00 ff ff ff ff ff ff 00 52 62 88 88 00 88 88 88 1c 15 01 03 80 00 00 78 0a 0d c9 a0 57 47 98 27 12 48 4c 00 00 00 01 01 01 01 01 0 
   [  807.663929] tc358743 2-000f: tc358743_get_edid done
   [  807.669081] tc358743 2-000f: -----Chip status-----
   [  807.674107] tc358743 2-000f: Chip ID:0x00
   [  807.678335] tc358743 2-000f: Chip revision:0x00
   [  807.682954] tc358743 2-000f: Reset: IR: 1, CEC: 1, CSI TX: 0, HDMI: 0
   [  807.689406] tc358743 2-000f: Sleep mode: off
   [  807.693688] tc358743 2-000f: Cable detected (+5V power): yes
   [  807.699547] tc358743 2-000f: DDC lines enabled: yes
   [  807.704623] tc358743 2-000f: Hotplug enabled: yes
   [  807.709535] tc358743 2-000f: CEC enabled: no
   [  807.713814] tc358743 2-000f: -----Signal status-----
   [  807.718787] tc358743 2-000f: TMDS signal detected: yes
   [  807.723931] tc358743 2-000f: Stable sync signal: yes
   [  807.728899] tc358743 2-000f: PHY PLL locked: yes
   [  807.733533] tc358743 2-000f: PHY DE detected: yes
   [  807.740379] tc358743 2-000f: 468:tc358743_get_detected_timings: width 1920 heigh 1080 interlaced 0
   [  807.749345] tc358743 2-000f: Detected format: 1920x1080p50.0 (2640x1125)
   [  807.756050] tc358743 2-000f: horizontal: fp = 0, -sync = 720, bp = 0
   [  807.762405] tc358743 2-000f: vertical: fp = 0, -sync = 45, bp = 0
   [  807.768499] tc358743 2-000f: pixelclock: 148500000
   [  807.773297] tc358743 2-000f: flags (0x0):
   [  807.777310] tc358743 2-000f: standards (0x0):
   [  807.781671] tc358743 2-000f: Configured format: 1920x1080p50.0 (2640x1125)
   [  807.788559] tc358743 2-000f: horizontal: fp = 528, +sync = 44, bp = 148
   [  807.795196] tc358743 2-000f: vertical: fp = 4, +sync = 5, bp = 36
   [  807.801306] tc358743 2-000f: pixelclock: 148500000
   [  807.806103] tc358743 2-000f: flags (0x10): CE_VIDEO
   [  807.810983] tc358743 2-000f: standards (0x1): CEA
   [  807.815690] tc358743 2-000f: -----CSI-TX status-----
   [  807.820656] tc358743 2-000f: Lanes needed: 3
   [  807.825178] tc358743 2-000f: Lanes in use: 3
   [  807.829668] tc358743 2-000f: Waiting for particular sync signal: no
   [  807.836136] tc358743 2-000f: Transmit mode: yes
   [  807.840884] tc358743 2-000f: Receive mode: no
   [  807.845446] tc358743 2-000f: Stopped: no
   [  807.849412] tc358743 2-000f: Color space: YCbCr 422 16-bit
   [  807.855080] tc358743 2-000f: -----DVI-D status-----
   [  807.859967] tc358743 2-000f: HDCP encrypted content: no
   [  807.865196] tc358743 2-000f: Input color space: RGB full range
   [  807.871207] tegra-vi4 15700000.vi: ==================  END STATUS  ==================

It means the TC358743 is successful capture HDMI signal and send to CSI interface .
But when I use v4l2-ctl --all it shows

Driver Info (not using libv4l2):
        Driver name   : tegra-video
        Card type     : vi-output, tc358743 2-000f
        Bus info      : platform:15700000.vi:2
        Driver version: 4.4.38
        Capabilities  : 0x84200001
                Video Capture
                Streaming
                Extended Pix Format
                Device Capabilities
        Device Caps   : 0x04200001
                Video Capture
                Streaming
                Extended Pix Format
Priority: 2
Video input : 0 (HDMI 2: ok)
DV timings:
        Active width: 1920
        Active height: 1080
        Total width: 2640
        Total height: 1125
        Frame format: progressive
        Polarities: +vsync +hsync
        Pixelclock: 148500000 Hz (50.00 frames per second)
        Horizontal frontporch: 528
        Horizontal sync: 44
        Horizontal backporch: 148
        Vertical frontporch: 4
        Vertical sync: 5
        Vertical backporch: 36
        Standards: CEA-861
        Flags: CE-video
DV timings capabilities:
        Minimum Width: 1
        Maximum Width: 10000
        Minimum Height: 1
        Maximum Height: 10000
        Minimum PClock: 0
        Maximum PClock: 165000000
        Standards: CEA-861, DMT, CVT, GTF
        Capabilities: Progressive, Reduced Blanking, Custom Formats
Format Video Capture:
        Width/Height      : 1920/1080
        Pixel Format      : 'RG10'
        Field             : Any
        Bytes per Line    : 3840
        Size Image        : 0
        Colorspace        : Default
        Transfer Function : Default
        YCbCr Encoding    : Default
        Quantization      : Default
        Flags             :

I have no Idea why it show RG10 formate . And how do I test?

hello askariz0503,

had you configure the pixel format correctly for your HDMI2CSI driver?
you may also check below sources for reference, thanks

<top>/kernel/kernel-4.4/drivers/media/i2c/tc358840.c

Hi JerryChang,
I think I had configure formate correctly . beacuse I can see from the v4l2-ctl --log-status

[  807.749345] tc358743 2-000f: Detected format: 1920x1080p50.0 (2640x1125)
   [  807.756050] tc358743 2-000f: horizontal: fp = 0, -sync = 720, bp = 0
   [  807.762405] tc358743 2-000f: vertical: fp = 0, -sync = 45, bp = 0
   [  807.768499] tc358743 2-000f: pixelclock: 148500000
   [  807.773297] tc358743 2-000f: flags (0x0):
   [  807.777310] tc358743 2-000f: standards (0x0):
   [  807.781671] tc358743 2-000f: Configured format: 1920x1080p50.0 (2640x1125)

Here detected format and configured format are the same .

By the way , I have find something wrong with kernel Oops before I get /dev/video0.
Here is the information . it tell me that something wrong with tegra_channel_fmts_bitmap_init function . And I have add

static const struct camera_common_colorfmt camera_common_color_fmts[] = {
	{
		MEDIA_BUS_FMT_SRGGB12_1X12,
		V4L2_COLORSPACE_SRGB,
		V4L2_PIX_FMT_SRGGB12,
	},
	{
		MEDIA_BUS_FMT_UYVY8_1X16,
		V4L2_COLORSPACE_SRGB,
		V4L2_PIX_FMT_UYVY,
	},

but still Oops .

.531212] tegra-vi4 15700000.vi: tegra_channel_fmts_bitmap_init: --------before tegra_core_get_format_by_code
[    6.531215] tegra-vi4 15700000.vi: ---->  height 1080 width 1920  
[    6.531217] tegra-vi4 15700000.vi: tegra_channel_fmts_bitmap_init: --------before tegra_channel_update_format
[    6.531223] Unable to handle kernel NULL pointer dereference at virtual address 0000001c
[    6.531224] pgd = ffffffc07b365000
[    6.531227] [0000001c] *pgd=0000000000000000, *pud=0000000000000000
[    6.531230] Internal error: Oops: 96000005 [#1] PREEMPT SMP
[    6.531235] Modules linked in: tc358743(+) pci_tegra bluedroid_pm
[    6.531239] CPU: 3 PID: 351 Comm: systemd-udevd Not tainted 4.4.38+ #39
[    6.531239] Hardware name: quill (DT)
[    6.531241] task: ffffffc1e4510c80 ti: ffffffc07b3d4000 task.ti: ffffffc07b3d4000
[    6.531248] PC is at tegra_channel_fmts_bitmap_init+0x1e4/0x264
[    6.531251] LR is at tegra_channel_fmts_bitmap_init+0x1dc/0x264
[    6.531252] pc : [<ffffffc0007a2ab0>] lr : [<ffffffc0007a2aa8>] pstate: 80000045
[    6.531253] sp : ffffffc07b3d7740
[    6.531255] x29: ffffffc07b3d7740 x28: 0000000000000018 
[    6.531257] x27: ffffffc001010be0 x26: ffffffc001010be8 
[    6.531259] x25: ffffffc07024d870 x24: ffffffc07024d870 
[    6.531261] x23: ffffffc07b000ba8 x22: ffffffc07b000018 
[    6.531263] x21: ffffffc07b3d77d8 x20: ffffffc000c354b0 
[    6.531264] x19: 0000000000000000 x18: 0000007fc1806058 
[    6.531266] x17: 0000000000000000 x16: 0000000000000000 
[    6.531268] x15: 0000000000000000 x14: 65742065726f6665 
[    6.531269] x13: 622d2d2d2d2d2d2d x12: 2d203a74696e695f 
[    6.531271] x11: 70616d7469625f73 x10: 746d665f6c656e6e 
[    6.531272] x9 : 6168635f61726765 x8 : ffffffc00141e780 
[    6.531274] x7 : 0000000000000000 x6 : 000000000c25a592 
[    6.531276] x5 : 000000000c25a592 x4 : 0000000000000000 
[    6.531277] x3 : 0000000000000000 x2 : 0000000000000000 
[    6.531279] x1 : 0000000000000000 x0 : 0000000000000061 

[    6.531281] Process systemd-udevd (pid: 351, stack limit = 0xffffffc07b3d4020)
[    6.531282] Call trace:
[    6.531285] [<ffffffc0007a2ab0>] tegra_channel_fmts_bitmap_init+0x1e4/0x264
[    6.531288] [<ffffffc0007a3bac>] tegra_channel_init_subdevices+0x2ac/0x668
[    6.531290] [<ffffffc0007a4c68>] tegra_vi_graph_notify_complete+0x230/0x690
[    6.531294] [<ffffffc00079525c>] v4l2_async_test_notify+0xfc/0x114
[    6.531295] [<ffffffc00079548c>] v4l2_async_register_subdev+0x84/0xf8
[    6.531302] [<ffffffbffc01fff8>] tc358743_probe+0x2e4/0xf8c [tc358743]
[    6.531307] [<ffffffc00076ca9c>] i2c_device_probe+0x184/0x23c
[    6.531312] [<ffffffc00057666c>] driver_probe_device+0xc8/0x408
[    6.531314] [<ffffffc000576a48>] __driver_attach+0x9c/0xa0
[    6.531317] [<ffffffc0005746c8>] bus_for_each_dev+0x58/0x98
[    6.531319] [<ffffffc0005760f4>] driver_attach+0x20/0x28
[    6.531321] [<ffffffc000575c64>] bus_add_driver+0x1f0/0x294
[    6.531323] [<ffffffc0005778c8>] driver_register+0x68/0x108
[    6.531325] [<ffffffc00076e780>] i2c_register_driver+0x40/0x98
[    6.531329] [<ffffffbffc027020>] tc358743_driver_init+0x20/0x28 [tc358743]
[    6.531332] [<ffffffc000081c54>] do_one_initcall+0xc8/0x1c0
[    6.531336] [<ffffffc00016fd80>] do_init_module+0x64/0x1c0
[    6.531338] [<ffffffc000120f14>] load_module+0xda0/0x107c
[    6.531340] [<ffffffc00012140c>] SyS_finit_module+0x94/0xbc
[    6.531343] [<ffffffc000084ff0>] el0_svc_naked+0x24/0x28
[    6.531569] ---[ end trace 70bc0cf905c0a845 ]---
[    6.661611] dhd_module_init in

Hi,JerryChang
I think I am very closed to reach the success of porting TC358743 driver .
Now , I can run the following cmd to capture the image

gst-launch-1.0 -v --gst-debug-level=1 v4l2src device=/dev/video0 ! "video/x-raw,width=1920,height=1080,format=(string)UYVY" ! nvvidconv ! "video/x-raw(memory:NVMM),width=1920,height=1080,format=(string)I420" ! nvoverlaysink sync=false

But the screen if full of green color no image .
Here is my dmesg output when I run privous cmd .

[  214.761942] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11                                                                                                    
[  215.766056] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11                                                                                                    
[  216.770036] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11                                                                                                    
[  217.774034] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11                                                                                                    
[  218.778032] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11                                                                                                    
[  219.782024] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11                                                                                                    
[  220.786022] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11                                                                                                    
[  221.790014] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11                                                                                                    
[  222.794024] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11                                                                                                    
[  223.798028] tegra-vi4 15700000.vi: ATOMP_FE syncpt timeout!                                                                                                             
[  223.804351] tc358743 2-000f: tc358743_s_stream()                                                                                                                        
[  223.809231] tc358743 2-000f: enable_stream: enable                                                                                                                      
[  223.815396] tc358743 2-000f: 764:enable_stream: end                                                                                                                     
[  223.827525] tc358743 2-000f: tc358743_get_edid i2c_rd return 0                                                                                                          
[  223.833527] 00 ff ff ff ff ff ff 00 52 62 88 88 00 88 88 88 1c 15 01 03 80 00 00 78 0a 0d c9 a0 57 47 98 27 12 48 4c 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 
[  223.905710] tc358743 2-000f: tc358743_get_edid done                                                                                                                     
[  223.910855] tc358743 2-000f: -----Chip status-----                                                                                                                      
[  223.915847] tc358743 2-000f: Chip ID:0x00                                                                                                                               
[  223.920073] tc358743 2-000f: Chip revision:0x00                                                                                                                         
[  223.924617] tc358743 2-000f: Reset: IR: 1, CEC: 1, CSI TX: 0, HDMI: 0                                                                                                   
[  223.931059] tc358743 2-000f: Sleep mode: off                                                                                                                            
[  223.935334] tc358743 2-000f: Cable detected (+5V power): yes                                                                                                            
[  223.941171] tc358743 2-000f: DDC lines enabled: yes                                                                                                                     
[  223.946225] tc358743 2-000f: Hotplug enabled: yes                                                                                                                       
[  223.951137] tc358743 2-000f: CEC enabled: no                                                                                                                            
[  223.955417] tc358743 2-000f: -----Signal status-----                                                                                                                    
[  223.960384] tc358743 2-000f: TMDS signal detected: yes                                                                                                                  
[  223.965525] tc358743 2-000f: Stable sync signal: yes                                                                                                                    
[  223.970492] tc358743 2-000f: PHY PLL locked: yes                                                                                                                        
[  223.975112] tc358743 2-000f: PHY DE detected: yes                                                                                                                       
[  223.981997] tc358743 2-000f: 468:tc358743_get_detected_timings: width 1920 heigh 1080 interlaced 0                                                                      
[  223.990954] tc358743 2-000f: Detected format: 1920x1080p50.0 (2640x1125)                                                                                                
[  223.997658] tc358743 2-000f: horizontal: fp = 0, -sync = 720, bp = 0                                                                                                    
[  224.004012] tc358743 2-000f: vertical: fp = 0, -sync = 45, bp = 0                                                                                                       
[  224.010106] tc358743 2-000f: pixelclock: 148500000                                                                                                                      
[  224.014904] tc358743 2-000f: flags (0x0):                                                                                                                               
[  224.018918] tc358743 2-000f: standards (0x0):                                                                                                                           
[  224.023281] tc358743 2-000f: Configured format: 1920x1080p50.0 (2640x1125)                                                                                              
[  224.030155] tc358743 2-000f: horizontal: fp = 528, +sync = 44, bp = 148                                                                                                 
[  224.036771] tc358743 2-000f: vertical: fp = 4, +sync = 5, bp = 36                                                                                                       
[  224.042864] tc358743 2-000f: pixelclock: 148500000                                                                                                                      
[  224.047658] tc358743 2-000f: flags (0x10): CE_VIDEO                                                                                                                     
[  224.052549] tc358743 2-000f: standards (0x1): CEA                                                                                                                       
[  224.057262] tc358743 2-000f: -----CSI-TX status-----                                                                                                                    
[  224.062231] tc358743 2-000f: Lanes needed: 3                                                                                                                            
[  224.066753] tc358743 2-000f: Lanes in use: 3                                                                                                                            
[  224.071235] tc358743 2-000f: Waiting for particular sync signal: no                                                                                                     
[  224.077704] tc358743 2-000f: Transmit mode: yes                                                                                                                         
[  224.082440] tc358743 2-000f: Receive mode: no                                                                                                                           
[  224.087001] tc358743 2-000f: Stopped: no                                                                                                                                
[  224.090935] tc358743 2-000f: Color space: YCbCr 422 16-bit                                                                                                              
[  224.096594] tc358743 2-000f: -----DVI-D status-----                                                                                                                     
[  224.101481] tc358743 2-000f: HDCP encrypted content: no                                                                                                                 
[  224.106708] tc358743 2-000f: Input color space: RGB full range

My question is that if is due to my DT not declear correctly . my DT about TC358743

{
    host1x {
        vi@15700000  {
            num-channels = <1>;
            ports {
                #address-cells = <1>;
                #size-cells = <0>;
                tc358743_vi_port2: port@0 {
                    status = "okay";
                    reg = <0>;
                    tc358743_vi_in0: endpoint {
                        status = "okay";
                        csi-port = <2>;  /* CSI-C */
                        bus-width = <4>; /* Use CSI-CD*/
                        remote-endpoint = <&tc358743_csi_out0>;
                    };
                };
            };
        };


		nvcsi@150c0000 {
			num-channels = <1>;
			channel@0 {
				reg = <0>;
                status = "okay";
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
                        status = "okay";
						reg = <0>;
						tc358743_csi_in0: endpoint@0 {
							status = "okay";
                            csi-port = <2>;
							bus-width = <4>;
							remote-endpoint = <&tc358743_out0>;
						};
					};
					port@1 {
                        status = "okay";
						reg = <1>;
						tc358743_csi_out0: endpoint@1 {
							status = "okay";
                            remote-endpoint = <&tc358743_vi_in0>;
						};
					};
				};
			};
        };
    };
    
    i2c@3180000 {  /* I2C_0, "adapter" 0 */
        status = "okay";
        #address-cells = <1>;
        #size-cells = <0>;
        tc358743@0f {
            status = "okay";
            compatible = "tc358743";
            reg = <0x0f>; /* (normal = address not shifted) */
            devnode = "video0";
            mclk = "cam_mclk1";
            reset-gpios = <&tegra_main_gpio TEGRA_MAIN_GPIO(R,1) 0>;
            refclk_hz = <27000000>;
            /* Physical dimensions of sensor */
            physical_w = "4.713";
            physical_h = "3.494";
            /* Sensor Model */
            sensor_model ="tc358743";
        
            ports {
                #address-cells = <1>;
                #size-cells = <0>;

                port@0 {
                    reg = <0>;
                    tc358743_out0: endpoint {
                        csi-port = <2>;  /* CSI C */
                        bus-width = <4>; /* Use CSI-CD */
                        clock-noncontinuous;
                        link-frequencies = /bits/ 64 <297000000>;
                        remote-endpoint = <&tc358743_csi_in0>;
                    };
                };
            };
        };
    };
    
    tcp: tegra-camera-platform {
	    status = "okay";
		compatible = "nvidia, tegra-camera-platform";
		num_csi_lanes = <2>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <16>;
		vi_peak_byte_per_pixel = <2>;
		vi_bw_margin_pct = <25>;
		max_pixel_rate = <408000>;
		isp_peak_byte_per_pixel = <2>;
		isp_bw_margin_pct = <25>;

	    /**
		* The general guideline for naming badge_info contains 3 parts, and is as follows,
		* The first part is the camera_board_id for the module; if the module is in a FFD
		* platform, then use the platform name for this part.
		* The second part contains the position of the module, ex. “rear” or “front”.
		* The third part contains the last 6 characters of a part number which is found
		* in the module's specsheet from the vender.
		*/
		modules {
            module0 {
                status = "okay";
                badge = "tc358743_top_i2c0_cd";
                position = "top";
                orientation = "3";
                drivernode0 {
                    status = "okay";
                    /* Declare PCL support driver (classically known as guid)  */
                    pcl_id = "v4l2_sensor";
                    /* Driver's v4l2 device name */
                    devname = "tc358743 0-000f";
                    /* Declare the device-tree hierarchy to driver instance */
                    proc-device-tree = "/proc/device-tree/i2c@3180000/tc358743@0f";
                };
                
            };
		};
	};
};

and one more question is what is the meaning of

bus-width = <4>; /* Use CSI-CD */

in the device tree . I use csi port CD 4lanes and C clock lane .Is it correctly with my device-tree?

Hi askariz0503,
How you solved this problem with tegra-vi4 15700000.vi: all channel register failed and got the dev/video file?
Now I had a same problem with porting AR0135 drive to TX2.Could you help me solve this problem? Thanks a lot!

Hi all,
I am glad to say that I have successful capture the image from tc358743 driver with R28.2.1. with latance of ~100ms . Later I will provide the source code and hardware shematic to github .
Thanks all

Hi 15210962653,
First you can download dtc compile in TX2 with

$sudo apt install device-tree-compiler/code] the dump to check your deive-tree with 
  [code]dtc -I fs /proc/device-tree

Then you should make sure all the status should OK in nvcsi port and your device and vi port. such like this

channel@0 {
				reg = <0x0>;
				status = "okay";
				phandle = <0x130>;
				linux,phandle = <0x130>;

				ports {
					#address-cells = <0x1>;
					#size-cells = <0x0>;

					port@0 {
						reg = <0x0>;
						status = "okay";
						phandle = <0x131>;
						linux,phandle = <0x131>;

						endpoint@0 {
							bus-width = <0x4>;
							remote-endpoint = <0xa8>;
							status = "okay";
							phandle = <0x24>;
							csi-port = <0x2>;
							linux,phandle = <0x24>;
						};
					};

					port@1 {
						reg = <0x1>;
						status = "okay";
						phandle = <0x133>;
						linux,phandle = <0x133>;

						endpoint@1 {
							remote-endpoint = <0xa9>;
							status = "okay";
							phandle = <0xb4>;
							linux,phandle = <0xb4>;
						};
					};
				};
			};

Hi askariz0503,
Thank you very much for reply!
What is function with dtc compile? check device tree file error?
And which way you use to regist your device? Plugin maneger or Main Platform Device Tree File? I used Main Platform Device Tree File! And I used tegra186-quill-camera-modules.dtsi as a model for generating my dtsi.Here is my hardware/nvidia/platform/t18x/common/kernel-dts/t18x-common-modules/tegra186-camera-e3326-a00.dtsi:

/*
 * Copyright (c) 2015-2017, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
 //#include "dt-bindings/clock/tegra186-clock.h" //zhou
 //#include <t18x-common-platforms/tegra186-quill-camera-e3326-a00.dtsi>

/ {
	host1x {
		vi@15700000 {
			status = "okay";
			num-channels = <1>;
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				status = "okay";
				port@0 {
					status = "okay";
					reg = <0>;
					e3326_vi_in0: endpoint {
						status = "okay";
						csi-port = <2>;
						bus-width = <2>;
						remote-endpoint = <&e3326_csi_out0>;
					};
				};
			};
		};

		nvcsi@150c0000 {
			status = "okay";
			num-channels = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
			channel@0 {
				status = "okay";
				reg = <0>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					status = "okay";
					port@0 {
						status = "okay";
						reg = <0>;
						e3326_csi_in0: endpoint@0 {
							status = "okay";
							csi-port = <2>;
							bus-width = <2>;
							remote-endpoint = <&e3326_ar0135_out0>;
						};
					};
					port@1 {
						status = "okay";
						reg = <1>;
						e3326_csi_out0: endpoint@1 {
							status = "okay";
							remote-endpoint = <&e3326_vi_in0>;
						};
					};
				};
			};
		};
	};

	i2c@3180000 {
        status = "okay";
		ar0135_c@10 {
			compatible = "nvidia,ar0135";
			/* I2C device address */
			reg = <0x10>;
           

			/* V4L2 device node location */
			devnode = "video0";
			status = "okay";

			/* Physical dimensions of sensor */
			physical_w = "3.674";
			physical_h = "2.738";
			sensor_model = "ar0135";

			// clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH1>,
			// 		 <&tegra_car TEGRA186_CLK_PLLP_OUT0>;
			// clock-names = "extperiph1", "pllp_grtba";
			// mclk = "extperiph1";
			// //clock-frequency = <24000000>;
			// clock-frequency = <25000000>;

			/* Define any required hw resources needed by driver */
			/* ie. clocks, io pins, power sources */
			avdd-reg = "vana";
			iovdd-reg = "vif";

			

			/* Sensor output flip settings */
			/*vertical-flip = "true";*/

			/**
			* A modeX node is required to support v4l2 driver
			* implementation with NVIDIA camera software stack
			*
			* mclk_khz = "";
			* Standard MIPI driving clock, typically 24MHz
			*
			* num_lanes = "";
			* Number of lane channels sensor is programmed to output
			*
			* tegra_sinterface = "";
			* The base tegra serial interface lanes are connected to
			*
			* discontinuous_clk = "";
			* The sensor is programmed to use a discontinuous clock on MIPI lanes
			*
			* dpcm_enable = "true";
			* The sensor is programmed to use a DPCM modes
			*
			* cil_settletime = "";
			* MIPI lane settle time value.
			* A "0" value attempts to autocalibrate based on mclk_multiplier
			*
			*
			*
			*
			* active_w = "";
			* Pixel active region width
			*
			* active_h = "";
			* Pixel active region height
			*
			* pixel_t = "";
			* The sensor readout pixel pattern
			*
			* readout_orientation = "0";
			* Based on camera module orientation.
			* Only change readout_orientation if you specifically
			* Program a different readout order for this mode
			*
			* line_length = "";
			* Pixel line length (width) for sensor mode.
			* This is used to calibrate features in our camera stack.
			*
			* mclk_multiplier = "";
			* Multiplier to MCLK to help time hardware capture sequence
			* TODO: Assign to PLL_Multiplier as well until fixed in core
			*
			* pix_clk_hz = "";
			* Sensor pixel clock used for calculations like exposure and framerate
			*
			*
			*
			*
			* inherent_gain = "";
			* Gain obtained inherently from mode (ie. pixel binning)
			*
			* min_gain_val = ""; (floor to 6 decimal places)
			* max_gain_val = ""; (floor to 6 decimal places)
			* Gain limits for mode
			*
			* min_exp_time = ""; (ceil to integer)
			* max_exp_time = ""; (ceil to integer)
			* Exposure Time limits for mode (us)
			*
			*
			* min_hdr_ratio = "";
			* max_hdr_ratio = "";
			* HDR Ratio limits for mode
			*
			* min_framerate = "";
			* max_framerate = "";
			* Framerate limits for mode (fps)
			*/
			mode0 { // AR0135_MODE_1280X728
				mclk_khz = "25000";
				num_lanes = "2";
				tegra_sinterface = "serial_c";
				discontinuous_clk = "no";
				dpcm_enable = "false";
				cil_settletime = "0";

				active_w = "1280";
				active_h = "728";
				pixel_t = "raw12";
				readout_orientation = "90";
				line_length = "1650";
				inherent_gain = "1";
				// mclk_multiplier = "6.67";
				// pix_clk_hz = "160000000";
                                mclk_multiplier = "2.97";
                                pix_clk_hz = "74250000";

				min_gain_val = "1.0";
				max_gain_val = "16";
				min_hdr_ratio = "1";
				max_hdr_ratio = "64";
				min_framerate = "1.816577";
				max_framerate = "54";
				min_exp_time = "34";
				max_exp_time = "550385";
                                embedded_metadata_height = "2";
			};

			ports {
				#address-cells = <1>;
				#size-cells = <0>;
                                status = "okay";
				port@0 {
					status = "okay";
					reg = <0>;
					e3326_ar0135_out0: endpoint {
						status = "okay";
						csi-port = <2>;
						bus-width = <2>;
						remote-endpoint = <&e3326_csi_in0>;
					};
				};
			};
		};
	};

	e3326_lens_ar0135@P5V27C {
		min_focus_distance = "0.0";
		hyper_focal = "0.0";
		focal_length = "2.67";
		f_number = "2.0";
		aperture = "2.0";
	};

	tegra-camera-platform {
		compatible = "nvidia, tegra-camera-platform";
		/**
		* Physical settings to calculate max ISO BW
		*
		* num_csi_lanes = <>;
		* Total number of CSI lanes when all cameras are active
		*
		* max_lane_speed = <>;
		* Max lane speed in Kbit/s
		*
		* min_bits_per_pixel = <>;
		* Min bits per pixel
		*
		* vi_peak_byte_per_pixel = <>;
		* Max byte per pixel for the VI ISO case
		*
		* vi_bw_margin_pct = <>;
		* Vi bandwidth margin in percentage
		*
		* max_pixel_rate = <>;
		* Max pixel rate in Kpixel/s for the ISP ISO case
		*
		* isp_peak_byte_per_pixel = <>;
		* Max byte per pixel for the ISP ISO case
		*
		* isp_bw_margin_pct = <>;
		* Isp bandwidth margin in percentage
		*/
		num_csi_lanes = <4>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <10>;
		vi_peak_byte_per_pixel = <2>;
		vi_bw_margin_pct = <25>;
		//max_pixel_rate = <160000>;
		isp_peak_byte_per_pixel = <5>;
		isp_bw_margin_pct = <25>;

		/**
		* The general guideline for naming badge_info contains 3 parts, and is as follows,
		* The first part is the camera_board_id for the module; if the module is in a FFD
		* platform, then use the platform name for this part.
		* The second part contains the position of the module, ex. “rear” or “front”.
		* The third part contains the last 6 characters of a part number which is found
		* in the module's specsheet from the vender.
		*/
		modules {
			module0 {
				status = "okay";
				badge = "e3326_front_P5V27C";
				position = "rear";
				orientation = "1";
				drivernode0 {
					status = "okay";
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "ar0135 2-0010";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@3180000/ar0135_c@10";
				};
				drivernode1 {
					status = "okay";
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_lens";
					proc-device-tree = "/proc/device-tree/e3326_lens_ar0135@P5V27C/";
				};
			};
		};
	};
};

And hardware/nvidia/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill-camera-modules.dtsi.

/*
 * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 */

//#include "t18x-common-platforms/tegra186-quill-deserializer.dtsi"
#include "t18x-common-platforms/tegra186-quill-camera-e3326-a00.dtsi"
#include "t18x-common-platforms/tegra186-quill-camera-e3323-a00.dtsi"
#include "t18x-common-platforms/tegra186-quill-camera-e3333-a00.dtsi"
#include "t18x-common-platforms/tegra186-quill-camera-e3322-a00.dtsi"
#include "t18x-common-platforms/tegra186-quill-camera-li-mipi-adpt-a00.dtsi"
#include "t18x-common-platforms/tegra186-quill-camera-imx274-a00.dtsi"
#include "t18x-common-platforms/tegra186-quill-camera-vivid.dtsi"

#define CAM0_RST_L	TEGRA_MAIN_GPIO(R, 5)
#define CAM0_PWDN	TEGRA_MAIN_GPIO(R, 0)
#define CAM1_RST_L	TEGRA_MAIN_GPIO(R, 1)
#define CAM1_PWDN	TEGRA_MAIN_GPIO(L, 6)

/ {
	tegra-camera-platform {
		/**
		* tpg_max_iso = <>;
		* Max iso bw for 6 streams of tpg
		* streams * nvcsi_freq * PG_bitrate / RG10 * BPP
		* 6 * 102Mhz * 32 bits/ 10 bits * 2 Bps
		* = 3916.8 MBps
		*/
		tpg_max_iso = <3916800>;
	};

	/* set camera gpio direction to output */
	gpio@2200000 {
		camera-control-output-low {
			gpio-hog;
			output-low;
			gpios = <CAM0_RST_L 0 CAM0_PWDN 0
				 CAM1_RST_L 0 CAM1_PWDN 0>;
			label = "cam0-rst", "cam0-pwdn",
				"cam1-rst", "cam1-pwdn";
		};
	};

	/* all cameras are disabled by default */
	host1x {
		vi_base: vi@15700000 {
			status = "okay";
			ports {
				vi_port0: port@0 {
					status = "okay";
					vi_in0: endpoint {
						status = "okay";
					};
				};
				vi_port1: port@1 {
					status = "disabled";
					vi_in1: endpoint {
						status = "disabled";
					};
				};
				vi_port2: port@2 {
					status = "disabled";
					vi_in2: endpoint {
						status = "disabled";
					};
				};
				vi_port3: port@3 {
					status = "disabled";
					vi_in3: endpoint {
						status = "disabled";
					};
				};
				vi_port4: port@4 {
					status = "disabled";
					vi_in4: endpoint {
						status = "disabled";
					};
				};
				vi_port5: port@5 {
					status = "disabled";
					vi_in5: endpoint {
						status = "disabled";
					};
				};
			};
		};
		csi_base: nvcsi@150c0000 {
			status = "okay";
			csi_chan0: channel@0 {
				status = "okay";
				ports {
					csi_chan0_port0: port@0 {
						status = "okay";
						csi_in0: endpoint@0 {
							status = "okay";
						};
					};
					csi_chan0_port1: port@1 {
						status = "okay";
						csi_out0: endpoint@1 {
							status = "okay";
						};
					};
				};
			};
			csi_chan1: channel@1 {
				status = "disabled";
				ports {
					csi_chan1_port0: port@0 {
						status = "disabled";
						csi_in1: endpoint@2 {
							status = "disabled";
						};
					};
					csi_chan1_port1: port@1 {
						status = "disabled";
						csi_out1: endpoint@3 {
							status = "disabled";
						};
					};
				};
			};
			csi_chan2: channel@2 {
				status = "disabled";
				ports {
					csi_chan2_port0: port@0 {
						status = "disabled";
						csi_in2: endpoint@4 {
							status = "disabled";
						};
					};
					csi_chan2_port1: port@1 {
						status = "disabled";
						csi_out2: endpoint@5 {
							status = "disabled";
						};
					};
				};
			};
			csi_chan3: channel@3 {
				status = "disabled";
				ports {
					csi_chan3_port0: port@0 {
						status = "disabled";
						csi_in3: endpoint@6 {
							status = "disabled";
						};
					};
					csi_chan3_port1: port@1 {
						status = "disabled";
						csi_out3: endpoint@7 {
							status = "disabled";
						};
					};
				};
			};
			csi_chan4: channel@4 {
				status = "disabled";
				ports {
					csi_chan4_port0: port@0 {
						status = "disabled";
						csi_in4: endpoint@8 {
							status = "disabled";
						};
					};
					csi_chan4_port1: port@1 {
						status = "disabled";
						csi_out4: endpoint@9 {
							status = "disabled";
						};
					};
				};
			};
			csi_chan5: channel@5 {
				status = "disabled";
				ports {
					csi_chan5_port0: port@0 {
						status = "disabled";
						csi_in5: endpoint@10 {
							status = "disabled";
						};
					};
					csi_chan5_port1: port@1 {
						status = "disabled";
						csi_out5: endpoint@11 {
							status = "disabled";
						};
					};
				};
			};
		};
	};

	i2c@3180000 {
		e3326_cam0: ar0135_c@10 {
			status = "okay";
		};
		e3323_cam0: ov23850_a@10 {
			status = "disabled";
		};
		e3323_vcm0: lc898212@72 {
			status = "disabled";
		};
		tca6408@21 {
			status = "disabled";
		};
		tca9548@77 {
			status = "disabled";
			i2c@0 {
				e3333_cam0: ov5693_a@36 {
					status = "disabled";
				};
				e3322_cam0: imx219_a@10 {
					status = "disabled";
				};
			};
			i2c@1 {
				e3333_cam1: ov5693_b@36 {
					status = "disabled";
				};
				e3322_cam1: imx219_b@10 {
					status = "disabled";
				};
			};
			i2c@2 {
				e3333_cam2: ar0135_c@10 {
					status = "disabled";
				};
				e3322_cam2: imx219_c@10 {
					status = "disabled";
				};
			};
			i2c@3 {
				e3333_cam3: ov5693_d@36 {
					status = "disabled";
				};
				e3322_cam3: imx219_d@10 {
					status = "disabled";
				};
			};
			i2c@4 {
				e3333_cam4: ov5693_e@36 {
					status = "disabled";
				};
				e3322_cam4: imx219_e@10 {
					status = "disabled";
				};
			};
			i2c@5 {
				e3333_cam5: ov5693_f@36 {
					status = "disabled";
				};
				e3322_cam5: imx219_f@10 {
					status = "disabled";
				};
			};
		};
		tca9546_70: tca9546@70 {
			status = "disabled";
			i2c@0 {
				imx185_cam0: imx185_a@1a {
					status = "disabled";
				};
			};
		};
		tca9546_70: tca9546@70 {
			status = "disabled";
			i2c@0 {
				imx274_cam0: imx274_a@1a {
					status = "disabled";
				};
			};
		};
	};

	i2c@c240000 {
		e3323_cam1: ov23850_c@36 {
			status = "disabled";
		};
		e3323_vcm1: lc898212@72 {
			status = "disabled";
		};
	};

	tcp: tegra-camera-platform {
		compatible = "nvidia, tegra-camera-platform";
		modules {
			cam_module0: module0 {
				status = "okay";
				cam_module0_drivernode0: drivernode0 {
					status = "okay";
				};
				cam_module0_drivernode1: drivernode1 {
					status = "okay";
					pcl_id = "v4l2_lens";
				};
			};
			cam_module1: module1 {
				status = "disabled";
				cam_module1_drivernode0: drivernode0 {
					status = "disabled";
				};
				cam_module1_drivernode1: drivernode1 {
					status = "disabled";
					pcl_id = "v4l2_lens";
				};
			};
			cam_module2: module2 {
				status = "disabled";
				cam_module2_drivernode0: drivernode0 {
					status = "disabled";
				};
				cam_module2_drivernode1: drivernode1 {
					status = "disabled";
					pcl_id = "v4l2_lens";
				};
			};
			cam_module3: module3 {
				status = "disabled";
				cam_module3_drivernode0: drivernode0 {
					status = "disabled";
				};
				cam_module3_drivernode1: drivernode1 {
					status = "disabled";
					pcl_id = "v4l2_lens";
				};
			};
			cam_module4: module4 {
				status = "disabled";
				cam_module4_drivernode0: drivernode0 {
					status = "disabled";
				};
				cam_module4_drivernode1: drivernode1 {
					status = "disabled";
					pcl_id = "v4l2_lens";
				};
			};
			cam_module5: module5 {
				status = "disabled";
				cam_module5_drivernode0: drivernode0 {
					status = "disabled";
				};
				cam_module5_drivernode1: drivernode1 {
					status = "disabled";
					pcl_id = "v4l2_lens";
				};
			};
		};
	};
};

my hardware/nvidia/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill-camera-e3326-a00.dtsi.

/*
 * Copyright (c) 2015-2016, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <t18x-common-modules/tegra186-camera-e3326-a00.dtsi>
#include "dt-bindings/clock/tegra186-clock.h"

// #define CAM0_RST_L	TEGRA_MAIN_GPIO(R, 5)
// #define CAM0_PWDN	TEGRA_MAIN_GPIO(R, 0)

/* camera control gpio definitions */

/ {
	i2c@3180000 {
		ar0135_c@10 {
			/* Define any required hw resources needed by driver */
			/* ie. clocks, io pins, power sources */
			/* mclk-index indicates the index of the */
			/* mclk-name with in the clock-names array */

			clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH1>,
					 <&tegra_car TEGRA186_CLK_PLLP_OUT0>;
			clock-names = "extperiph1", "pllp_grtba";
			mclk = "extperiph1";
			//clock-frequency = <24000000>;
			clock-frequency = <25000000>;
			// reset-gpios = <&tegra_main_gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
			// pwdn-gpios = <&tegra_main_gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
			vana-supply = <&en_vdd_cam_hv_2v8>;
			vif-supply = <&en_vdd_cam>;
		};
	};

	// gpio@2200000 {
	// 	camera-control-output-low {
	// 		gpio-hog;
	// 		output-low;
	// 		gpios = <CAM0_RST_L 0 CAM0_PWDN 0>;
	// 		label = "cam0-rst", "cam0-pwdn";
	// 	};
	// };
};

hello askariz0503,

glad to know you’re able to successful capture the image from tc358743 driver with R28.2.1.
may I know how you fix the PXL_SOF failure in comment #7, is it due to your erroneous device tree settings?
thanks

Hi JerryChang,
Did you know what is problem with my statement above?
I can’t get the dev/video file!
Is it due to my erroneous device tree settings?
Please help me,thanks a lot!

Hi JerryChang,
That is due to default_timing settings in tc358743_probe function .

static struct v4l2_dv_timings default_timing =
        V4L2_DV_BT_CEA_1920X1080P60;

Because my captured HDMI is 1920X1080P50 So I set the default_timing is V4L2_DV_BT_CEA_1920X1080P50 ,in such situation . the 358743 module only enable 3 csi lanes output . and my device tree configure to 4 bus-lanes . It seems that fault cause PXL_SOF failure . when I change to V4L2_DV_BT_CEA_1920X1080P60 then it worked .

hi askariz0503:
Congratulations you have successfully transplanted tc358743 to L4T28.2.1, you said the source code, upload to the github download, please upload it ?, please give me a link.