UART application (app/uart-app.c) in spe-fw

Autonomous Machines Jetson & Embedded Systems Jetson TX2
1

Hi all,

serial@c280000 {
        compatible = "nvidia,tegra186-hsuart";
        status = "okay";
};

Im using j17 uart debug for spe-fw.
How could I check above situation ? I couldnt find anywhere.

2

Hi,

May I know why do you need to debug spe-fw?

3

hi WayneWWW,

[url]https://developer.nvidia.com/embedded/dlc/l4t_rt_aux_cpu_src[/url] I flashed this demo to my tx2 device. But I cannot debug it. I tried doc/uart.md. But I didnt understand this part.

4

Hi,

I believe you are talking about the document Jetson Sensor Processing Engine (SPE) Developer Guide, right?

Check kernel device tree to make sure that kernel will not initialize UART module under test against the settings in R5 firmware. For example, in R28.2.1, UARTC is configured in DTS as following by:
serial@c280000 {
        compatible = "nvidia,tegra186-hsuart";
        status = "okay";
};
Then kernel will re-initialize UARTC by high-speed mode, which will be conflicted with R5 firmware sample code. Please comment out this part of code and upgrade the kernel DTB.

This part is in the device tree source which is included in the kernel source.

5

I’m talking about SPE. How could I check and which pins uartg j17,j21 on the developer board?
Above my tx2 board :
https://icdn7.digitaltrends.com/image/digitaltrends/jetsontx2-03-640x640.jpg
I couldn’t any documentation where UARTG pins is
If 5,4 pins of j17. My output just,

Message from SPE R5 UART

but everyone see that output.

main enter
SPE VERSION #: ... ...
HW Function test
Start Scheduler.
in late init

how could I do that?

6

Please confirm if my understanding in #4 is correct or not. We don’t know what is your exact problem according to your first comment.

Do you follow our Jetson Sensor Processing Engine (SPE) Developer Guide? Do you paste the serial@c280000 because you are following up the document?

If yes, then please download the kernel source, set the serial@c28000 to “disabled”, rebuild the device tree and then reflash the device tree.

→ https://developer.nvidia.com/embedded/dlc/r32-2-1_Release_v1.0/TX2-AGX/sources/public_sources.tbz2

Please refer to below document for rebuilding kenrel dtb.
https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%2520Linux%2520Driver%2520Package%2520Development%2520Guide%2Fkernel_custom.html%23

7

sir,

I checked up the document. But https://developer.nvidia.com/embedded/dlc/l4t_rt_aux_cpu_src
I’ve not debugged yet

8

If you just want to know how to connect the hardware so that you can see such log, I believe you should use the UART7 of pin#D5 and D8.