UART bulk data write leads to Bootloader shell mode on reboot

Hi @JerryChang @WayneWWW

I’m working with the Radar over the ttyTHS1 and ttyTHS2 UART ports provided by the Tegra-High Speed Uart drivers.

I got some basic information on UARTs here :
THS0, THS1, THS4 and TCU0
I’m using THS1 and newly enabled THS2 UART for Radar.

from this I faced the exact error even though the approach is different as described here
Firstly, i’ve disabled the combined-uart provided as :
common/tegra194-p3668-common.dtsi
@@ -247,8 +247,8 @@

    combined-uart {
            console-port;
             combined-uart;
             status = "disabled";
    };  

In Linux_for_tegra/Xavier_NX : p3668.conf.common
-CMDLINE_ADD=“console=ttyTCU0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0”;
+CMDLINE_ADD=“console=ttyTHS0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0”;

Board booted fine with UARTs: THS0, THS1, THS2, THS4
On command line reboot, I still ended up with BooTloader Sheel Mode

Q1. Is there a document that helps in mapping the Debug-console port, I’m using UART to USB converter to check logs on ttyACM0 port on Host PC ?

Q2. How to rightly switch the Debug console UART port to THS4 or any other unused UART port ?
I still ended up with BooTloader Shell Mode.

Thanks for any help in this.

hello yash.j,

here’s discussion thread, NX change console to other uart, you may refer to.
please also refer to Topic 153941, check mappings for serial ports of ttyTHS*, and UART*
thanks

Hi @JerryChang

Thanks for pointing to right solution, i missed out on disabling combined-uart at tegra194-mb1-bct-misc-l4t.cfg.

The system turns of gracefully if there is no data being written while trying to reboot the board.

I also found that if I echo 0 > /dev/ttyTHS2 it clears the buffer and solves the issue. But I found that the THSUart driver has support for reset as :
tegra194-soc-uart.dtsi :
serial@c280000 {

resets = <&bpmp_resets TEGRA194_RESET_UARTC>;
reset-names = “serial”;
… }

But in the driver : serial-tegra.c :
static struct tegra_uart_chip_data tegra186_uart_chip_data = {
.tx_fifo_full_status = true,
.allow_txfifo_reset_fifo_mode = false,
… }

Is there a chance of providing Reset on this UART to provide a state change ?
As i referred the driver supporting it : serial-tegra.c (line 1188)
reset_control_assert(tup->rst);
udelay(10);
reset_control_deassert(tup->rst);

Thanks and regards,
Yash Jain

hello yash.j,

it’s uart driver to lookup and obtain an exclusive reference to a reset controller.
please check if there’s handler for controlling, then you might have implementation to call API for uart reset.
for example,

1811  static int tegra_uart_probe(struct platform_device *pdev)
1812  {
...
1863  	tup->rst = devm_reset_control_get(&pdev->dev, "serial");
1864  	if (IS_ERR(tup->rst)) {
1865  		dev_err(&pdev->dev, "Couldn't get the reset\n");
1866  		return PTR_ERR(tup->rst);