UEFI load Address and running Address

Robotics & Edge Computing Jetson Systems Jetson Thor
1

I get uefi code from Home · NVIDIA/edk2-nvidia Wiki · GitHub.
When we compile uefi, how to set or change link address?
The uefi bin is loaded to DDR from QSPI flash by mb2. What load Address is the uefi copied to? I have checked tegra264-mb2-bct-common.dtsi, and there is not any address setting for uefi loading.

3

It appears that :

MB2 / earlier NVIDIA boot firmware provides UEFI/CPUBL placement information
through the T264 CPUBL params structure.

On T264, UEFI reads a 64-bit CPUBL params pointer from MMIO/scratch address:

    0x0C980484

Then UEFI interprets that pointer as:

    TEGRA_CPUBL_PARAMS *CpuBootloaderParams

The UEFI/CPUBL DDR carveout base and size are read from:

    CpuBootloaderParams->CarveoutInfo[0][CARVEOUT_UEFI].Base
    CpuBootloaderParams->CarveoutInfo[0][CARVEOUT_UEFI].Size


# I'd review these files: 

edk2-nvidia/Silicon/NVIDIA/Library/PlatformResourceLib/T264ResourceConfig.c
edk2-nvidia/Silicon/NVIDIA/Include/Tegra/T264/T264BLParams.h
edk2-nvidia/Silicon/NVIDIA/Library/TegraPlatformInfoLib/TegraPlatformInfoLibPrivate.h
edk2-nvidia/Silicon/NVIDIA/Library/TegraPlatformInfoLib/AArch64/TegraPlatformInfo.S

If you want to broaden your review:

grep -RInE \
'T264_BLINFO_LOCATION_ADDRESS|TegraGetBLInfoLocationAddress|GetCPUBLBaseAddress|TEGRA_CPUBL_PARAMS|CARVEOUT_UEFI|CpublCoInfo|GetDTBBaseAddress' \
edk2-nvidia/Silicon/NVIDIA
4

Hi ycl,

On Jetson AGX Thor, the UEFI built from NVIDIA/edk2-nvidia is a relocatable PE/COFF image. MB2 always loads it into a fixed DRAM region decided by MB2 itself; this address is not configured in public MB2 BCT files (such as tegra264-mb2-bct-common.dtsi), so you won’t find any UEFI load-address setting there.

In other words, changing the UEFI link/load address is not a supported flow on Thor. If you just want to know where it ends up, you can check from a UEFI shell with memmap, or from Linux via /proc/iomem / dmesg | grep -i efi.