Unable to Use PEE.02 AON GPIO as SPI Interrupt Pin

We are attempting to use PEE.02 (pin #212) as an interrupt pin for SPI communication, but it seems there are issues with our driver claiming this pin and seeing the interrupt signals. When we switch to a different GPIO (PQ.06, pin #216) for our interrupt, communication works as intended. Is PEE.02 reserved for something other than a general-purpose GPIO? I see in the pinmux dtsi that it is called out as “ao_retention_n”, as opposed to “soc_gpio.” What does this mean?

Hi graceagrace,

Are you using the devkit or custom board for Orin NX?
What’s your Jetpack version in use?

PEE.02 is from AON(Always On) GPIO controller.

What do you mean about the issue when your driver requests this pin?
Is there any error in dmesg?

We are using a custom carrier board with Jetpack 5.1.3 installed. There are no errors in dmesg, and like I mentioned, SPI functions as expected when using a different GPIO.

In our SPI setup, the Jetson is the master, and our microcontroller is the slave. The behavior we see when trying to use PEE.02 as the interrupt pin is that the Jetson does not acknowledge that there is data to receive, essentially “ignoring” the interrupt and ceasing communication, despite both devices being online. I am wondering if there is a Jetson hardware-related reason why we are encountering this problem with PEE.02 but not with PQ.06.

Please share the device tree how you configure PEE.02 as interrupt.

We are using libgpiod to poll the interrupt and are not using a device tree configuration. We use the method gpiod_line_event_wait(), as described here. When I use gpio get on the command line, I am able to see the state of PEE.02; however, Linux does not register events on this pin in a way that we can use libgpiod.

Additionally, I did try to configure PEE.02 as an interrupt in the device tree, but this did not work, either. Below is my configuration for the SPI device:

		spi@0 {
			compatible = "tegra-spidev";
			reg = <0x00>;
			spi-max-frequency = <0x2faf080>;
			interrupt-parent = <0x51>;
			interrupts = <0x155 0x02>;

			controller-data {
				nvidia,cs-setup-clk-count = <0x20>;
				nvidia,rx-clk-tap-delay = <0x10>;
				nvidia,tx-clk-tap-delay = <0x0f>;

The interrupt-parent is the phandle for the tegra_aon_gpio controller.

I would like to check the one from source of device tree rather than the one decompiled from dtb.

Maybe you should use TEGRA234_AON_GPIO instead of TEGRA_AON_GPIO.