Updating the clock frequency in Device tree on jetson nx

Robotics & Edge Computing Jetson & Embedded Systems Jetson Xavier NX
31

Hello,

We faced some issues with CAN when we installed the latest jetpack (4.5.1) onto a xavier. On an older installation CAN worked fine on 500 kbit/s.

I discovered that the CAN peripheral is now clocked with another parent clock. I followed the guide on updating the parent clock in the kernel-dtb file and the bpmp-dtb file.

This was the output in case CAN does not work properly:

$ ip -det link
...
10: can0: <NOARP,UP,LOWER_UP,ECHO> mtu 72 qdisc pfifo_fast state UP mode DEFAULT group default qlen 100
        link/can  promiscuity 0
        can <BERR-REPORTING,FD> state ERROR-PASSIVE (berr-counter tx 0 rx 127) restart-ms 0
            bitrate 498701 sample-point 0.870
            tq 26 prop-seg 33 phase-seg1 33 phase-seg2 10 sjw 1
            mttcan: tseg1 2..255 tseg2 0..127 sjw 1..127 brp 1..511 brp-inc 1
            dbitrate 2021052 dsample-point 0.736
            dtq 26 dprop-seg 6 dphase-seg1 7 dphase-seg2 5 dsjw 1
            mttcan: dtseg1 1..31 dtseg2 0..15 dsjw 1..15 dbrp 1..15 dbrp-inc 1
            clock 38400000numtxqueues 1 numrxqueues 1 gso_max_size 65536 gso_max_segs 65535
...

I modified bootloader/t186ref/tegra194-a02-bpmp-p2888-a04.dtb:

		clock@can1 {
 			allow_fractional_divider = <0x1>;
-			allowed-parents = <0x121 0x5b 0x13a>;
+			allowed-parents = <0x121 0x5b 0x5e 0x13a>;
 			clk-id = <0x9>;
 		};
 
 		clock@can2 {
 			allow_fractional_divider = <0x1>;
-			allowed-parents = <0x121 0x5b 0x13a>;
+			allowed-parents = <0x121 0x5b 0x5e 0x13a>;
 			clk-id = <0xb>;
 		};

Used this command to flash this dtb file (note that we have a redundant setup, so we flash both slot A and slot B (suffix _b)):

$ sudo ./flash.sh  -r  -k bpmp-fw-dtb jetson-agx-xavier-devkit mmcblk0p1
$ sudo ./flash.sh  -r  -k bpmp-fw-dtb_b jetson-agx-xavier-devkit mmcblk0p1

After a reboot, verify that the proper dtb is loaded by checking /sys/kernel/debug/bpmp/debug/dt.

Next up, I modified kernel/dtb/tegra194-p2888-0001-p2822-0000.dtb:

--- kernel/dtb/tegra194-p2888-0001-p2822-0000.dts.bak	2021-04-19 13:33:34.342762489 +0200
+++ kernel/dtb/tegra194-p2888-0001-p2822-0000.dts	2021-04-19 13:34:32.248801134 +0200
@@ -5293,9 +5293,9 @@
 		reg = <0x0 0xc310000 0x0 0x400 0x0 0xc311000 0x0 0x32 0x0 0xc312000 0x0 0x1000>;
 		reg-names = "can-regs", "glue-regs", "msg-ram";
 		interrupts = <0x0 0x28 0x4>;
-		pll_source = "osc";
-		clocks = <0x4 0x11c 0x4 0xa 0x4 0x9 0x4 0x5b>;
-		clock-names = "can_core", "can_host", "can", "osc";
+		pll_source = "pllaon";
+		clocks = <0x4 0x11c 0x4 0xa 0x4 0x9 0x4 0x5b 0x4 0x5e>;
+		clock-names = "can_core", "can_host", "can", "osc", "pllaon";
 		resets = <0x5 0x4>;
 		reset-names = "can";
 		mram-params = <0x0 0x10 0x10 0x20 0x0 0x0 0x10 0x10 0x10>;
@@ -5311,9 +5311,9 @@
 		reg = <0x0 0xc320000 0x0 0x400 0x0 0xc321000 0x0 0x32 0x0 0xc322000 0x0 0x1000>;
 		reg-names = "can-regs", "glue-regs", "msg-ram";
 		interrupts = <0x0 0x2a 0x4>;
-		pll_source = "osc";
-		clocks = <0x4 0x11d 0x4 0xc 0x4 0xb 0x4 0x5b>;
-		clock-names = "can_core", "can_host", "can", "osc";
+		pll_source = "pllaon";
+		clocks = <0x4 0x11d 0x4 0xc 0x4 0xb 0x4 0x5b 0x4 0x5e>;
+		clock-names = "can_core", "can_host", "can", "osc", "pllaon";
 		resets = <0x5 0x5>;
 		reset-names = "can";
 		mram-params = <0x0 0x10 0x10 0x20 0x0 0x0 0x10 0x10 0x10>;
@@ -13576,7 +13576,7 @@
 		status = "okay";
 
 		disable {
-			clocks = <0x14d 0x5e 0x4 0x9 0x4 0xb>;
+			clocks = < 0x4 0x9 0x4 0xb>;
 		};
 	};

And flash this device tree as well:

$ sudo ./flash.sh -r -k kernel-dtb jetson-agx-xavier-devkit mmcblk0p1
$ sudo ./flash.sh -r -k kernel-dtb_b jetson-agx-xavier-devkit mmcblk0p1

Verify the device tree is loaded by checking the proc file /proc/device-tree/mttcan@c310000/pll_source .

Note that for this to work, you do not need to modify and recompile the kernel.

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