my problem was solved， Thanks a lot!
here is my selution:
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i quoted the refclk releated part in tc358743.c ,cause my capture booard has an ext clk ,which dosen’t need the orin nx to output a clk. BTW the jetson can output 24M clk max , it’s not enough for the tc358743 which need at least a 26M clk. i manully set the refclk_hz at 27M . which can also botain from the dt file if it is set.
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I chang the csi5_fops.c to add a mipi_clock_rate_hz param after the lane_polarity pram in the csi5_stream_set_config function. and cil_config.mipi_clock_rate = mipi_clock_rate / 1000; so the csi cil_cil_config get the right mipi_clock_rate ;
my dt was modify from the tc358840 dt file where can be found in the path
/Linux_for_Tegra/source/public/hardware/nvidia/platform/t19x/common/kernel-dts/t19x-common-modules/tegra194-camera-imx274-hdmi.dtsi
the cil_settletime,lane_polarity should also be added to the CSI_CHAN part of dt file. so the csi5_fops can get these param from the dt node. other than the s_data(which means the camera_common_data struct, in that you have to use the tegra camera platform structure and change the driver and the dt file a lot like a cam)