I know there are HW and SW methods of initiating Jetson Nano shutdown. A few questions related to this:
Which of these methods guarantees that file system will not be corrupted?
One hw method is to pull down POWER_EN pin. Are there other hw methods? e.g. can shutdown be initiated by a module GPIO?
Could you please provide a good summary of initiating sw shutdown from user space?
A few related posts:
hello shubham.shah09,
you may use SW_SHUTDOWN* to perform a software shutdown control ,
please also refer to Nano PMIC device tree, it has GPIO pin for SW shutdown control with default value as high.
for example,
i2c@7000d000 {
nvidia,bit-bang-after-shutdown;
max77620: max77620@3c {
compatible = "maxim,max77620";
maxim,power-shutdown-gpio-states = <1 0>;
low-battery-mo…
hello tfuru2,
you may have a try to toggle the GPIO value.
please check the GPIO number of spmic-default-output-high
for example,
# cat /sys/kernel/debug/gpio | grep spmic
gpio-505 ( |spmic-default-output) out hi
after that,
please toggle the pin values to check the behavior,
for example,
# echo 505 > /sys/class/gpio/export
# cat /sys/class/gpio/gpio505/value
# echo 0 > /sys/class/gpio/gpio505/value
I’ve test it remotely and it seems the target has shutdown with ab…
Use software command “sudo shutown” (and with any parameters) shall guarantee the correct shutdown.
For Q2, it is similar to generate a sw shutdown by GPIO input.
A. The link above titled “Software Shutdown Triggered by Jetson GPIO” mentions GPIO 505. As far as I can tell this is a gpio internal to the Jetson Nano Module. Please confirm.
B. If GPIO 505 is not just an internal GPIO, what pin # does it map to in the pinmux?
You can use below page to calculate the mapping.
/* SPDX-License-Identifier: GPL-2.0 */
/*
* This header provides constants for binding nvidia,tegra*-gpio.
*
* The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
* provide names for this.
*
* The second cell contains standard flag values specified in gpio.h.
*/
#ifndef _DT_BINDINGS_GPIO_TEGRA_GPIO_H
#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H
#include <dt-bindings/gpio/gpio.h>
#define TEGRA_GPIO_PORT_A 0
#define TEGRA_GPIO_PORT_B 1
#define TEGRA_GPIO_PORT_C 2
#define TEGRA_GPIO_PORT_D 3
#define TEGRA_GPIO_PORT_E 4
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Thank you for the mapping. However, this does not answer my question of what pin gpio-505 corresponds to. In fact this mapping shows that the max GPIO # is 255 (31*8+7). So does gpio-505 map to an IO on the module? I think the answer is no. But I would appreciate a confirmation. This question has not been clearly answered in other forum topics as well.
More importantly, will pulling down POWERN_EN(hw method), guarantee that filesystem will not be corrupted?
shgarg
April 22, 2022, 9:44am
10
GPIO505 is not a tegra gpio so you should not use tegra gpio mapping. It is coming from system pmic. PMIC has 8 GPIOs, gpio505 corresponds to GPIO1.
You can check /sys/kernel/debug/gpio. There will tell you whether those gpios have any offset or not.
Or whether that gpio ranges is tegra gpio or not.
system
May 18, 2022, 1:51am
13
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