Jetson Nano wake from shutdown/poweroff functionality?

Is it possible to wake the Jetson Nano after having halted it (other than plugging in and out USB power cable)?

When you do sudo halt on a Raspberry Pi it actually essentially reboots except that on reboot the bootloader prevents the boot-up process from continuing unless it sees GPIO3 pulled low.

The sudo halt squirrels away a volatile magic value that the bootloader can read on startup. If the system wasn’t stopped this way or the Pi was power cycled (and so lost the magic value) then the bootloader lets the full boot process run thru.

However, if the bootloader does see this magic value it puts the board into a low power sleep mode from which it can be woken be pulling GPIO3 low.

So is there any similar functionality on the Jetson Nano board?

I can’t find any good reference for the Raspberry Pi behavior - but it seems to be well known, e.g. it’s described in this Github comment by a Kodi developer.

Hi,
We don’t have experience of using ‘sudo halt’. Could you share more information about the function? It seems software controls hardware pin GPIO3 on Raspberry Pi. If we would like to run it on Nano, maybe we have to configure it to designate pin?

I believe the use of ‘halt’ is system specific. In the case of Solaris, issuing a ‘halt’ command takes the system to the ‘ok’ boot prompt.

However, with the Jetson Nano, issuing halt causes a Dump for CPU0 and takes the system to a ‘debug’ prompt. If there is no entry from the console it will bring the system back up again.

Using a FTDI to USB serial cable connected to J44, this is what is seen on the console after issuing ‘sudo halt’.
NOTE: Typing exit will cause the system to reboot again.

[ 1088.383974] reboot: System halted                                            
Dump for CPU0:                                                                  
pid: 1  comm: systemd-shutdow                                                   
  x0 0000000000000000   x1 ffffffc0fa6f0000                                     
  x2 0000000000000000   x3 0000000000000000                                     
  x4 0000000000000000   x5 0000000000000002                                     
  x6 ffffff80083d23f8   x7 ffffff8009e740d8                                     
  x8 ffffff80083d2fe8   x9 ffffff800b07bae0                                     
 x10 000000000000039c  x11 0000000000000020                                     
 x12 00000000ffffffff  x13 ffffff8008fd1b30                                     
 x14 ffffff808a103a62  x15 0000000000000001                                     
 x16 0000000000000000  x17 0000000000000001                                     
 x18 0000000000000010  x19 0000000000000000                                     
 x20 ffffffffcdef0123  x21 ffffff8009e3e000                                     
 x22 ffffff8009e3e7e8  x23 822968f956c4c600                                     
 x24 0000000000000015  x25 0000000000000123                                     
 x26 000000000000008e  x27 ffffff8008f52000                                     
 x28 ffffffc0fa6f0000  x29 ffffffc0fa6bfd60                                     
 x30 ffffff8008085efc   sp ffffffc0fa6bfd60                                     
  pc ffffff8008085efc cpsr 600000c5 (EL1h)                                      
                                                                                
machine_halt+0x1c/0x20:                                                         
  pc ffffff8008085efc   sp ffffffc0fa6bfd60   fp ffffffc0fa6bfd60               
kernel_halt+0x5c/0x68:                                                          
  pc ffffff80080df81c   sp ffffffc0fa6bfd70   fp ffffffc0fa6bfd70               
SyS_reboot+0x1f0/0x208:                                                         
  pc ffffff80080dfaf0   sp ffffffc0fa6bfd80   fp ffffffc0fa6bfd80               
el0_svc_naked+0x34/0x38:                                                        
  pc ffffff80080838c0   sp ffffffc0fa6bfd90   fp 0000000000000000               
debug>   x0 0000000000000000   x1 ffffffc0fa6f0000                              
  x2 0000000000000000   x3 0000000000000000                                     
  x4 0000000000000000   x5 0000000000000002                                     
  x6 ffffff80083d23f8   x7 ffffff8009e740d8                                     
  x8 ffffff80083d2fe8   x9 ffffff800b07bae0                                     
 x10 000000000000039c  x11 0000000000000020                                     
 x12 00000000ffffffff  x13 ffffff8008fd1b30                                     
 x14 ffffff808a103a62  x15 0000000000000001                                     
 x16 0000000000000000  x17 0000000000000001                                     
 x18 0000000000000010  x19 0000000000000000                                     
 x20 ffffffffcdef0123  x21 ffffff8009e3e000                                     
 x22 ffffff8009e3e7e8  x23 822968f956c4c600                                     
 x24 0000000000000015  x25 0000000000000123                                     
 x26 000000000000008e  x27 ffffff8008f52000                                     
 x28 ffffffc0fa6f0000  x29 ffffffc0fa6bfd60                                     
 x30 ffffff8008085efc   sp ffffffc0fa6bfd60                                     
  pc ffffff8008085efc cpsr 600000c5 (EL1h)                                      
 sp_el0   ffffffc0fa6f0000                                                      
 elr_el1  ffffff800811fcd8                                                      
 spsr_el1 60000045                                                              
rebug> Dduembpu gf> o                                                           
> dCePbUu1:g                                                                    
p                                                                               
midde:b u0g  >c o                                                               
emd:e bsuwga>p p                                                                
urd/e1b                                                                         
0g >  x                                                                         
  d0e0b0u0g0>0 0                                                                
0d0e0b0u0g0>0 0                                                                 
  d e bxu1g >f fffff8009e26e48                                                  
  x2 0000000000000001   x3 0000000000000002                                     
  x4 0000000000000015   x5 00ffffffffffffff                                     
  x6 0000000011e3fd5a   x7 fefefeff646c606d                                     
  x8 7f7f7f7f7f7f7f7f   x9 ffffffffffffffff                                     
 x10 0101010101010101  x11 000000000000000b                                     
 x12 0000000034d5d91d  x13 00000040f57f5000                                     
 x14 ffffffc0fa7baa00  x15 0000000000000000                                     
 x16 0000000000000000  x17 0000000000093783                                     
 x18 0000000000000000  x19 ffffff80097fd000                                     
 x20 ffffff80097f4000  x21 0000000000000000                                     
 x22 0000000000000002  x23 0000000000000002                                     
 x24 0000000000000001  x25 ffffffc0fefe9060                                     
 x26 ffffffc0fefed050  x27 ffffff8009e26000                                     
 x28 ffffffc0fa7baa00  x29 ffffffc0fefecfb0                                     
 x30 ffffff8008093438   sp ffffffc0fefecfb0                                     
  pc ffffff800809343c cpsr 400001c5 (EL1h)                                      
                                                                                
handle_IPI+0x2a4/0x2e8:                                                         
  pc ffffff800809343c   sp ffffffc0fefecfb0   fp ffffffc0fefecfb0               
gic_handle_irq+0xa8/0xb0:                                                       
  pc ffffff8008080d90   sp ffffffc0fefecfc0   fp ffffffc0fefed000               
el1_irq+0xe8/0x18c:                                                             
  pc ffffff8008082be8   sp ffffffc0fefed010   fp ffffffc0fefed040               
cpuidle_enter_state+0xb8/0x380:                                                 
  pc ffffff8008b85d98   sp ffffffc0fa7cbd80   fp ffffffc0fa7cbeb0               
cpuidle_enter+0x34/0x48:                                                        
  pc ffffff8008b860d4   sp ffffffc0fa7cbec0   fp ffffffc0fa7cbf00               
call_cpuidle+0x44/0x70:                                                         
  pc ffffff80081129b4   sp ffffffc0fa7cbf10   fp ffffffc0fa7cbf30               
cpu_startup_entry+0x1b0/0x200:                                                  
  pc ffffff8008112d30   sp ffffffc0fa7cbf40   fp ffffffc0fa7cbf60               
secondary_start_kernel+0x190/0x1f8:                                             
  pc ffffff8008092ce8   sp ffffffc0fa7cbf70   fp ffffffc0fa7cbfd0               
0x80f441a4:                                                                     
  pc 0000000080f441a4   sp ffffffc0fa7cbfe0   fp 0000000000000000               
debug>   x0 0000000000000000   x1 ffffff8009e26e48                              
  x2 0000000000000001   x3 0000000000000002                                     
  x4 0000000000000015   x5 00ffffffffffffff                                     
  x6 0000000011e3fd5a   x7 fefefeff646c606d                                     
  x8 7f7f7f7f7f7f7f7f   x9 ffffffffffffffff                                     
 x10 0101010101010101  x11 000000000000000b                                     
 x12 0000000034d5d91d  x13 00000040f57f5000                                     
 x14 ffffffc0fa7baa00  x15 0000000000000000                                     
 x16 0000000000000000  x17 0000000000093783                                     
 x18 0000000000000000  x19 ffffff80097fd000                                     
 x20 ffffff80097f4000  x21 0000000000000000                                     
 x22 0000000000000002  x23 0000000000000002                                     
 x24 0000000000000001  x25 ffffffc0fefe9060                                     
 x26 ffffffc0fefed050  x27 ffffff8009e26000                                     
 x28 ffffffc0fa7baa00  x29 ffffffc0fefecfb0                                     
 x30 ffffff8008093438   sp ffffffc0fefecfb0                                     
  pc ffffff800809343c cpsr 400001c5 (EL1h)                                      
 sp_el0   ffffffc0fa7baa00                                                      
 elr_el1  ffffff8008b85d98                                                      
 spsr_el1 60000045                                                              
debug>

Sorry for the confusion - I thought halt and shutdown now / poweroff were synonymous - they are on some systems. But as Jonny Move points out the behavior is system specific.

So I actually just meant is it possible to wake the system from the state it enters when you shut it down via the command line, e.g. with sudo shutdown now?

halt, poweroff, reboot and shutdown are all soft links to /sbin/systemctl which invokes different behavior depending on the name with which it was invoked.

I’m guessing poweroff and reboot are identical as far as the shutdown process is concerned, so I’m interested in the point in the process where one of the two decides to continue on into booting up again and the other decides to enter a powered but unresponsive state.

Is it possible to wake it from this unresponsive state? As noted in my original message it is possible with the Pi - you just pull the GPIO3 pin low.

Maybe first it would be interesting to find out in what exact state the Nano is in when you’ve done shutdown? On the Pi the bootloader has pushed it into an extremely low power situation (from which it can be woken as described).

First, this is stated in the man page for Ubuntu:
http://manpages.ubuntu.com/manpages/bionic/man8/systemd-halt.service.8.html

Note that systemd-halt.service (and the related units) should never be executed directly.
       Instead, trigger system shutdown with a command such as "systemctl halt" or suchlike

http://manpages.ubuntu.com/manpages/bionic/man8/systemd-halt.service.8.html

Also, from the link you reference, this question seems to be specific to Windows 10 IoT and thus is not OS specific. Also, as is mentioned in the post you listed, the behavior on the RasPi is implemented in the bootcode.bin firmware which is where the 10 LED blinks before shutdown comes from.

This might interest you though:
https://elinux.org/RPI_safe_mode#cite_note-1
or
https://www.raspberrypi.org/forums/viewtopic.php?f=29&t=12007
The Jumper used is a bit scary though.

However, this link shows how to customize the boot behavior and how to add a systemd service on the Pi. Perhaps something similar could be done on the Nano.
https://www.raspberrypi.org/documentation/linux/usage/systemd.md

Also, I have seen with the RasPi where something like the MATRIX Creator will auto boot the Pi when shutdown even if you issue a ‘shutdown -h’ but I am not sure if it something they had implemented in their hardware or a driver they load.

The eLinux wake on halt behavior is exactly what I’m talking about.

Shorting pin 6 (ground) to pin 5 (GPIO3) pulls GPIO3 low and brings the Pi out of the deep sleep mode into which it was placed by the bootloader (this is implemented in the bootcode.bin firmware that you mention).

OK - so now we’re clear that this behavior exists for the Pi.

So all I’m asking is - is their similar functionality on the Jetson Nano development board?

If you’re building the board into a robot or such like it can be convenient to be able to wake up the board, in this kind of way, if it’s been shutdown without having to somehow cycle the power.

Deepest sleep state Nano goes is LP0 (suspend). All CPU are dead and ram is in self refresh.
There is no support for hibernation .

Can you use system suspend and wake from suspend using wake interrupts like on key to meet your requirement.

Thanks for the reply bbasu. But don’t actually want to resume a previous state - either via hibernate or resume.

When I say “wake” I simply mean I want to get the system out of the inactive state it reaches on doing a shutdown.

When I’ve shutdown my Nano the board is still powered, i.e. the USB power supply is still connected.

It seems odd to me that the only apparent way to then power up the system is to first actively remove power, i.e. disconnect the USB power cable, before reconnecting it.

It would be interesting to know what changes in the state of the board as a result of having the power disconnected, such that when it is reconnected it doesn’t just reenter the same inactive state but instead boots up.

Maybe it’s possible to achieve this same state change without disconnecting the USB power cable.

On various computer systems that I own the power button doesn’t simply cycle the power - it generally does nothing if pressed while the computer is running (though typically one can hold it depressed for several seconds to force a power down), but if pressed after a shutdown it causes the system to boot.

So this question is all about whether it’s possible to implement something similar with the Nano? As discussed, it is with some other SBCs - on the Pi for example pulling GPIO3 low will do this (shorting ground and pin 5).

There is the functionality of the J40 Power and Suspend header which may or may not be what you are looking for.
https://devtalk.nvidia.com/default/topic/1050888/jetson-nano/power-and-suspend-buttons-for-jetson-nano/
https://developer.download.nvidia.com/assets/embedded/secure/jetson/Nano/docs/Jetson_Nano_Developer_Kit_User_Guide.pdf?Iti2_4mAH-ryLyRA4a4ojZS3942PKvFctjGwdgFbG27OuMYgpu18-qCh7Tli_5y6t_S2Z7j4buxvUiUgGgQ3a_4gHFKhHmhcxpVwcCD9hJHdLFwkxHxxgQl69X1k_3Cp_5F6NKKIR-2HcUAs8UpmqlAoYZrYx2mFHaneyHuZlNRFJ0DXmtUv7KDeJ_ooQpU

I guess, jonnymovo has responded to your problem.
Its absolutely not necessary to plug out the usb cable and replug to power cycle.

Thanks jonnymovo - that was exactly the information I was looking for.

I just got things working as I wanted and can confirm that the J40 header enables access to the functionality I was looking for.

I wrote up my experiences in some more detail here.

I haven’t been been a member here long enough that I can use the img tag - but you can see one of the pictures from my write up here, showing the Nano connected to a push button that will startup the system when pressed.