When can we expect a Orin to release with the full 4096 shading units?

[theofficialgman]

External Image

GA10B as seen in the die shot here clearly has 4 GSP with 8 SM each (32 SM total).

The highest tier offering is currently AGX Orin Devkit/64GB/Industrial which only has 16 SM enabled.

Are yields simply too low to sell variants with higher than 16 SM enabled? This does not seem to be the case on other Ampere offerings made on the same production process where there are variants with 100% of the on-die SM are enabled (eg: RTX 3090ti and A40)

[AastaLLL]

Hi,

Please check our Orin document below:

nvidia-jetson-agx-orin-technical-brief.pdf

Jetson AGX Orin modules contain an integrated Ampere GPU composed of 2 Graphic Processing Clusters (GPCs), up to 8 Texture Processing Clusters (TPCs), up to 16 Streaming Multiprocessors (SM’s), 192 KB of L1-cache per SM, and 4 MB of L2 Cache. There are 128 CUDA cores per SM for Ampere compared to the 64 CUDA cores for Volta, and four 3rd Generation Tensor cores per SM.

So at most 16 SMs with 2048 CUDA cores.

Thanks.

[theofficialgman]

Hi,

I am well aware of the technical briefs.

Please check the first post attached die shot provided by Nvidia to the press.
There appear to be 4 GSP with 8 SM each (32 SM total). As stated, each SM has 128 CUDA cores, which works out to a maximum ON DIE 4096 CUDA cores. I have marked it up for you below:

I will provide another example image with GA102 Die (also Nvidia provided) which has 84 SM total with 7 GSP (so 12 SM per GSP) https://images.nvidia.com/aem-dam/en-zz/Solutions/geforce/ampere/pdf/NVIDIA-ampere-GA102-GPU-Architecture-Whitepaper-V1.pdf

Please answer the question and don’t work around it.

[DaneLLL]

Hi,
It is expected to have deviation between DRIVE OS and L4T release. Please note this.

[theofficialgman]

Drive Orin has the same issue. Docs say 2 GSP with 2048 CUDA cores form Drive Orin when we can clearly see from the die shot that there are 4 GSP with double the CUDA cores.

Again, please answer the question asked.

[DaneLLL]

Hi,
We don’t have plan for the request. The capability is clearly described in the document.

[theofficialgman]

Thanks for the lack of help.

I figured it out anyway. 3 and 4 as I have drawn are almost certainly the NVDLA cores or the PVA. I was not expecting them to be laid out so similarly to a GSP.