我们自研的主板，在使用jetpack5.1.5的时候，USB3.0的U盘只能识别到2.0；设备树里面看到usb2和usb3的port都是打开的，我们主板上USB2.0和USB3.0信号是直接接出来的，没有经过HUB，请教这个要如何排查？
这个是USB3.0的U盘只认到了USB2.0，下面是我们USB部分的原理，麻烦帮忙看下
USB.pdf (265.8 KB)
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Based on the provided context, it appears that you are asking about the Jetson AGX Orin Developer Kit and its configuration for USB ports.
The Jetson AGX Orin Developer Kit supports multiple USB ports, including USB 2.0 and USB 3.0. The kit comes with a USB 3.0 hub that allows for multiple USB devices to be connected.
To configure the USB ports on the Jetson AGX Orin Developer Kit, you can refer to the “Porting the Universal Serial Bus” section in the provided context. This section provides information on the USB structure, USB SerDes lane assignment, and required device tree changes.
Additionally, the “UPHY Lane Configuration” section provides information on how to configure the UPHY lanes for USB 3.0.
It’s also worth noting that the Jetson AGX Orin Developer Kit supports PCIe endpoint mode, which allows for high-speed data transfer between devices. This is configured through the “PCIe Endpoint Mode” section in the provided context.
In terms of the specific image you mentioned (jetpack515USB30U20usb2usb3portUSB20USB30HUB image 713196 942 KB), it appears to be a configuration file for the Jetson AGX Orin Developer Kit that enables USB 3.0 and USB 2.0 ports. However, without more information, it’s difficult to provide a more detailed explanation of this image.
In comparison to other Jetson modules, the Jetson AGX Orin Developer Kit has a more comprehensive set of USB ports, including USB 3.0 and USB 2.0. This makes it a good choice for applications that require high-speed data transfer between devices.
Here is a summary of the USB ports supported by different Jetson modules:
- Jetson AGX Orin Developer Kit: USB 3.0 and USB 2.0
- Jetson Orin NX and Nano Series: USB 2.0 and USB 3.0 (depending on the specific module)
Overall, the Jetson AGX Orin Developer Kit provides a flexible and high-performance USB configuration that can be tailored to meet the needs of a wide range of applications.
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下面是我们USB部分的原理，麻烦帮忙看下
你們的這張原理圖裡面沒有接上USB3 信號…請問有貼錯內容嗎
請問這個UPHY_TX/RX1是接到你第一個pdf的哪邊呢…?
请忽略第一个图，我们是把这6跟信号线直接接到了USB接口上了
厄… 那請問你能提供現在的線路圖嗎?
麻煩理解一下, device tree是要跟著實際線路設定的.
你的說法 “6跟信号线直接接到了USB接口” 基本上全世界的USB設計都是差不多這樣… 其他細節才是現在問題的重點. 也不知道你所謂的信號線是指什麼.
USB.pdf (278.7 KB)这是现在的原理图，麻烦看下有没有问题，我会同步更改设备树
是的，这是现在USB3.0不能识别到的原理图
usb2-1/usb3-1這部份跟原生device tree不一樣.
vbus-supply看起來有使用gpio做控制. 也會跟原生device tree不一樣.
基本上照著文件做先