AGX Orin connect two 8M cameras open failed

[Luna2020]

Hi NV_Teams,

We have two 8M gmsl cameras connect to AGX Orin through MAX96712.

1. If plug-in one 8M camera works fine.
2. If plug-in two 8M cameras can’t open any one to preview.

root@nvidia-desktop:/home/nvidia# cat /sys/kernel/debug/bpmp/debug/clk/vi/max_rate |tee /sys/kernel/debug/bpmp/debug/clk/vi/rate
832000000
root@nvidia-desktop:/home/nvidia# cat /sys/kernel/debug/bpmp/debug/clk/isp/max_rate | tee  /sys/kernel/debug/bpmp/debug/clk/isp/rate
1011200000
root@nvidia-desktop:/home/nvidia# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/nvcsi/rate
642900000
root@nvidia-desktop:/home/nvidia# cat /sys/kernel/debug/bpmp/debug/clk/emc/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/emc/rate
3199000000

Dmesg log
[  210.452034] calculate_and_set_device_clock: cdev->hw_type:3[cdev->clk_rate=1036880080], 1
[  210.455919] calculate_and_set_device_clock: cdev->hw_type:3[cdev->clk_rate=1036880080], 1
[  210.456157] calculate_and_set_device_clock: cdev->hw_type:4[cdev->clk_rate=225000001], 1
[  210.456399] calculate_and_set_device_clock: cdev->hw_type:1[cdev->clk_rate=225000000], 1

CSI Trace log
     kworker/4:1-55      [004] ....   502.837381: rtcpu_vinotify_event: tstamp:18986002755 cch:-1 vi:1 tag:FS channel:0x01 frame:0 vi_tstamp:607542278144 data:0x0000000000000015
     kworker/4:1-55      [004] ....   502.837382: rtcpu_vinotify_event: tstamp:18986002916 cch:-1 vi:1 tag:CHANSEL_NOMATCH channel:0x60 frame:0 vi_tstamp:607543496576 data:0x0000000000000249
     kworker/4:1-55      [004] ....   502.837383: rtcpu_nvcsi_intr: tstamp:18986128442 class:GLOBAL type:PHY_INTR0 phy:3 cil:0 st:0 vc:0 status:0x0e000000
     kworker/4:1-55      [004] ....   502.837383: rtcpu_nvcsi_intr: tstamp:18986128442 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x06000000
     kworker/4:1-55      [004] ....   502.837384: rtcpu_vinotify_error: tstamp:18986170177 cch:0 vi:1 tag:CHANSEL_NOMATCH channel:0x20 frame:0 vi_tstamp:607557420864 data:0x0000000000000249
     kworker/4:1-55      [004] ....   502.837385: rtcpu_vinotify_event: tstamp:18986340643 cch:0 vi:1 tag:FE channel:0x00 frame:0 vi_tstamp:607556107232 data:0x0000000000000025
     kworker/4:1-55      [004] ....   502.837385: rtcpu_vinotify_event: tstamp:18986340776 cch:0 vi:1 tag:FS channel:0x00 frame:0 vi_tstamp:607556206080 data:0x0000000000000015
     kworker/4:1-55      [004] ....   502.837386: rtcpu_vinotify_event: tstamp:18986340925 cch:0 vi:1 tag:CHANSEL_NOMATCH channel:0x20 frame:0 vi_tstamp:607557420864 data:0x0000000000000249
     kworker/4:1-55      [004] ....   502.837386: rtcpu_nvcsi_intr: tstamp:18986734911 class:GLOBAL type:PHY_INTR0 phy:3 cil:0 st:0 vc:0 status:0x0e000000
     kworker/4:1-55      [004] ....   502.837387: rtcpu_nvcsi_intr: tstamp:18986734911 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x06000000
     kworker/4:1-55      [004] ....   502.837388: rtcpu_vinotify_error: tstamp:18986776675 cch:-1 vi:1 tag:CHANSEL_NOMATCH channel:0x60 frame:0 vi_tstamp:607576828800 data:0x0000000000000249
     kworker/4:1-55      [004] ....   502.837388: rtcpu_vinotify_event: tstamp:18987016843 cch:-1 vi:1 tag:FE channel:0x01 frame:0 vi_tstamp:607575514208 data:0x0000000000000025
     kworker/4:1-55      [004] ....   502.837388: rtcpu_vinotify_event: tstamp:18987016991 cch:-1 vi:1 tag:FS channel:0x01 frame:0 vi_tstamp:607575610688 data:0x0000000000000015
     kworker/4:1-55      [004] ....   502.837389: rtcpu_vinotify_event: tstamp:18987017120 cch:-1 vi:1 tag:CHANSEL_NOMATCH channel:0x60 frame:0 vi_tstamp:607576828800 data:0x0000000000000249
     kworker/4:1-55      [004] ....   502.893380: rtcpu_nvcsi_intr: tstamp:18987170085 class:GLOBAL type:PHY_INTR0 phy:3 cil:0 st:0 vc:0 status:0x0e000000
     kworker/4:1-55      [004] ....   502.893382: rtcpu_nvcsi_intr: tstamp:18987170085 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x06000000
     kworker/4:1-55      [004] ....   502.893384: rtcpu_vinotify_event: tstamp:18987173666 cch:0 vi:1 tag:FE channel:0x00 frame:0 vi_tstamp:607589439808 data:0x0000000000000025
     kworker/4:1-55      [004] ....   502.893385: rtcpu_vinotify_event: tstamp:18987173831 cch:0 vi:1 tag:FS channel:0x00 frame:0 vi_tstamp:607589538272 data:0x0000000000000015
     kworker/4:1-55      [004] ....   502.893387: rtcpu_vinotify_error: tstamp:18987211808 cch:0 vi:1 tag:CHANSEL_NOMATCH channel:0x20 frame:0 vi_tstamp:607590753088 data:0x0000000000000249
     kworker/4:1-55      [004] ....   502.893387: rtcpu_vinotify_event: tstamp:18987490106 cch:0 vi:1 tag:CHANSEL_NOMATCH channel:0x20 frame:0 vi_tstamp:607590753088 data:0x0000000000000249
     kworker/4:1-55      [004] ....   502.893388: rtcpu_nvcsi_intr: tstamp:18987776550 class:GLOBAL type:PHY_INTR0 phy:3 cil:0 st:0 vc:0 status:0x0e000000
     kworker/4:1-55      [004] ....   502.893389: rtcpu_nvcsi_intr: tstamp:18987776550 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x06000000
     kworker/4:1-55      [004] ....   502.893389: rtcpu_vinotify_error: tstamp:18987818306 cch:-1 vi:1 tag:CHANSEL_NOMATCH channel:0x60 frame:0 vi_tstamp:607610160992 data:0x0000000000000249
     kworker/4:1-55      [004] ....   502.893390: rtcpu_vinotify_event: tstamp:18987828114 cch:-1 vi:1 tag:FE channel:0x01 frame:0 vi_tstamp:607608846688 data:0x0000000000000025
     kworker/4:1-55      [004] ....   502.893390: rtcpu_vinotify_event: tstamp:18987828263 cch:-1 vi:1 tag:FS channel:0x01 frame:0 vi_tstamp:607608943200 data:0x0000000000000015
     kworker/4:1-55      [004] ....   502.893391: rtcpu_vinotify_event: tstamp:18987828424 cch:-1 vi:1 tag:CHANSEL_NOMATCH channel:0x60 frame:0 vi_tstamp:607610160992 data:0x0000000000000249
     kworker/4:1-55      [004] ....   502.893392: rtcpu_nvcsi_intr: tstamp:18988211728 class:GLOBAL type:PHY_INTR0 phy:3 cil:0 st:0 vc:0 status:0x0e000000
     kworker/4:1-55      [004] ....   502.893392: rtcpu_nvcsi_intr: tstamp:18988211728 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x06000000
     kworker/4:1-55      [004] ....   502.893393: rtcpu_vinotify_error: tstamp:18988253440 cch:0 vi:1 tag:CHANSEL_NOMATCH channel:0x20 frame:0 vi_tstamp:607624085312 data:0x0000000000000249
     kworker/4:1-55      [004] ....   502.893394: rtcpu_vinotify_event: tstamp:18988504163 cch:0 vi:1 tag:FE channel:0x00 frame:0 vi_tstamp:607622772320 data:0x0000000000000025
     kworker/4:1-55      [004] ....   502.893394: rtcpu_vinotify_event: tstamp:18988504295 cch:0 vi:1 tag:FS channel:0x00 frame:0 vi_tstamp:607622870464 data:0x0000000000000015
     kworker/4:1-55      [004] ....   502.893395: rtcpu_vinotify_event: tstamp:18988504447 cch:0 vi:1 tag:CHANSEL_NOMATCH channel:0x20 frame:0 vi_tstamp:607624085312 data:0x0000000000000249
     kworker/4:1-55      [004] ....   502.893396: rtcpu_nvcsi_intr: tstamp:18988818192 class:GLOBAL type:PHY_INTR0 phy:3 cil:0 st:0 vc:0 status:0x0e000000
     kworker/4:1-55      [004] ....   502.893396: rtcpu_nvcsi_intr: tstamp:18988818192 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x06000000
     kworker/4:1-55      [004] ....   502.893397: rtcpu_vinotify_event: tstamp:18988842288 cch:-1 vi:1 tag:FE channel:0x01 frame:0 vi_tstamp:607642179232 data:0x0000000000000025
     kworker/4:1-55      [004] ....   502.893398: rtcpu_vinotify_event: tstamp:18988842437 cch:-1 vi:1 tag:FS channel:0x01 frame:0 vi_tstamp:607642275744 data:0x0000000000000015
     kworker/4:1-55      [004] ....   502.893398: rtcpu_vinotify_error: tstamp:18988859937 cch:-1 vi:1 tag:CHANSEL_NOMATCH channel:0x60 frame:0 vi_tstamp:607643493216 data:0x0000000000000249
     kworker/4:1-55      [004] ....   502.949265: rtcpu_vinotify_error: tstamp:18989003086 cch:-1 vi:1 tag:CSIMUX_STREAM channel:0x00 frame:0 vi_tstamp:607648075872 data:0x0000000000100000
     kworker/4:1-55      [004] ....   502.949270: rtcpu_vinotify_event: tstamp:18989180199 cch:-1 vi:1 tag:CHANSEL_NOMATCH channel:0x60 frame:0 vi_tstamp:607643493216 data:0x0000000000000249
     kworker/4:1-55      [004] ....   502.949271: rtcpu_vinotify_event: tstamp:18989180348 cch:-1 vi:1 tag:FE channel:0x00 frame:0 vi_tstamp:607648074752 data:0x0000000000000025
     kworker/4:1-55      [004] ....   502.949271: rtcpu_vinotify_event: tstamp:18989180479 cch:-1 vi:1 tag:CSIMUX_STREAM channel:0x00 frame:0 vi_tstamp:607648075872 data:0x0000000000100000

DTSI

mode0 {
	mclk_khz = "37125";
	num_lanes = "4";
	tegra_sinterface = "serial_g";
	vc_id = "0";
	
	discontinuous_clk = "no";
	dpcm_enable = "false";
	cil_settletime = "0";
	
	csi_pixel_bit_depth = "16";
	mode_type = "yuv";
	pixel_phase = "uyvy";

	active_w = "3840";
	active_h = "2160";
	readout_orientation = "0";
	line_length = "4400";
	inherent_gain = "1";
	
	pix_clk_hz = "74250000";
	serdes_pix_clk_hz = "375000000";

	gain_factor = "10";
	min_gain_val = "0"; /* 0dB */
	max_gain_val = "480"; /* 48dB */
	step_gain_val = "3"; /* 0.3 */
	default_gain = "0";

	min_hdr_ratio = "1";
	max_hdr_ratio = "1";

	framerate_factor = "1000000";
	min_framerate = "30000000"; /* 1.5 */
	max_framerate = "30000000"; /* 30 */
	step_framerate = "1";
	default_framerate= "30000000";

	exposure_factor = "1000000";
	min_exp_time = "0"; /* us */
	max_exp_time = "660000"; /* us */
	step_exp_time = "1";
	default_exp_time = "33334";/* us */

	embedded_metadata_height = "1";
};

kernel/nvidia/drivers/video/tegra/camera/tegra_camera_platform.c
diff --git a/l4t-r35.1.0-jp5.0ga/kernel/nvidia/drivers/video/tegra/camera/tegra_camera_platform.c b/l4t-r35.1.0-jp5.0ga/kernel/nvidia/drivers/video/tegra/camera/tegra_camera_platform.c
index a322b1c19..82d65a18f 100644
--- a/l4t-r35.1.0-jp5.0ga/kernel/nvidia/drivers/video/tegra/camera/tegra_camera_platform.c
+++ b/l4t-r35.1.0-jp5.0ga/kernel/nvidia/drivers/video/tegra/camera/tegra_camera_platform.c
@@ -1091,15 +1091,18 @@ static int calculate_and_set_device_clock(struct tegra_camera_info *info,
                dr = bus_width * 100;
                if (dr == 0)
                        return -EINVAL;
+               clk_rate = 225000000;
                break;
        case HWTYPE_VI:
                nr = final_pr * overhead;
                dr = 100 * (ppc / ppc_divider);
+               clk_rate = 1036880080;
                break;
        case HWTYPE_ISPA:
        case HWTYPE_ISPB:
                nr = final_pr * overhead;
                dr = 100 * ppc;
+               clk_rate = (nr + dr) /dr;
                break;
        case HWTYPE_SLVSEC:
                if (info->sensor_type != SENSORTYPE_SLVSEC)
@@ -1108,13 +1111,14 @@ static int calculate_and_set_device_clock(struct tegra_camera_info *info,
                dr = bus_width * 100;
                if (dr == 0)
                        return -EINVAL;
+               clk_rate = (nr + dr) /dr;
                break;
        default:
                return -EINVAL;
        }
 
        /* avoid rounding errors by adding dr to nr */
-       clk_rate = (nr + dr) / dr;
+       //clk_rate = (nr + dr) / dr;

[JerryChang]

hello Luna2020,

it looks you’ve enable virtual channel supports. did you assign VC-ID separately for these two streams?
please see-also reference driver for running two VCs on the same CSI port,
for instance, $public_sources/kernel_src/hardware/nvidia/platform/t23x/common/kernel-dts/t234-common-modules/tegra234-camera-imx390-a00.dtsi

besides, may I know which Jetpack release you’re using,
is it possible for moving to the latest release, i.e. Jetpack-5.1.2/l4t-r35.4.1 for confirmation.

[Luna2020]

Hi JerryChang,

SW: Jetpack-5.1.2/l4t-r35.4.1

MAX96712 have four VC-ID, and we separate four vc-id from 0 to 3.

[Luna2020]

@Luna2020

kernel/nvidia/drivers/video/tegra/camera/tegra_camera_platform.c

I have a question about clock rate in tegra_camera_platform.c :
What is max clock rate about csi and vi ? can it be set larger value ?

clk_rate = 225000000;

clk_rate = 1036880080;

[JerryChang]

it’s depends-on your sensor pixel clock, it’s SerDes Pixel Clock since you’re working with virtual channel.

[Luna2020]

Hi Jerry,

The same cvb with AGX Xavier SOM 2x8M works fine, but with AGX Orin SOM 2x8M can’ t open camera.

1. Is AGX Xavier VI/CSI different with AGX Orin SOM?
2. AGX Xavier vi max rate is larger than AGX Orin, but nvcsi max rate is lower than AGX Orin

#AGX Xavier CLK Rate
root@nvidia-desktop:/home/nvidia# cat /sys/kernel/debug/bpmp/debug/clk/vi/max_rate |tee /sys/kernel/debug/bpmp/debug/clk/vi/rate
998400000
root@nvidia-desktop:/home/nvidia# cat /sys/kernel/debug/bpmp/debug/clk/isp/max_rate | tee  /sys/kernel/debug/bpmp/debug/clk/isp/rate
1190400000
root@nvidia-desktop:/home/nvidia# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/nvcsi/rate
400000000
root@nvidia-desktop:/home/nvidia# cat /sys/kernel/debug/bpmp/debug/clk/emc/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/emc/rate
2133000000

#AGX Orin CLK Rate
root@nvidia-desktop:/home/nvidia# cat /sys/kernel/debug/bpmp/debug/clk/vi/max_rate |tee /sys/kernel/debug/bpmp/debug/clk/vi/rate
832000000
root@nvidia-desktop:/home/nvidia# cat /sys/kernel/debug/bpmp/debug/clk/isp/max_rate | tee  /sys/kernel/debug/bpmp/debug/clk/isp/rate
1011200000
root@nvidia-desktop:/home/nvidia# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/nvcsi/rate
642900000
root@nvidia-desktop:/home/nvidia# cat /sys/kernel/debug/bpmp/debug/clk/emc/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/emc/rate
3199000000

[Luna2020]

Hi Jerry,

We tried several methods to set csi or vi clk, still can’t open 2x8M camera on agx orin, and 1x8M camera works fine.
Deserializer MAX96712 (0x0418=0x38 /2.4Gbps)

Please help to check about the csi and other configuration, thanks.

commmand:

v4l2-ctl --set-fmt-video=width=3840,height=2160 --stream-mmap --stream-count=1000 -d /dev/video0
or 
gst-launch-1.0 v4l2src device=/dev/video0 ! 'video/x-raw,format=UYVY,width=3840,height=2160' ! videoconvert ! fpsdisplaysink video-sink=xvimagesink sync=false

...
[   50.686809] p3737-vdd-3v3-en: disabling
[   75.724757] calculate_and_set_device_clock: cdev->hw_type:3[cdev->clk_rate=1036880080], 1
[   75.725333] calculate_and_set_device_clock: cdev->hw_type:3[cdev->clk_rate=1036880080], 1
[   75.725670] calculate_and_set_device_clock: cdev->hw_type:4[cdev->clk_rate=180000001], 1
[   75.726611] calculate_and_set_device_clock: cdev->hw_type:1[cdev->clk_rate=225000000], 1
[   75.727754] bwmgr API not supported
[   75.788675] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 4194405
[   75.821864] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 4194405
[   75.855199] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 4194405
[   75.888633] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 4194405
[   79.931695] calculate_and_set_device_clock: cdev->hw_type:3[cdev->clk_rate=0], 1
[   79.932048] calculate_and_set_device_clock: cdev->hw_type:3[cdev->clk_rate=0], 1
[   79.932491] calculate_and_set_device_clock: cdev->hw_type:4[cdev->clk_rate=0], 1
[   79.934185] calculate_and_set_device_clock: cdev->hw_type:1[cdev->clk_rate=0], 1

#CSI Log CHANSEL_NOMATCH =0x249/3C9 （Camera has embedded data)

     kworker/1:2-113     [001] ....    76.074562: rtcpu_vinotify_event: tstamp:5625196405 cch:-1 vi:1 tag:FS channel:0x01 frame:0 vi_tstamp:179997445024 data:0x0000000000000015
     kworker/1:2-113     [001] ....    76.074563: rtcpu_vinotify_event: tstamp:5625196556 cch:-1 vi:1 tag:CHANSEL_NOMATCH channel:0x60 frame:0 vi_tstamp:179998664800 data:0x0000000000000249
     kworker/1:2-113     [001] ....    76.074563: rtcpu_nvcsi_intr: tstamp:5625223706 class:GLOBAL type:PHY_INTR0 phy:3 cil:0 st:0 vc:0 status:0x0e000000
     kworker/1:2-113     [001] ....    76.074564: rtcpu_nvcsi_intr: tstamp:5625223706 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x06000000
     kworker/1:2-113     [001] ....    76.074564: rtcpu_vinotify_error: tstamp:5625224781 cch:0 vi:1 tag:CSIMUX_FRAME channel:0x00 frame:0 vi_tstamp:180007155712 data:0x0000000000400065
     kworker/1:2-113     [001] ....    76.074564: rtcpu_vinotify_error: tstamp:5625265441 cch:0 vi:1 tag:CHANSEL_NOMATCH channel:0x20 frame:0 vi_tstamp:180008470752 data:0x0000000000000249
     kworker/1:2-113     [001] ....    76.074565: rtcpu_vinotify_event: tstamp:5625265878 cch:0 vi:1 tag:CSIMUX_FRAME channel:0x00 frame:0 vi_tstamp:180007155712 data:0x0000000000400065
     kworker/1:2-113     [001] ....    76.074565: rtcpu_vinotify_event: tstamp:5625266026 cch:0 vi:1 tag:FS channel:0x00 frame:0 vi_tstamp:180007247456 data:0x0000000000000015
     kworker/1:2-113     [001] ....    76.074566: rtcpu_vinotify_event: tstamp:5625266154 cch:0 vi:1 tag:CHANSEL_NOMATCH channel:0x20 frame:0 vi_tstamp:180008470752 data:0x0000000000000249
     kworker/1:2-113     [001] ....    76.130250: rtcpu_nvcsi_intr: tstamp:5625958872 class:GLOBAL type:PHY_INTR0 phy:3 cil:0 st:0 vc:0 status:0x0e000000
     kworker/1:2-113     [001] ....    76.130251: rtcpu_nvcsi_intr: tstamp:5625958872 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x06000000
     kworker/1:2-113     [001] ....    76.130251: rtcpu_vinotify_error: tstamp:5625959968 cch:-1 vi:1 tag:CSIMUX_FRAME channel:0x01 frame:0 vi_tstamp:180030681024 data:0x0000000002400065
     kworker/1:2-113     [001] ....    76.130252: rtcpu_vinotify_event: tstamp:5625973841 cch:-1 vi:1 tag:CSIMUX_FRAME channel:0x01 frame:0 vi_tstamp:180030681024 

csi.trace.log (443.4 KB)

twsensor_1a@1a {
	compatible = "nvidia,twsensor";

	reg = <0x1a>;
	
	/* V4L2 device node location */
	devnode = "video2";
	/* Physical dimensions of sensor */
	physical_w = "15.0";
	physical_h = "12.5";

	sensor_model ="twsensor";

	/* Defines number of frames to be dropped by driver internally after applying */
	/* sensor crop settings. Some sensors send corrupt frames after applying */
	/* crop co-ordinates */
	/*post_crop_frame_drop = "0";*/

	/* Convert Gain to unit of dB (decibel) befor passing to kernel driver */
	use_decibel_gain = "true";

	/* enable CID_SENSOR_MODE_ID for sensor modes selection */
	use_sensor_mode_id = "false";


	mode0 {
		mclk_khz = "24000";
		num_lanes = "4";
		tegra_sinterface = "serial_e";
		vc_id = "0";
		
		discontinuous_clk = "yes";
		dpcm_enable = "false";
		cil_settletime = "0";
		
		csi_pixel_bit_depth = "16";
		mode_type = "yuv";
		pixel_phase = "uyvy";

		active_w = "3840";
		active_h = "2160";
		readout_orientation = "0";
		line_length = "3840";
		inherent_gain = "1";
		
		pix_clk_hz = "74250000";
		serdes_pix_clk_hz = "300000000";

		gain_factor = "10";
		min_gain_val = "0"; /* 0dB */
		max_gain_val = "480"; /* 48dB */
		step_gain_val = "3"; /* 0.3 */
		default_gain = "0";

		min_hdr_ratio = "1";
		max_hdr_ratio = "1";

		framerate_factor = "1000000";
		min_framerate = "30000000"; /* 1.5 */
		max_framerate = "30000000"; /* 30 */
		step_framerate = "1";
		default_framerate= "30000000";

		exposure_factor = "1000000";
		min_exp_time = "0"; /* us */
		max_exp_time = "660000"; /* us */
		step_exp_time = "1";
		default_exp_time = "33334";/* us */

		embedded_metadata_height = "1";
	};

	ports {
		#address-cells = <1>;
		#size-cells = <0>;
		port@0 {
			reg = <0>;
			twsensor_twsensor_out2: endpoint {
				vc-id = <0>;
				port-index = <4>;
				bus-width = <4>;
				remote-endpoint = <&twsensor_csi_in2>;
				};
			};
		};
};

[Luna2020]

Hardware connection:
MAX9295(8M Camear)x2 → MAX96712 → AGX Orin CSI 6/7 (4Lanes CSI)

[JerryChang]

hello Luna2020,

it’s correct that Xavier and Orin clock rate were different.
there’re errors reported by PHY interrupts.

rtcpu_nvcsi_intr: tstamp:5625958872 class:GLOBAL type:PHY_INTR0 phy:3 cil:0 st:0 vc:0 status:0x0e000000
rtcpu_nvcsi_intr: tstamp:5625958872 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x06000000

these were related to DPHY deskew calibration not complete, is may caused by calibration sequence length is not long enough.

@Luna2020

Deserializer MAX96712 (0x0418=0x38 /2.4Gbps)

BTW, is it possible to reduce the data-rate to prove that’s deskew related issue?

[Luna2020]

Hi Jerry,

these were related to DPHY deskew calibration not complete, is may caused by calibration sequence length is not long enough.

Can we adjust the calibration sequence length ?

@Luna2020

Deserializer MAX96712 (0x0418=0x38 /2.4Gbps)

If we reduce the data-rate to 0x30~0x35/36/37 still can’t preview cameras and csi trace log:

tstamp:25563974960 class:GLOBAL type:STREAM_VC phy:0 cil:0 st:5 vc:1 status:0x00000006
tstamp:25563974960 class:CORRECTABLE_ERR type:STREAM_VC phy:0 cil:0 st:5 vc:0 status:0x00000004
tstamp:25563974960 class:CORRECTABLE_ERR type:STREAM_VC phy:0 cil:0 st:5 vc:1 status:0x00000006
tstamp:25563975813 class:GLOBAL type:STREAM_VC phy:0 cil:0 st:5 vc:1 status:0x00000006
tstamp:25563977704 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x00000004
tstamp:25563999798 cch:0 vi:1 tag:CHANSEL_NOMATCH channel:0x20 frame:0 vi_tstamp:818043424416 data:0x00000000000003c9
tstamp:25564097847 cch:0 vi:1 tag:CSIMUX_FRAME channel:0x00 frame:0 vi_tstamp:818042068384 data:0x0000000002600065
tstamp:25563978107 class:GLOBAL type:STREAM_VC phy:0 cil:0 st:5 vc:0 status:0x00000004
tstamp:25563978107 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x00000004
tstamp:25563978107 class:CORRECTABLE_ERR type:STREAM_VC phy:0 cil:0 st:5 vc:0 status:0x00000004
tstamp:25563978775 class:GLOBAL type:STREAM_VC phy:0 cil:0 st:5 vc:0 status:0x00000004
tstamp:25563978775 class:GLOBAL type:STREAM_VC phy:0 cil:0 st:5 vc:1 status:0x00000006
tstamp:25563978775 class:GLOBAL type:PHY_INTR0 phy:3 cil:1 st:0 vc:0 status:0x00000004
tstamp:25563978775 class:CORRECTABLE_ERR type:STREAM_VC phy:0 cil:0 st:5 vc:1 status:0x00000006

[JerryChang]

hello Luna2020,

you may adjust the calibration sequence length, please refer to TRM,
there’s DESKEW_CONTROL register, it’s DESKEW_SETTLE to adjust the duration of deskew calibration.

BTW,
at least I saw the different error reported when you reducing the data-rate.
0x6 and 0x4 means there’re more than one bit error detected on the data-lane sync word.
it’s usually the failure on the TX side, you may examine the sensor configurations.
you may see-also similar threads, such as… Topic 258113, or Topic 255610 for reference,

[Luna2020]

Hi Jerry,

Thanks for your information.

We get some more tests here.

1. AGX Xavier (JetPack 5.1.2) works fine with 2x8M sensors simultaneously, the sensor configuration is same as AGX Orin (JetPack 5.1.2)

2. We take six AGX Orin, there’s one AGX Orin SOM work fine with 2x8M sensors, the other five SOMs can’t work with 2x8M sensors, the system image and kernel image, dtb all cloned from one SOM.

We don’t know why AGX Orin SOMs is different with the same CVB and same sensors.

[JerryChang]

@Luna2020

there’s one AGX Orin SOM work fine with 2x8M sensors,

is it different SKUs? could you please share the part# for comparison?

[Luna2020]

Hi Jerry,

2x8M sensors works SOM serial number is
1.1422822059913

2x8M sensors can’t work SOM serial numbers are

1. 1422822051867
2. 1422822050177

[Luna2020]

Hi Jerry,

We have two questions about clock and deskew on agx orin:

1. How to confirm the AGX Orin have enabled clock deskew ?
2. What is CSI/VI/ISP clock max rate and how to fixed these clock rate (don’t through boost clock method)

Thanks.

[JerryChang]

hello Luna2020,

skew calibration is required if sensor or deserializer is using DPHY, and the output data rate is > 1.5Gbps.
so… deskew it’s mandatory when the data-rate is above this value.

>>Q1
this quickest way is to apply the camera firmware with debug flag enabled.
there’re debug messages to log the deskew status bits.
for example,

[   49.896258] [RCE] deskew: clk status_bits:0xfffc0000000007ff
[   49.896259] [RCE] deskew: pf:11
[   49.896261] [RCE] deskew: data status_bits:0x7ffffff
[   49.896262] [RCE] deskew: pf:27
[   49.896263] [RCE] deskew: clk status_bits:0xfff80000000007ff

note, we’ve also check the SOM difference since you’ve one of SKU that’s working with 2x8M sensors,

>>Q2
actually, running through boost clock method is the approach to configure max clock rate.
otherwise, system looking for clock configuration, i.e. serdes_pix_clk_hz to apply the settings.

[Luna2020]

Hi Jerry,

Q1.
camera firmware with debug flag enabled.
Do you mean this version firmware file ?

Request debug RTCPU image for JP5.1.1

hello xumm_td, here’s JP-5.1.1 debug version camera firmware, Topic260583_Jul21_debug.7z (201.0 KB) please also refer to Topic 226574 for sample commands to apply debug firmware with flash script. however, since it’s Orin NX, it cannot use flash script to perform image flashing. here’re steps to replace the camera debug firmware. please check you’ve ran a full flash to create system image before. it shall looks like below… $ sudo ./tools/kernel_flash/l4t_initrd_flash.sh --external-devi…

Q2.
boost clock method is the approach to configure max clock rate.

After we boost clocks, we get the clock value is still lower

kernel\nvidia\drivers\video\tegra\camera\tegra_camera_platform.c  [LINE-1149 ]
printk("%s: cdev->hw_type:%d[cdev->clk_rate=%llu], %d\n", __func__, cdev->hw_type, cdev->clk_rate, set_clk);


#dmesg log
[  299.741114] calculate_and_set_device_clock: cdev->hw_type:3[cdev->clk_rate=90000001], 1
[  299.745878] calculate_and_set_device_clock: cdev->hw_type:3[cdev->clk_rate=90000001], 1
[  299.746195] calculate_and_set_device_clock: cdev->hw_type:4[cdev->clk_rate=360000001], 1
[  299.747422] calculate_and_set_device_clock: cdev->hw_type:1[cdev->clk_rate=150000001], 1

We modify the tegra_camera_platform.c in kernel driver to hard code to Max clocks, and it seems larger than just set clocks in dtsi.

R35.3.1 AGX orin GMSL2 bring up yuv sensor 8M,and open no display

Try this. diff --git a/drivers/video/tegra/camera/tegra_camera_platform.c b/drivers/video/tegra/camera/tegra_camera_platform.c index c63d9d299..9257edac7 100644 --- a/drivers/video/tegra/camera/tegra_camera_platform.c +++ b/drivers/video/tegra/camera/tegra_camera_platform.c @@ -908,15 +908,18 @@ static int calculate_and_set_device_clock(struct tegra_camera_info *info, dr = bus_width * 100; if (dr == 0) return -EINVAL; + clk_rate = 225000000; break; case HWTYPE_VI: nr = final_…

#dmesg log
[   75.724757] calculate_and_set_device_clock: cdev->hw_type:3[cdev->clk_rate=1036880080], 1
[   75.725333] calculate_and_set_device_clock: cdev->hw_type:3[cdev->clk_rate=1036880080], 1
[   75.725670] calculate_and_set_device_clock: cdev->hw_type:4[cdev->clk_rate=180000001], 1
[   75.726611] calculate_and_set_device_clock: cdev->hw_type:1[cdev->clk_rate=225000000], 1

[Luna2020]

Hi Jerry,

DTSI configuration

twgmsl_1a@1a {
	compatible = "nvidia,twgmsl";

	reg = <0x1a>;
	
	/* V4L2 device node location */
	devnode = "video0";
	
	/* Physical dimensions of sensor */
	physical_w = "15.0";
	physical_h = "12.5";

	sensor_model ="twgmsl";

	/* Defines number of frames to be dropped by driver internally after applying */
	/* sensor crop settings. Some sensors send corrupt frames after applying */
	/* crop co-ordinates */
	post_crop_frame_drop = "0";

	/* Convert Gain to unit of dB (decibel) befor passing to kernel driver */
	use_decibel_gain = "true";

	/* enable CID_SENSOR_MODE_ID for sensor modes selection */
	use_sensor_mode_id = "false";

	mode0 {
		mclk_khz = "24000";
		num_lanes = "4";
		tegra_sinterface = "serial_g";
		vc_id = "0";
		
		discontinuous_clk = "no";
		dpcm_enable = "false";
		cil_settletime = "0";
		
		csi_pixel_bit_depth = "16";
		mode_type = "yuv";
		pixel_phase = "uyvy";

		active_w = "3840";
		active_h = "2160";
		readout_orientation = "0";
		line_length = "3840";
		inherent_gain = "1";
		
		pix_clk_hz = "248832000";
		serdes_pix_clk_hz = "600000000";

		gain_factor = "10";
		min_gain_val = "0"; /* 0dB */
		max_gain_val = "480"; /* 48dB */
		step_gain_val = "3"; /* 0.3 */
		default_gain = "0";

		min_hdr_ratio = "1";
		max_hdr_ratio = "1";

		framerate_factor = "1000000";
		min_framerate = "30000000"; /* 1.5 */
		max_framerate = "30000000"; /* 30 */
		step_framerate = "1";
		default_framerate= "30000000";

		exposure_factor = "1000000";
		min_exp_time = "0"; /* us */
		max_exp_time = "660000"; /* us */
		step_exp_time = "1";
		default_exp_time = "33334";/* us */

		embedded_metadata_height = "0";
	};

	ports {
		#address-cells = <1>;
		#size-cells = <0>;
		port@0 {
			reg = <0>;
			twgmsl_twgmsl_out0: endpoint {
				vc-id = <0>;
				port-index = <5>;
				bus-width = <4>;
				remote-endpoint = <&twgmsl_csi_in0>;
				};
			};
		};
};

We flashed with camera-rtcpu-t234-rce.img, but no deskew message （download from last download link,
https://forums.developer.nvidia.com/uploads/short-url/oC7oruPMqwP1cE6N9qGIG7bUXug.7z)

dmesg log with no deskew message with [RCE]

[  128.298435] [RCE] tegra_nvcsi_stream_set_config(vm0, stream=5, csi=6)
[  128.302046] [RCE] MIPI clock = 600000 kHz, tHS-SETTLE = 0, tCLK-SETTLE = 0
[  128.302049] [RCE] ===== NVCSI Stream Configuration =====
[  128.302051] [RCE] stream_id: PP 5, csi_port: PORT G
[  128.302054] [RCE] Brick: PHY 3, Mode: D-PHY
[  128.302056] [RCE] Partition: CIL A, LP bypass: Enabled, Lanes: 4
[  128.302058] [RCE] Clock information:
[  128.302061] [RCE] MIPI clock rate: 600.00 MHz
[  128.302063] [RCE] T_HS settle: 0, T_CLK settle: 0
[  128.302067] [RCE] ======================================
[  128.302069] [RCE] tegra_nvcsi_stream_open(vm0, stream=5, csi=6)
[  128.302072] [RCE] nvcsi_calc_ths_settle ths_settle 55
[  128.302074] [RCE] nvcsi_calc_ths_settle ths_settle 55
[  128.302077] [RCE] nvcsi_calc_ths_settle ths_settle 55
[  128.302079] [RCE] nvcsi_calc_tclk_settle tclk_settle 75
[  128.302084] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.302088] [RCE] ISR PHY 3 CIL_B 0x6000000
[  128.302091] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.302094] [RCE] ISR PHY 3 CIL_B 0x6000000
[  128.302099] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.302102] [RCE] ISR PHY 3 CIL_B 0x6000000
[  128.304025] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 262144, vc: 0
[  128.337365] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 262144, vc: 0
[  128.354421] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.354425] [RCE] ISR PHY 3 CIL_B 0x6000000
[  128.354431] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.354433] [RCE] ISR PHY 3 CIL_B 0x6000000
[  128.354438] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.354440] [RCE] ISR PHY 3 CIL_B 0x6000000
[  128.370672] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 262144, vc: 0
[  128.404145] tegra-camrtc-capture-vi tegra-capture-vi: corr_err: discarding frame 0, flags: 0, err_data 262144, vc: 0
[  128.410417] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.414991] [RCE] ISR PHY 3 CIL_B 0x6000000
[  128.414996] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.414999] [RCE] ISR PHY 3 CIL_B 0x6000000
[  128.415006] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.415008] [RCE] ISR PHY 3 CIL_B 0x6000000
[  128.415011] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.415013] [RCE] ISR PHY 3 CIL_B 0x6000000
[  128.470420] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.470426] [RCE] ISR PHY 3 CIL_B 0x6000000
[  128.470432] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.470436] [RCE] ISR PHY 3 CIL_B 0x6000000
[  128.470441] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.470446] [RCE] ISR PHY 3 CIL_B 0x6000000
[  128.526592] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.526599] [RCE] ISR PHY 3 CIL_B 0x6000000
[  128.526609] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.526613] [RCE] ISR PHY 3 CIL_B 0x6000000
[  128.526619] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.526622] [RCE] ISR PHY 3 CIL_B 0x6000000
[  128.582422] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.582429] [RCE] ISR PHY 3 CIL_B 0x6000000
[  128.582438] [RCE] ISR PHY 3 CIL_A 0xe000000
[  128.582444] [RCE] ISR PHY 3 CIL_B 0x6000000

[JerryChang]

hello Luna2020,

FYI, we’ve recently have some bug fixes for deskew algorithm.
if that’s possible, please based-on r35.4.1 and updating the camera firmware with attachment, i.e. Bug4171641_Aug15.7z (201.9 KB)

this is camera firmware update with potential fix and also debug logs,
please perform a partition update, and sharing the logs for reference,
for instance, $ sudo ./flash.sh -r -k A_rce-fw jetson-agx-orin-devkit mmcblk0p1

[Luna2020]

Hi Jerry,

We flashed camera-rtcpu-t234-rce.img file, but no deskew log, please help to check the operation is okay or not ?

camera_rtcpu_rce.dmesg0818.log (143.7 KB)

camera_rtcpu_rce.csi.trace.0818.log (632.1 KB)

tw@tw:~/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra$ md5sum bootloader/camera-rtcpu-t234-rce.img

aa71e89f5510c319444afe8303b81404  bootloader/camera-rtcpu-t234-rce.img

tw@tw:~/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra$ sudo ./flash.sh -r -k A_rce-fw jetson-agx-orin-devkit mmcblk0p1
###############################################################################
# L4T BSP Information:
# R35 , REVISION: 4.1
# User release: 0.0
###############################################################################
# Target Board Information:
# Name: jetson-agx-orin-devkit, Board Family: t186ref, SoC: Tegra 234, 
# OpMode: production, Boot Authentication: NS, 
# Disk encryption: disabled ,
###############################################################################
copying emc_fuse_dev_params(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-br-bct-diag-boot.dts)... done.
copying device_config(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct-device-p3701-0000.dts)... done.
copying misc_config(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct-misc-p3701-0000.dts)... done.
./tegraflash.py --chip 0x23 --applet "/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/mb1_t234_prod.bin" --skipuid --cfg readinfo_t234_min_prod.xml --dev_params tegra234-br-bct-diag-boot.dts --device_config tegra234-mb1-bct-device-p3701-0000.dts --misc_config tegra234-mb1-bct-misc-p3701-0000.dts --bins "mb2_applet applet_t234.bin" --cmd "dump eeprom cvm cvm.bin; dump custinfo custinfo_out.bin; reboot recovery" 
Welcome to Tegra Flash
version 1.0.0
Type ? or help for help and q or quit to exit
Use ! to execute system commands
 
[   0.0313 ] tegrarcm_v2 --chip 0x23 0 --ismb2applet
[   0.0322 ] File rcm_state open failed
[   0.0325 ] ERROR: failed to read rcm_state
[   0.0326 ] 
[   0.0339 ] tegrasign_v3.py --key None --getmode mode.txt
[   0.0341 ] Assuming zero filled SBK key
[   0.0331 ] Pre-processing config: tegra234-mb1-bct-device-p3701-0000.dts
[   0.0764 ] Pre-processing config: tegra234-mb1-bct-misc-p3701-0000.dts
[   0.1072 ] Parsing partition layout
[   0.1152 ] tegraparser_v2 --pt readinfo_t234_min_prod.xml.tmp
[   0.1182 ] Kernel DTB used: None
[   0.1182 ] WARNING: dce base dtb is not provided

[   0.1182 ] Parsing partition layout
[   0.1191 ] tegraparser_v2 --pt readinfo_t234_min_prod.xml.tmp
[   0.1201 ] Creating list of images to be signed
[   0.1342 ] tegrahost_v2 --chip 0x23 0 --partitionlayout readinfo_t234_min_prod.xml.bin --list images_list.xml zerosbk
[   0.1355 ] MB1: Nvheader already present is mb1_t234_prod_aligned.bin
[   0.1469 ] Header already present for mb1_t234_prod_aligned_sigheader.bin
[   0.1476 ] MB1: Nvheader already present is mb1_t234_prod_aligned.bin
[   0.1570 ] Header already present for mb1_t234_prod_aligned_sigheader.bin
[   0.1579 ] MB1: Nvheader already present is psc_bl1_t234_prod_aligned.bin
[   0.1733 ] Header already present for psc_bl1_t234_prod_aligned_sigheader.bin
[   0.1736 ] adding BCH for mb2_t234_aligned.bin
[   0.1848 ] MB1: Nvheader already present is psc_bl1_t234_prod_aligned.bin
[   0.2033 ] Header already present for psc_bl1_t234_prod_aligned_sigheader.bin
[   0.2035 ] adding BCH for mb2_t234_aligned.bin
[   0.2181 ] Filling MB1 storage info
[   0.2181 ] Parsing dev params for multi chains
[   0.2231 ] Generating br-bct
[   0.2250 ] Updating dev and MSS params in BR BCT
[   0.2251 ] tegrabct_v2 --dev_param tegra234-br-bct-diag-boot_cpp.dtb --brbct br_bct.cfg --chip 0x23 0
[   0.2307 ] Updating bl info
[   0.2316 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updateblinfo readinfo_t234_min_prod.xml.bin
[   0.2324 ] WARNING: boot chain is not completed. set to 0
[   0.2331 ] Generating signatures
[   0.2344 ] tegrasign_v3.py --key None --list images_list.xml --pubkeyhash pub_key.key --sha sha512
[   0.2346 ] Assuming zero filled SBK key
[   0.3025 ] Warning: pub_key.key is not found
[   0.3016 ] Parsing dev params for multi chains
[   0.3016 ] Generating br-bct
[   0.3024 ] Updating dev and MSS params in BR BCT
[   0.3025 ] tegrabct_v2 --dev_param tegra234-br-bct-diag-boot_cpp.dtb --brbct br_bct.cfg --chip 0x23 0
[   0.3034 ] Updating bl info
[   0.3042 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updateblinfo readinfo_t234_min_prod.xml.bin --updatesig images_list_signed.xml
[   0.3049 ] WARNING: boot chain is not completed. set to 0
[   0.3061 ] Get Signed section of bct
[   0.3069 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --listbct bct_list.xml
[   0.3078 ] Signing BCT
[   0.3091 ] tegrasign_v3.py --key None --list bct_list.xml --pubkeyhash pub_key.key --sha sha512
[   0.3093 ] Assuming zero filled SBK key
[   0.3123 ] Sha saved in br_bct_BR.sha
[   0.3126 ] Warning: pub_key.key is not found
[   0.3114 ] Updating BCT with signature
[   0.3121 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updatesig bct_list_signed.xml
[   0.3128 ] Offset :4608 Len :3584
[   0.3133 ] Generating SHA2 Hash
[   0.3146 ] tegrasign_v3.py --key None --list bct_list.xml --sha sha512
[   0.3148 ] Assuming zero filled SBK key
[   0.3148 ] Assuming zero filled SBK key
[   0.3174 ] Sha saved in br_bct_BR.sha
[   0.3166 ] Updating BCT with SHA2 Hash
[   0.3174 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updatesha bct_list_signed.xml
[   0.3183 ] Offset :4608 Len :3584
[   0.3186 ] Offset :68 Len :8124
[   0.3186 ] 
[   0.3187 ] Generating coldboot mb1-bct
[   0.3195 ] tegrabct_v2 --chip 0x23 0 --mb1bct mb1_cold_boot_bct.cfg --misc tegra234-mb1-bct-misc-p3701-0000_cpp.dtb --device tegra234-mb1-bct-device-p3701-0000_cpp.dtb
[   0.3204 ] MB1-BCT version: 0.10
[   0.3205 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED1/ is not supported
[   0.3209 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED1/ is not supported
[   0.3212 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED1/ is not supported
[   0.3216 ] ERROR: /misc/tsc_controls/tsc_locking_config is not supported
[   0.3218 ] ERROR: /misc/tsc_controls/tsc_locking_diff_configuration is not supported
[   0.3220 ] ERROR: /misc/tsc_controls/tsc_locking_ref_frequency_configuration is not supported
[   0.3220 ] ERROR: /misc/tsc_controls/tsc_locking_control is not supported
[   0.3220 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_configuration is not supported
[   0.3220 ] ERROR: /misc/tsc_controls/tsc_locking_fast_adjust_configuration is not supported
[   0.3220 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_delta_control is not supported
[   0.3220 ] ERROR: /misc/tsc_controls/tsc_capture_control_ptx is not supported
[   0.3220 ] ERROR: /misc/tsc_controls/tsc_capture_config_ptx is not supported
[   0.3220 ] ERROR: /misc/tsc_controls/tsc_stscrsr is not supported
[   0.3220 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_num_control is not supported
[   0.3220 ] 
[   0.3220 ] Parsing config file :tegra234-mb1-bct-device-p3701-0000_cpp.dtb 
[   0.3220 ] Added Platform Config 9 data with size :- 100
[   0.3220 ] 
[   0.3221 ] Updating mb1-bct with firmware information
[   0.3229 ] tegrabct_v2 --chip 0x23 0 --mb1bct mb1_cold_boot_bct_MB1.bct --updatefwinfo readinfo_t234_min_prod.xml.bin
[   0.3250 ] tegrahost_v2 --chip 0x23 0 --align mb1_cold_boot_bct_MB1_aligned.bct
[   0.3267 ] tegrahost_v2 --chip 0x23 0 --magicid MBCT --appendsigheader mb1_cold_boot_bct_MB1_aligned.bct zerosbk
[   0.3274 ] adding BCH for mb1_cold_boot_bct_MB1_aligned.bct
[   0.3294 ] tegrasign_v3.py --key None --list mb1_cold_boot_bct_MB1_aligned_sigheader.bct_list.xml --pubkeyhash pub_key.key --sha sha512
[   0.3296 ] Assuming zero filled SBK key
[   0.3310 ] Warning: pub_key.key is not found
[   0.3306 ] tegrahost_v2 --chip 0x23 0 --updatesigheader mb1_cold_boot_bct_MB1_aligned_sigheader.bct.encrypt mb1_cold_boot_bct_MB1_aligned_sigheader.bct.hash zerosbk
[   0.3317 ] Generating recovery mb1-bct
[   0.3325 ] tegrabct_v2 --chip 0x23 0 --mb1bct mb1_bct.cfg --misc tegra234-mb1-bct-misc-p3701-0000_cpp.dtb --device tegra234-mb1-bct-device-p3701-0000_cpp.dtb
[   0.3331 ] MB1-BCT version: 0.10
[   0.3333 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED1/ is not supported
[   0.3337 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED1/ is not supported
[   0.3340 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED1/ is not supported
[   0.3343 ] ERROR: /misc/tsc_controls/tsc_locking_config is not supported
[   0.3345 ] ERROR: /misc/tsc_controls/tsc_locking_diff_configuration is not supported
[   0.3348 ] ERROR: /misc/tsc_controls/tsc_locking_ref_frequency_configuration is not supported
[   0.3349 ] ERROR: /misc/tsc_controls/tsc_locking_control is not supported
[   0.3349 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_configuration is not supported
[   0.3349 ] ERROR: /misc/tsc_controls/tsc_locking_fast_adjust_configuration is not supported
[   0.3349 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_delta_control is not supported
[   0.3349 ] ERROR: /misc/tsc_controls/tsc_capture_control_ptx is not supported
[   0.3349 ] ERROR: /misc/tsc_controls/tsc_capture_config_ptx is not supported
[   0.3349 ] ERROR: /misc/tsc_controls/tsc_stscrsr is not supported
[   0.3349 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_num_control is not supported
[   0.3349 ] 
[   0.3349 ] Parsing config file :tegra234-mb1-bct-device-p3701-0000_cpp.dtb 
[   0.3349 ] Added Platform Config 9 data with size :- 100
[   0.3349 ] 
[   0.3349 ] Updating mb1-bct with firmware information
[   0.3357 ] tegrabct_v2 --chip 0x23 0 --mb1bct mb1_bct_MB1.bct --recov --updatefwinfo readinfo_t234_min_prod.xml.bin
[   0.3377 ] tegrahost_v2 --chip 0x23 0 --align mb1_bct_MB1_aligned.bct
[   0.3393 ] tegrahost_v2 --chip 0x23 0 --magicid MBCT --appendsigheader mb1_bct_MB1_aligned.bct zerosbk
[   0.3400 ] adding BCH for mb1_bct_MB1_aligned.bct
[   0.3422 ] tegrasign_v3.py --key None --list mb1_bct_MB1_aligned_sigheader.bct_list.xml --pubkeyhash pub_key.key --sha sha512
[   0.3424 ] Assuming zero filled SBK key
[   0.3439 ] Warning: pub_key.key is not found
[   0.3436 ] tegrahost_v2 --chip 0x23 0 --updatesigheader mb1_bct_MB1_aligned_sigheader.bct.encrypt mb1_bct_MB1_aligned_sigheader.bct.hash zerosbk
[   0.3449 ] Error: Skip generating mem_bct because sdram_config is not defined
[   0.3449 ] Error: Skip generating mem_bct because sdram_config is not defined
[   0.3449 ] Copying signatures
[   0.3457 ] tegrahost_v2 --chip 0x23 0 --partitionlayout readinfo_t234_min_prod.xml.bin --updatesig images_list_signed.xml
[   0.3512 ] mb1_t234_prod_aligned_sigheader.bin.encrypt filename is from images_list
[   0.3514 ] psc_bl1_t234_prod_aligned_sigheader.bin.encrypt filename is from images_list
[   0.3514 ] Boot Rom communication
[   0.3523 ] tegrarcm_v2 --new_session --chip 0x23 0 --uid --download bct_br br_bct_BR.bct --download mb1 mb1_t234_prod_aligned_sigheader.bin.encrypt --download psc_bl1 psc_bl1_t234_prod_aligned_sigheader.bin.encrypt --download bct_mb1 mb1_bct_MB1_sigheader.bct.encrypt
[   0.3531 ] BR_CID: 0x80012344705DD34C30000000130301C0
[   0.3541 ] Sending bct_br
[   0.3668 ] Sending mb1
[   0.3674 ] Sending psc_bl1
[   0.3778 ] Sending bct_mb1
[   0.3838 ] Boot Rom communication completed
[   0.4461 ] tegrahost_v2 --chip 0x23 0 --align applet_t234_aligned.bin
[   0.4495 ] tegrahost_v2 --chip 0x23 0 --magicid MB2A --appendsigheader applet_t234_aligned.bin zerosbk
[   0.4504 ] adding BCH for applet_t234_aligned.bin
[   0.4643 ] tegrasign_v3.py --key None --list applet_t234_aligned_sigheader.bin_list.xml --pubkeyhash pub_key.key --sha sha512
[   0.4645 ] Assuming zero filled SBK key
[   0.4670 ] Warning: pub_key.key is not found
[   0.4668 ] tegrahost_v2 --chip 0x23 0 --updatesigheader applet_t234_aligned_sigheader.bin.encrypt applet_t234_aligned_sigheader.bin.hash zerosbk
[   0.4687 ] Sending mb2_applet...

[   0.4695 ] tegrarcm_v2 --chip 0x23 0 --pollbl --download applet applet_t234_sigheader.bin.encrypt
[   0.4703 ] BL: version 1.2.0.0-t234-54845784-562369e5 last_boot_error: 0
[   0.5890 ] Sending applet
[   0.6969 ] completed
[   0.7001 ] tegrarcm_v2 --chip 0x23 0 --ismb2applet
[   0.7021 ] MB2 Applet version 01.00.0000
[   0.9152 ] tegrarcm_v2 --chip 0x23 0 --ismb2applet
[   0.9181 ] MB2 Applet version 01.00.0000
[   0.9217 ] Retrieving board information
[   0.9227 ] tegrarcm_v2 --chip 0x23 0 --oem platformdetails chip chip_info.bin
[   0.9237 ] MB2 Applet version 01.00.0000
[   0.9449 ] Saved platform info in chip_info.bin
[   0.9504 ] Chip minor revision: 1
[   0.9507 ] Bootrom revision: 0x7
[   0.9509 ] Ram code: 0x0
[   0.9509 ] Chip sku: 0xd2
[   0.9510 ] Chip Sample: prod
[   0.9510 ] 
[   0.9515 ] Retrieving EEPROM data
[   0.9516 ] tegrarcm_v2 --oem platformdetails eeprom cvm /home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/cvm.bin --chip 0x23 0
[   0.9539 ] MB2 Applet version 01.00.0000
[   0.9732 ] Saved platform info in /home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/cvm.bin
[   1.0088 ] tegrarcm_v2 --chip 0x23 0 --ismb2applet
[   1.0117 ] MB2 Applet version 01.00.0000
[   1.0151 ] tegrarcm_v2 --chip 0x23 0 --ismb2applet
[   1.0160 ] MB2 Applet version 01.00.0000
[   1.0329 ] Dumping customer Info
[   1.0348 ] tegrarcm_v2 --chip 0x23 0 --oem dump bct tmp.bct
[   1.0366 ] MB2 Applet version 01.00.0000
[   1.0532 ] Saved bct in tmp.bct
[   1.0632 ] tegrabct_v2 --brbct tmp.bct --chip 0x23 0 --custinfo /home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/custinfo_out.bin
[   1.0650 ] C[   1.0654 ] ustomer data saved in /home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/custinfo_out.bin successfully
[   1.0655 ] Rebooting to recovery mode
[   1.0668 ] tegrarcm_v2 --chip 0x23 0 --ismb2
[   1.0718 ] tegrarcm_v2 --chip 0x23 0 --ismb2applet
[   1.0730 ] MB2 Applet version 01.00.0000
[   1.0890 ] Booting to recovery mode
[   1.0907 ] tegrarcm_v2 --chip 0x23 0 --reboot recovery
[   1.0923 ] MB2 Applet version 01.00.0000
Board ID(3701) version(500) sku(0004) revision(F.0)
Chip SKU(00:00:00:D2) ramcode(00:00:00:00) fuselevel(fuselevel_production) board_FAB(500)
copying bctfile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-p3701-0000-sdram-l4t.dts)... done.
copying minratchet_config(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct-ratchet-p3701-0000.dts)... done.
copying device_config(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct-device-p3701-0000.dts)... done.
copying misc_config(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct-misc-p3701-0000.dts)... done.
copying pinmux_config(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi)... done.
copying gpioint_config(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct-gpioint-p3701-0000.dts)... done.
copying pmic_config(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct-pmic-p3701-0000.dts)... done.
copying pmc_config(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct-padvoltage-p3701-0000-a04.dtsi)... done.
copying deviceprod_config(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct-cprod-p3701-0000.dts)... done.
copying prod_config(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct-prod-p3701-0000.dts)... done.
copying scr_config(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb2-bct-scr-p3701-0000.dts)... done.
copying wb0sdram(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-p3701-0000-wb0sdram-l4t.dts)... done.
copying bootrom_config(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct-reset-p3701-0000.dts)... done.
Existing uphylane_config(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/tegra234-mb1-bct-uphylane-si.dtsi) reused.
copying dev_params(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-br-bct-p3701-0000.dts)... done.
copying dev_params_b(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-br-bct_b-p3701-0000.dts)... done.
copying mb2bct_cfg(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb2-bct-misc-p3701-0000.dts)... done.
Existing pscfwfile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/pscfw_t234_prod.bin) reused.
Existing pscbl1file(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/psc_bl1_t234_prod.bin) reused.
Existing mtsmcefile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/mce_flash_o10_cr_prod.bin) reused.
Existing mb2applet(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/applet_t234.bin) reused.
Existing bootloader(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/mb2_t234.bin) reused.
copying initrd(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/l4t_initrd.img)... done.
bl is uefi
Making Boot image... done.
Not signing of boot.img
Existing sosfile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/mb1_t234_prod.bin) reused.
Existing tegraboot(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/mb2_t234.bin) reused.
Existing cpu_bootloader(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/mb2_t234.bin) reused.
Existing mb2blfile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/mb2_t234.bin) reused.
Existing xusbfile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/xusb_t234_prod.bin) reused.
Existing dcefile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/display-t234-dce.bin) reused.
Existing nvdecfile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/nvdec_t234_prod.fw) reused.
Existing psc_rf(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/psc_rf_t234_prod.bin) reused.
Existing mb2_rf(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/mb2rf_t234.bin) reused.
Existing mb1file(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/mb1_t234_prod.bin) reused.
Existing bpffile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/bpmp_t234-TE990M-A1_prod.bin) reused.
copying bpfdtbfile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/tegra234-bpmp-3701-0004-3737-0000.dtb)... done.
Existing scefile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/camera-rtcpu-sce.img) reused.
Existing camerafw(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/camera-rtcpu-t234-rce.img) reused.
Existing apefile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/adsp-fw.bin) reused.
Existing spefile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/spe_t234.bin) reused.
Existing wb0boot(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/sc7_t234_prod.bin) reused.
Existing tosfile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/tos-optee_t234.img) reused.
Existing eksfile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/eks_t234.img) reused.
copying dtbfile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/kernel/dtb/tegra234-p3701-0004-p3737-0000.dtb)... done.
Copying nv_boot_control.conf to rootfs
Reusing existing system.img... 
done.
Not signing of kernel-dtb
Existing tbcfile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/uefi_jetson.bin) reused.
Skip generating EFI system partition image.
copying tbcdtbfile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/kernel/dtb/tegra234-p3701-0004-p3737-0000.dtb)... done.
copying cfgfile(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/t186ref/cfg/flash_t234_qspi_sdmmc.xml) to flash.xml... done.
Existing flashapp(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/tegraflash.py) reused.
*** Updating [A_rce-fw] with camera-rtcpu-t234-rce.img ***
copying overlay_dtb(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/kernel/dtb/L4TConfiguration.dtbo)... done.
copying overlay_dtb(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/kernel/dtb/tegra234-p3701-overlay.dtbo)... done.
copying overlay_dtb(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/kernel/dtb/tegra234-p3737-camera-dual-imx274-overlay.dtbo)... done.
copying overlay_dtb(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/kernel/dtb/tegra234-p3737-camera-e3331-overlay.dtbo)... done.
copying overlay_dtb(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/kernel/dtb/tegra234-p3737-camera-e3333-overlay.dtbo)... done.
copying overlay_dtb(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/kernel/dtb/tegra234-p3737-camera-imx185-overlay.dtbo)... done.
copying overlay_dtb(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/kernel/dtb/tegra234-p3737-camera-imx390-overlay.dtbo)... done.
copying overlay_dtb(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/kernel/dtb/tegra234-p3737-audio-codec-rt5658-40pin.dtbo)... done.
copying overlay_dtb(/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/kernel/dtb/tegra234-p3737-overlay.dtbo)... done.
/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/L4TConfiguration_updated.dts: Warning (unit_address_vs_reg): Node /fragment@0 has a unit name, but no reg property
/home/tw/sda/home/dennis/nvidia/JetPack_5.1.2_Linux_JETSON_AGX_ORIN_NX_TARGETS/Linux_for_Tegra/bootloader/L4TConfiguration.dtbo: Warning (unit_address_vs_reg): Node /fragment@0 has a unit name, but no reg property
./tegraflash.py  --bl uefi_jetson_with_dtb.bin --chip 0x23 --applet mb1_t234_prod.bin --sdram_config tegra234-p3701-0000-sdram-l4t.dts --minratchet_config tegra234-mb1-bct-ratchet-p3701-0000.dts --device_config tegra234-mb1-bct-device-p3701-0000.dts --misc_config tegra234-mb1-bct-misc-p3701-0000.dts --pinmux_config tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi --gpioint_config tegra234-mb1-bct-gpioint-p3701-0000.dts --pmic_config tegra234-mb1-bct-pmic-p3701-0000.dts --pmc_config tegra234-mb1-bct-padvoltage-p3701-0000-a04.dtsi --deviceprod_config tegra234-mb1-bct-cprod-p3701-0000.dts --prod_config tegra234-mb1-bct-prod-p3701-0000.dts --scr_config tegra234-mb2-bct-scr-p3701-0000.dts --wb0sdram_config tegra234-p3701-0000-wb0sdram-l4t.dts --br_cmd_config tegra234-mb1-bct-reset-p3701-0000.dts --uphy tegra234-mb1-bct-uphylane-si.dtsi --dev_params tegra234-br-bct-p3701-0000.dts,tegra234-br-bct_b-p3701-0000.dts --mb2bct_cfg tegra234-mb2-bct-misc-p3701-0000.dts  --cfg  flash.xml --bins "psc_fw pscfw_t234_prod.bin; mts_mce mce_flash_o10_cr_prod.bin; mb2_applet applet_t234.bin; mb2_bootloader mb2_t234.bin; xusb_fw xusb_t234_prod.bin; dce_fw display-t234-dce.bin; nvdec nvdec_t234_prod.fw; bpmp_fw bpmp_t234-TE990M-A1_prod.bin; bpmp_fw_dtb tegra234-bpmp-3701-0004-3737-0000.dtb; sce_fw camera-rtcpu-sce.img; rce_fw camera-rtcpu-t234-rce.img; ape_fw adsp-fw.bin; spe_fw spe_t234.bin; tos tos-optee_t234.img; eks eks_t234.img"  --odmdata gbe-uphy-config-22,hsstp-lane-map-3,nvhs-uphy-config-0,hsio-uphy-config-0,gbe0-enable-10g  --overlay_dtb L4TConfiguration.dtbo,tegra234-p3701-overlay.dtbo,tegra234-p3737-camera-dual-imx274-overlay.dtbo,tegra234-p3737-camera-e3331-overlay.dtbo,tegra234-p3737-camera-e3333-overlay.dtbo,tegra234-p3737-camera-imx185-overlay.dtbo,tegra234-p3737-camera-imx390-overlay.dtbo,tegra234-p3737-audio-codec-rt5658-40pin.dtbo,tegra234-p3737-overlay.dtbo, --bldtb tegra234-p3701-0004-p3737-0000.dtb --concat_cpubl_bldtb --cpubl uefi_jetson.bin  --cmd "signwrite A_rce-fw camera-rtcpu-t234-rce.img; reboot"  --bct_backup  --boot_chain A  
Welcome to Tegra Flash
version 1.0.0
Type ? or help for help and q or quit to exit
Use ! to execute system commands
 
[   0.0237 ] tegrasign_v3.py --key None --getmode mode.txt
[   0.0239 ] Assuming zero filled SBK key
[   0.0233 ] Parsing partition layout
[   0.0242 ] tegraparser_v2 --pt flash.xml.tmp
[   0.0288 ] Change tegra234-bpmp-3701-0004-3737-0000.dtb to tegra234-bpmp-3701-0004-3737-0000_with_odm.dtb
[   0.0288 ] Change tegra234-bpmp-3701-0004-3737-0000.dtb to tegra234-bpmp-3701-0004-3737-0000_with_odm.dtb
[   0.0826 ] /usr/bin/python3 dtbcheck.py -c t234 -o tegra234-bpmp-3701-0004-3737-0000_with_odm.dtb tegra234-bpmp-3701-0004-3737-0000_with_odm_tmp.dtb
[   0.7652 ] Concatenating L4TConfiguration.dtbo,tegra234-p3701-overlay.dtbo,tegra234-p3737-camera-dual-imx274-overlay.dtbo,tegra234-p3737-camera-e3331-overlay.dtbo,tegra234-p3737-camera-e3333-overlay.dtbo,tegra234-p3737-camera-imx185-overlay.dtbo,tegra234-p3737-camera-imx390-overlay.dtbo,tegra234-p3737-audio-codec-rt5658-40pin.dtbo,tegra234-p3737-overlay.dtbo to tegra234-p3701-0004-p3737-0000_with_odm_overlay.dtb
[   0.7656 ] Concatenating bl dtb to cpubl binary
[   0.7684 ] MB2 binary: mb2_t234.bin
[   0.7685 ] Pre-processing mb2bct config: tegra234-mb2-bct-misc-p3701-0000.dts
[   0.8390 ] Pre-processing mb2bct config: tegra234-mb2-bct-scr-p3701-0000.dts
[   1.2518 ] Generating coldboot mb2-bct
[   1.2518 ] tegrabct_v2 --chip 0x23 0 --mb2bct mb2_cold_boot_bct.cfg --mb2bctcfg tegra234-mb2-bct-misc-p3701-0000_cpp.dtb --scr tegra234-mb2-bct-scr-p3701-0000_cpp.dtb
[   1.2526 ] WARNING: unknown property 'tfc_version'
[   1.2538 ] WARNING: unknown property 'addr_header_version'
[   1.2637 ] Updating mb2-bct with storage information
[   1.2646 ] tegrabct_v2 --chip 0x23 0 --mb2bct mb2_cold_boot_bct_MB2.bct --updatestorageinfo flash.xml.bin
[   1.2661 ] Concatenating mb2-bct to mb2 binary
[   1.2661 ] mb2_bin_file = mb2_t234.bin
[   1.2661 ] mb2_bct_file = mb2_cold_boot_bct_MB2.bct
[   1.2703 ] DCE binary: display-t234-dce.bin
[   1.2704 ] Kernel DTB used: kernel_tegra234-p3701-0004-p3737-0000.dtb
[   1.2704 ] Concatenating kernel-dtb to dce-fw binary
[   1.2705 ] dce_bin = display-t234-dce.bin
[   1.2705 ] kernel_dtb = kernel_tegra234-p3701-0004-p3737-0000.dtb
[   1.2705 ] dce_with_dtb = display-t234-dce_with_kernel_tegra234-p3701-0004-p3737-0000.bin
[   1.2764 ] Update display-t234-dce_with_kernel_tegra234-p3701-0004-p3737-0000.bin to dce_fw partitions
[   1.2789 ] Parsing partition layout
[   1.2804 ] tegraparser_v2 --pt flash.xml.tmp
[   1.2820 ] Pre-processing config: tegra234-mb1-bct-reset-p3701-0000.dts
[   1.2871 ] Pre-processing config: tegra234-mb1-bct-device-p3701-0000.dts
[   1.2923 ] Pre-processing config: tegra234-mb1-bct-cprod-p3701-0000.dts
[   1.2987 ] Pre-processing config: tegra234-mb1-bct-gpioint-p3701-0000.dts
[   1.3070 ] Pre-processing config: tegra234-mb1-bct-misc-p3701-0000.dts
[   1.3204 ] Pre-processing config: tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi
[   1.3728 ] Pre-processing config: tegra234-mb1-bct-padvoltage-p3701-0000-a04.dtsi
[   1.3778 ] Pre-processing config: tegra234-mb1-bct-pmic-p3701-0000.dts
[   1.3842 ] Pre-processing config: tegra234-mb1-bct-prod-p3701-0000.dts
[   1.3913 ] Pre-processing config: tegra234-p3701-0000-sdram-l4t.dts
[   3.2298 ] Pre-processing config: tegra234-mb1-bct-uphylane-si.dtsi
[   3.2405 ] Pre-processing config: tegra234-p3701-0000-wb0sdram-l4t.dts
[   5.0956 ] Pre-processing config: tegra234-mb1-bct-ratchet-p3701-0000.dts
[   5.1010 ] Creating list of images to be signed
[   5.1020 ] Generating ratchet blob
[   5.1020 ] Generating coldboot mb1-bct
[   5.1030 ] tegrabct_v2 --chip 0x23 0 --mb1bct mb1_cold_boot_bct.cfg --misc tegra234-mb1-bct-misc-p3701-0000_cpp.dtb --wb0sdram tegra234-p3701-0000-wb0sdram-l4t_cpp.dtb --pinmux tegra234-mb1-bct-pinmux-p3701-0000-a04_cpp.dtb --pmc tegra234-mb1-bct-padvoltage-p3701-0000-a04_cpp.dtb --pmic tegra234-mb1-bct-pmic-p3701-0000_cpp.dtb --brcommand tegra234-mb1-bct-reset-p3701-0000_cpp.dtb --prod tegra234-mb1-bct-prod-p3701-0000_cpp.dtb --gpioint tegra234-mb1-bct-gpioint-p3701-0000_cpp.dtb --uphy tegra234-mb1-bct-uphylane-si_cpp.dtb --device tegra234-mb1-bct-device-p3701-0000_cpp.dtb --deviceprod tegra234-mb1-bct-cprod-p3701-0000_cpp.dtb --minratchet tegra234-mb1-bct-ratchet-p3701-0000_cpp.dtb --ratchet_blob ratchet_blob.bin
[   5.1039 ] MB1-BCT version: 0.10
[   5.1041 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED1/ is not supported
[   5.1045 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED1/ is not supported
[   5.1048 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED1/ is not supported
[   5.1052 ] ERROR: /misc/tsc_controls/tsc_locking_config is not supported
[   5.1055 ] ERROR: /misc/tsc_controls/tsc_locking_diff_configuration is not supported
[   5.1058 ] ERROR: /misc/tsc_controls/tsc_locking_ref_frequency_configuration is not supported
[   5.1062 ] ERROR: /misc/tsc_controls/tsc_locking_control is not supported
[   5.1065 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_configuration is not supported
[   5.1069 ] ERROR: /misc/tsc_controls/tsc_locking_fast_adjust_configuration is not supported
[   5.1072 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_delta_control is not supported
[   5.1076 ] ERROR: /misc/tsc_controls/tsc_capture_control_ptx is not supported
[   5.1079 ] ERROR: /misc/tsc_controls/tsc_capture_config_ptx is not supported
[   5.1082 ] ERROR: /misc/tsc_controls/tsc_stscrsr is not supported
[   5.1084 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_num_control is not supported

[   5.1088 ] Parsing config file :tegra234-mb1-bct-pinmux-p3701-0000-a04_cpp.dtb 
[   5.1093 ] Added Platform Config 0 data with size :- 3168
[   5.1093 ] 
[   5.1093 ] Parsing config file :tegra234-mb1-bct-padvoltage-p3701-0000-a04_cpp.dtb 
[   5.1094 ] WARNING: unknown node 'g2'
[   5.1094 ] WARNING: unknown node 'g2'
[   5.1094 ] WARNING: unknown node 'g9'
[   5.1094 ] WARNING: unknown node 'g9'
[   5.1094 ] Added Platform Config 2 data with size :- 24
[   5.1094 ] 
[   5.1094 ] Parsing config file :tegra234-mb1-bct-pmic-p3701-0000_cpp.dtb 
[   5.1094 ] Added Platform Config 4 data with size :- 532
[   5.1094 ] 
[   5.1094 ] Parsing config file :tegra234-mb1-bct-reset-p3701-0000_cpp.dtb 
[   5.1094 ] Added Platform Config 3 data with size :- 52
[   5.1094 ] 
[   5.1094 ] Parsing config file :tegra234-mb1-bct-prod-p3701-0000_cpp.dtb 
[   5.1094 ] WARNING: unknown property 'major'
[   5.1094 ] WARNING: unknown property 'minor'
[   5.1094 ] Added Platform Config 5 data with size :- 524
[   5.1094 ] 
[   5.1094 ] Parsing config file :tegra234-mb1-bct-gpioint-p3701-0000_cpp.dtb 
[   5.1094 ] WARNING: unknown property 'major'
[   5.1094 ] WARNING: unknown property 'minor'
[   5.1094 ] Added Platform Config 7 data with size :- 380
[   5.1094 ] 
[   5.1094 ] Parsing config file :tegra234-mb1-bct-uphylane-si_cpp.dtb 
[   5.1094 ] Added Platform Config 8 data with size :- 24
[   5.1094 ] 
[   5.1095 ] Parsing config file :tegra234-mb1-bct-device-p3701-0000_cpp.dtb 
[   5.1095 ] Added Platform Config 9 data with size :- 100
[   5.1095 ] 
[   5.1095 ] Parsing config file :tegra234-mb1-bct-cprod-p3701-0000_cpp.dtb 
[   5.1095 ] ModuleCount 0 NumProdNames 0
[   5.1095 ] Added Platform Config 6 data with size :- 16
[   5.1095 ] 
[   5.1095 ] Parsing config file :tegra234-mb1-bct-ratchet-p3701-0000_cpp.dtb 
[   5.1095 ] 
[   5.1095 ] Updating mb1-bct with firmware information
[   5.1106 ] tegrabct_v2 --chip 0x23 0 --mb1bct mb1_cold_boot_bct_MB1.bct --updatefwinfo flash.xml.bin
[   5.1133 ] tegrahost_v2 --chip 0x23 0 --align mb1_cold_boot_bct_MB1_aligned.bct
[   5.1153 ] tegrahost_v2 --chip 0x23 0 --magicid MBCT --ratchet_blob ratchet_blob.bin --appendsigheader mb1_cold_boot_bct_MB1_aligned.bct zerosbk
[   5.1163 ] adding BCH for mb1_cold_boot_bct_MB1_aligned.bct
[   5.1180 ] tegrasign_v3.py --key None --list mb1_cold_boot_bct_MB1_aligned_sigheader.bct_list.xml --pubkeyhash pub_key.key --sha sha512
[   5.1183 ] Assuming zero filled SBK key
[   5.1201 ] Warning: pub_key.key is not found
[   5.1206 ] tegrahost_v2 --chip 0x23 0 --updatesigheader mb1_cold_boot_bct_MB1_aligned_sigheader.bct.encrypt mb1_cold_boot_bct_MB1_aligned_sigheader.bct.hash zerosbk
[   5.1222 ] tegrahost_v2 --chip 0x23 0 --partitionlayout flash.xml.bin --ratchet_blob ratchet_blob.bin --list images_list.xml zerosbk
[   5.1231 ] MB1: Nvheader already present is mb1_t234_prod_aligned.bin
[   5.1240 ] Header already present for mb1_t234_prod_aligned_sigheader.bin
[   5.1243 ] MB1: Nvheader already present is psc_bl1_t234_prod_aligned.bin
[   5.1297 ] Header already present for psc_bl1_t234_prod_aligned_sigheader.bin
[   5.1300 ] Header already present for nvdec_t234_prod_aligned.fw
[   5.1326 ] adding BCH for mb2_t234_with_mb2_cold_boot_bct_MB2_aligned.bin
[   5.1394 ] adding BCH for xusb_t234_prod_aligned.bin
[   5.1536 ] Header already present for bpmp_t234-TE990M-A1_prod_aligned.bin
[   5.1605 ] adding BCH for tegra234-bpmp-3701-0004-3737-0000_with_odm_aligned.dtb
[   5.1770 ] Header already present for pscfw_t234_prod_aligned.bin
[   5.1853 ] Header already present for mce_flash_o10_cr_prod_aligned.bin
[   5.1914 ] Header already present for sc7_t234_prod.bin
[   5.1945 ] Header already present for psc_rf_t234_prod_aligned.bin
[   5.1977 ] adding BCH for mb2rf_t234_aligned.bin
[   5.1999 ] adding BCH for uefi_jetson_with_dtb_aligned.bin
[   5.2094 ] adding BCH for tos-optee_t234_aligned.img
[   5.3058 ] adding BCH for eks_t234_aligned.img
[   5.3402 ] INFO: compressing display-t234-dce_with_kernel_tegra234-p3701-0004-p3737-0000_aligned.bin
[   5.4997 ] INFO: complete compression, display-t234-dce_with_kernel_tegra234-p3701-0004-p3737-0000_aligned.bin, ratio = 7%
[   5.5202 ] adding BCH for display-t234-dce_with_kernel_tegra234-p3701-0004-p3737-0000_aligned_blob_w_bin_aligned.bin
[   5.5363 ] adding BCH for spe_t234_aligned.bin
[   5.5485 ] adding BCH for camera-rtcpu-t234-rce_aligned.img
[   5.5573 ] adding BCH for adsp-fw_aligned.bin
[   5.5743 ] MB1: Nvheader already present is mb1_t234_prod_aligned.bin
[   5.5869 ] Header already present for mb1_t234_prod_aligned_sigheader.bin
[   5.5873 ] MB1: Nvheader already present is psc_bl1_t234_prod_aligned.bin
[   5.5920 ] Header already present for psc_bl1_t234_prod_aligned_sigheader.bin
[   5.5923 ] Header already present for nvdec_t234_prod_aligned.fw
[   5.5946 ] adding BCH for mb2_t234_with_mb2_cold_boot_bct_MB2_aligned.bin
[   5.5999 ] adding BCH for xusb_t234_prod_aligned.bin
[   5.6136 ] Header already present for bpmp_t234-TE990M-A1_prod_aligned.bin
[   5.6208 ] adding BCH for tegra234-bpmp-3701-0004-3737-0000_with_odm_aligned.dtb
[   5.6377 ] Header already present for pscfw_t234_prod_aligned.bin
[   5.6460 ] Header already present for mce_flash_o10_cr_prod_aligned.bin
[   5.6523 ] Header already present for sc7_t234_prod.bin
[   5.6555 ] Header already present for psc_rf_t234_prod_aligned.bin
[   5.6587 ] adding BCH for mb2rf_t234_aligned.bin
[   5.6609 ] adding BCH for uefi_jetson_with_dtb_aligned.bin
[   5.6711 ] adding BCH for tos-optee_t234_aligned.img
[   5.7687 ] adding BCH for eks_t234_aligned.img
[   5.8033 ] INFO: compressing display-t234-dce_with_kernel_tegra234-p3701-0004-p3737-0000_aligned.bin
[   5.9944 ] INFO: complete compression, display-t234-dce_with_kernel_tegra234-p3701-0004-p3737-0000_aligned.bin, ratio = 7%
[   6.0147 ] adding BCH for display-t234-dce_with_kernel_tegra234-p3701-0004-p3737-0000_aligned_blob_w_bin_aligned.bin
[   6.0313 ] adding BCH for spe_t234_aligned.bin
[   6.0436 ] adding BCH for camera-rtcpu-t234-rce_aligned.img
[   6.0526 ] adding BCH for adsp-fw_aligned.bin
[   6.0820 ] Filling MB1 storage info
[   6.0820 ] Parsing dev params for multi chains
[   6.0878 ] Generating br-bct
[   6.0888 ] Updating dev and MSS params in BR BCT
[   6.0889 ] tegrabct_v2 --dev_param tegra234-br-bct-p3701-0000_cpp.dtb --sdram tegra234-p3701-0000-sdram-l4t_cpp.dtb --brbct br_bct.cfg --chip 0x23 0
[   6.1980 ] Updating bl info
[   6.1990 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updateblinfo flash.xml.bin
[   6.2055 ] Generating br-bct
[   6.2065 ] Updating dev and MSS params in BR BCT
[   6.2066 ] tegrabct_v2 --dev_param tegra234-br-bct_b-p3701-0000_cpp.dtb --sdram tegra234-p3701-0000-sdram-l4t_cpp.dtb --brbct br_bct.cfg --chip 0x23 0
[   6.3164 ] Updating bl info
[   6.3174 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updateblinfo flash.xml.bin
[   6.3188 ] Generating BCT backup image
[   6.3189 ] dd if=/dev/zero of=bct_backup.img bs=1 count=32768
[   6.3209 ] 32768+0 records in
[   6.3709 ] 32768+0 records out
[   6.3709 ] 32768 bytes (33 kB, 32 KiB) copied, 0.0495337 s, 662 kB/s
[   6.3709 ] 
[   6.3709 ] Concatenating BCT for chain A to bct_backup.img

[   6.3709 ] dd if=br_bct_BR.bct of=bct_backup.img bs=1 seek=0 conv=notrunc
[   6.3718 ] 8192+0 records in
[   6.3833 ] 8192+0 records out
[   6.3833 ] 8192 bytes (8.2 kB, 8.0 KiB) copied, 0.0111509 s, 735 kB/s
[   6.3833 ] 
[   6.3833 ] Concatenating BCT for chain B to bct_backup.img

[   6.3833 ] dd if=br_bct_b_BR.bct of=bct_backup.img bs=1 seek=16384 conv=notrunc
[   6.3843 ] 8192+0 records in
[   6.3976 ] 8192+0 records out
[   6.3977 ] 8192 bytes (8.2 kB, 8.0 KiB) copied, 0.0129802 s, 631 kB/s
[   6.3977 ] 
[   6.3977 ] Generating signatures
[   6.3985 ] tegrasign_v3.py --key None --list images_list.xml --pubkeyhash pub_key.key --sha sha512
[   6.3987 ] Assuming zero filled SBK key
[   6.4892 ] Warning: pub_key.key is not found
[   6.4915 ] Parsing dev params for multi chains
[   6.4915 ] Generating br-bct
[   6.4926 ] Updating dev and MSS params in BR BCT
[   6.4927 ] tegrabct_v2 --dev_param tegra234-br-bct-p3701-0000_cpp.dtb --sdram tegra234-p3701-0000-sdram-l4t_cpp.dtb --brbct br_bct.cfg --chip 0x23 0
[   6.6003 ] Updating bl info
[   6.6014 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updateblinfo flash.xml.bin --updatesig images_list_signed.xml
[   6.6035 ] Get Signed section of bct
[   6.6045 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --listbct bct_list.xml
[   6.6056 ] Signing BCT
[   6.6063 ] tegrasign_v3.py --key None --list bct_list.xml --pubkeyhash pub_key.key --sha sha512
[   6.6066 ] Assuming zero filled SBK key
[   6.6093 ] Sha saved in br_bct_BR.sha
[   6.6096 ] Warning: pub_key.key is not found
[   6.6090 ] Updating BCT with signature
[   6.6099 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updatesig bct_list_signed.xml
[   6.6108 ] Offset :4608 Len :3584
[   6.6113 ] Generating SHA2 Hash
[   6.6120 ] tegrasign_v3.py --key None --list bct_list.xml --sha sha512
[   6.6123 ] Assuming zero filled SBK key
[   6.6123 ] Assuming zero filled SBK key
[   6.6154 ] Sha saved in br_bct_BR.sha
[   6.6151 ] Updating BCT with SHA2 Hash
[   6.6162 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updatesha bct_list_signed.xml
[   6.6172 ] Offset :4608 Len :3584
[   6.6174 ] Offset :68 Len :8124
[   6.6177 ] Generating br-bct
[   6.6187 ] Updating dev and MSS params in BR BCT
[   6.6188 ] tegrabct_v2 --dev_param tegra234-br-bct_b-p3701-0000_cpp.dtb --sdram tegra234-p3701-0000-sdram-l4t_cpp.dtb --brbct br_bct.cfg --chip 0x23 0
[   6.7269 ] Updating bl info
[   6.7281 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updateblinfo flash.xml.bin --updatesig images_list_signed.xml
[   6.7304 ] Get Signed section of bct
[   6.7314 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --listbct bct_list.xml
[   6.7324 ] Signing BCT
[   6.7332 ] tegrasign_v3.py --key None --list bct_list.xml --pubkeyhash pub_key.key --sha sha512
[   6.7335 ] Assuming zero filled SBK key
[   6.7362 ] Sha saved in br_bct_BR.sha
[   6.7366 ] Warning: pub_key.key is not found
[   6.7359 ] Updating BCT with signature
[   6.7369 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updatesig bct_list_signed.xml
[   6.7378 ] Offset :4608 Len :3584
[   6.7382 ] Generating SHA2 Hash
[   6.7389 ] tegrasign_v3.py --key None --list bct_list.xml --sha sha512
[   6.7392 ] Assuming zero filled SBK key
[   6.7392 ] Assuming zero filled SBK key
[   6.7423 ] Sha saved in br_bct_BR.sha
[   6.7420 ] Updating BCT with SHA2 Hash
[   6.7431 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updatesha bct_list_signed.xml
[   6.7441 ] Offset :4608 Len :3584
[   6.7444 ] Offset :68 Len :8124
[   6.7446 ] Generating BCT backup image
[   6.7446 ] dd if=/dev/zero of=bct_backup.img bs=1 count=32768
[   6.7457 ] 32768+0 records in
[   6.7991 ] 32768+0 records out
[   6.7991 ] 32768 bytes (33 kB, 32 KiB) copied, 0.0529323 s, 619 kB/s
[   6.7991 ] 
[   6.7991 ] Concatenating BCT for chain A to bct_backup.img

[   6.7992 ] dd if=br_bct_BR.bct of=bct_backup.img bs=1 seek=0 conv=notrunc
[   6.8002 ] 8192+0 records in
[   6.8116 ] 8192+0 records out
[   6.8116 ] 8192 bytes (8.2 kB, 8.0 KiB) copied, 0.0110289 s, 743 kB/s
[   6.8116 ] 
[   6.8117 ] Concatenating BCT for chain B to bct_backup.img

[   6.8117 ] dd if=br_bct_b_BR.bct of=bct_backup.img bs=1 seek=16384 conv=notrunc
[   6.8126 ] 8192+0 records in
[   6.8240 ] 8192+0 records out
[   6.8240 ] 8192 bytes (8.2 kB, 8.0 KiB) copied, 0.0110823 s, 739 kB/s
[   6.8240 ] 
[   6.8241 ] Generating coldboot mb1-bct
[   6.8250 ] tegrabct_v2 --chip 0x23 0 --mb1bct mb1_cold_boot_bct.cfg --misc tegra234-mb1-bct-misc-p3701-0000_cpp.dtb --wb0sdram tegra234-p3701-0000-wb0sdram-l4t_cpp.dtb --pinmux tegra234-mb1-bct-pinmux-p3701-0000-a04_cpp.dtb --pmc tegra234-mb1-bct-padvoltage-p3701-0000-a04_cpp.dtb --pmic tegra234-mb1-bct-pmic-p3701-0000_cpp.dtb --brcommand tegra234-mb1-bct-reset-p3701-0000_cpp.dtb --prod tegra234-mb1-bct-prod-p3701-0000_cpp.dtb --gpioint tegra234-mb1-bct-gpioint-p3701-0000_cpp.dtb --uphy tegra234-mb1-bct-uphylane-si_cpp.dtb --device tegra234-mb1-bct-device-p3701-0000_cpp.dtb --deviceprod tegra234-mb1-bct-cprod-p3701-0000_cpp.dtb --minratchet tegra234-mb1-bct-ratchet-p3701-0000_cpp.dtb --ratchet_blob ratchet_blob.bin
[   6.8259 ] MB1-BCT version: 0.10
[   6.8261 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED1/ is not supported
[   6.8264 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED1/ is not supported
[   6.8267 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED1/ is not supported
[   6.8270 ] ERROR: /misc/tsc_controls/tsc_locking_config is not supported
[   6.8273 ] ERROR: /misc/tsc_controls/tsc_locking_diff_configuration is not supported
[   6.8276 ] ERROR: /misc/tsc_controls/tsc_locking_ref_frequency_configuration is not supported
[   6.8279 ] ERROR: /misc/tsc_controls/tsc_locking_control is not supported
[   6.8282 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_configuration is not supported
[   6.8285 ] ERROR: /misc/tsc_controls/tsc_locking_fast_adjust_configuration is not supported
[   6.8288 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_delta_control is not supported
[   6.8291 ] ERROR: /misc/tsc_controls/tsc_capture_control_ptx is not supported
[   6.8294 ] ERROR: /misc/tsc_controls/tsc_capture_config_ptx is not supported
[   6.8297 ] ERROR: /misc/tsc_controls/tsc_stscrsr is not supported
[   6.8299 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_num_control is not supported

[   6.8302 ] Parsing config file :tegra234-mb1-bct-pinmux-p3701-0000-a04_cpp.dtb 
[   6.8304 ] Added Platform Config 0 data with size :- 3168
[   6.8304 ] 
[   6.8304 ] Parsing config file :tegra234-mb1-bct-padvoltage-p3701-0000-a04_cpp.dtb 
[   6.8304 ] WARNING: unknown node 'g2'
[   6.8304 ] WARNING: unknown node 'g2'
[   6.8304 ] WARNING: unknown node 'g9'
[   6.8304 ] WARNING: unknown node 'g9'
[   6.8304 ] Added Platform Config 2 data with size :- 24
[   6.8304 ] 
[   6.8305 ] Parsing config file :tegra234-mb1-bct-pmic-p3701-0000_cpp.dtb 
[   6.8305 ] Added Platform Config 4 data with size :- 532
[   6.8305 ] 
[   6.8305 ] Parsing config file :tegra234-mb1-bct-reset-p3701-0000_cpp.dtb 
[   6.8305 ] Added Platform Config 3 data with size :- 52
[   6.8305 ] 
[   6.8305 ] Parsing config file :tegra234-mb1-bct-prod-p3701-0000_cpp.dtb 
[   6.8305 ] WARNING: unknown property 'major'
[   6.8305 ] WARNING: unknown property 'minor'
[   6.8305 ] Added Platform Config 5 data with size :- 524
[   6.8305 ] 
[   6.8305 ] Parsing config file :tegra234-mb1-bct-gpioint-p3701-0000_cpp.dtb 
[   6.8305 ] WARNING: unknown property 'major'
[   6.8305 ] WARNING: unknown property 'minor'
[   6.8305 ] Added Platform Config 7 data with size :- 380
[   6.8305 ] 
[   6.8305 ] Parsing config file :tegra234-mb1-bct-uphylane-si_cpp.dtb 
[   6.8305 ] Added Platform Config 8 data with size :- 24
[   6.8305 ] 
[   6.8305 ] Parsing config file :tegra234-mb1-bct-device-p3701-0000_cpp.dtb 
[   6.8305 ] Added Platform Config 9 data with size :- 100
[   6.8305 ] 
[   6.8305 ] Parsing config file :tegra234-mb1-bct-cprod-p3701-0000_cpp.dtb 
[   6.8306 ] ModuleCount 0 NumProdNames 0
[   6.8306 ] Added Platform Config 6 data with size :- 16
[   6.8306 ] 
[   6.8306 ] Parsing config file :tegra234-mb1-bct-ratchet-p3701-0000_cpp.dtb 
[   6.8306 ] 
[   6.8306 ] Updating mb1-bct with firmware information
[   6.8316 ] tegrabct_v2 --chip 0x23 0 --mb1bct mb1_cold_boot_bct_MB1.bct --updatefwinfo flash.xml.bin
[   6.8339 ] tegrahost_v2 --chip 0x23 0 --align mb1_cold_boot_bct_MB1_aligned.bct
[   6.8362 ] tegrahost_v2 --chip 0x23 0 --magicid MBCT --ratchet_blob ratchet_blob.bin --appendsigheader mb1_cold_boot_bct_MB1_aligned.bct zerosbk
[   6.8373 ] adding BCH for mb1_cold_boot_bct_MB1_aligned.bct
[   6.8392 ] tegrasign_v3.py --key None --list mb1_cold_boot_bct_MB1_aligned_sigheader.bct_list.xml --pubkeyhash pub_key.key --sha sha512
[   6.8394 ] Assuming zero filled SBK key
[   6.8415 ] Warning: pub_key.key is not found
[   6.8420 ] tegrahost_v2 --chip 0x23 0 --updatesigheader mb1_cold_boot_bct_MB1_aligned_sigheader.bct.encrypt mb1_cold_boot_bct_MB1_aligned_sigheader.bct.hash zerosbk
[   6.8435 ] Generating recovery mb1-bct
[   6.8445 ] tegrabct_v2 --chip 0x23 0 --mb1bct mb1_bct.cfg --misc tegra234-mb1-bct-misc-p3701-0000_cpp.dtb --wb0sdram tegra234-p3701-0000-wb0sdram-l4t_cpp.dtb --pinmux tegra234-mb1-bct-pinmux-p3701-0000-a04_cpp.dtb --pmc tegra234-mb1-bct-padvoltage-p3701-0000-a04_cpp.dtb --pmic tegra234-mb1-bct-pmic-p3701-0000_cpp.dtb --brcommand tegra234-mb1-bct-reset-p3701-0000_cpp.dtb --prod tegra234-mb1-bct-prod-p3701-0000_cpp.dtb --gpioint tegra234-mb1-bct-gpioint-p3701-0000_cpp.dtb --uphy tegra234-mb1-bct-uphylane-si_cpp.dtb --device tegra234-mb1-bct-device-p3701-0000_cpp.dtb --deviceprod tegra234-mb1-bct-cprod-p3701-0000_cpp.dtb --minratchet tegra234-mb1-bct-ratchet-p3701-0000_cpp.dtb --ratchet_blob ratchet_blob.bin
[   6.8455 ] MB1-BCT version: 0.10
[   6.8456 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED1/ is not supported
[   6.8460 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED1/ is not supported
[   6.8463 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED1/ is not supported
[   6.8466 ] ERROR: /misc/tsc_controls/tsc_locking_config is not supported
[   6.8469 ] ERROR: /misc/tsc_controls/tsc_locking_diff_configuration is not supported
[   6.8472 ] ERROR: /misc/tsc_controls/tsc_locking_ref_frequency_configuration is not supported
[   6.8476 ] ERROR: /misc/tsc_controls/tsc_locking_control is not supported
[   6.8479 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_configuration is not supported
[   6.8482 ] ERROR: /misc/tsc_controls/tsc_locking_fast_adjust_configuration is not supported
[   6.8485 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_delta_control is not supported
[   6.8489 ] ERROR: /misc/tsc_controls/tsc_capture_control_ptx is not supported
[   6.8491 ] ERROR: /misc/tsc_controls/tsc_capture_config_ptx is not supported
[   6.8494 ] ERROR: /misc/tsc_controls/tsc_stscrsr is not supported
[   6.8497 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_num_control is not supported

[   6.8500 ] Parsing config file :tegra234-mb1-bct-pinmux-p3701-0000-a04_cpp.dtb 
[   6.8502 ] Added Platform Config 0 data with size :- 3168
[   6.8502 ] 
[   6.8502 ] Parsing config file :tegra234-mb1-bct-padvoltage-p3701-0000-a04_cpp.dtb 
[   6.8502 ] WARNING: unknown node 'g2'
[   6.8502 ] WARNING: unknown node 'g2'
[   6.8502 ] WARNING: unknown node 'g9'
[   6.8502 ] WARNING: unknown node 'g9'
[   6.8502 ] Added Platform Config 2 data with size :- 24
[   6.8502 ] 
[   6.8502 ] Parsing config file :tegra234-mb1-bct-pmic-p3701-0000_cpp.dtb 
[   6.8502 ] Added Platform Config 4 data with size :- 532
[   6.8502 ] 
[   6.8502 ] Parsing config file :tegra234-mb1-bct-reset-p3701-0000_cpp.dtb 
[   6.8502 ] Added Platform Config 3 data with size :- 52
[   6.8502 ] 
[   6.8502 ] Parsing config file :tegra234-mb1-bct-prod-p3701-0000_cpp.dtb 
[   6.8503 ] WARNING: unknown property 'major'
[   6.8503 ] WARNING: unknown property 'minor'
[   6.8503 ] Added Platform Config 5 data with size :- 524
[   6.8503 ] 
[   6.8503 ] Parsing config file :tegra234-mb1-bct-gpioint-p3701-0000_cpp.dtb 
[   6.8503 ] WARNING: unknown property 'major'
[   6.8503 ] WARNING: unknown property 'minor'
[   6.8503 ] Added Platform Config 7 data with size :- 380
[   6.8503 ] 
[   6.8503 ] Parsing config file :tegra234-mb1-bct-uphylane-si_cpp.dtb 
[   6.8503 ] Added Platform Config 8 data with size :- 24
[   6.8503 ] 
[   6.8503 ] Parsing config file :tegra234-mb1-bct-device-p3701-0000_cpp.dtb 
[   6.8503 ] Added Platform Config 9 data with size :- 100
[   6.8503 ] 
[   6.8503 ] Parsing config file :tegra234-mb1-bct-cprod-p3701-0000_cpp.dtb 
[   6.8503 ] ModuleCount 0 NumProdNames 0
[   6.8503 ] Added Platform Config 6 data with size :- 16
[   6.8503 ] 
[   6.8503 ] Parsing config file :tegra234-mb1-bct-ratchet-p3701-0000_cpp.dtb 
[   6.8503 ] 
[   6.8504 ] Updating mb1-bct with firmware information
[   6.8514 ] tegrabct_v2 --chip 0x23 0 --mb1bct mb1_bct_MB1.bct --recov --updatefwinfo flash.xml.bin
[   6.8539 ] tegrahost_v2 --chip 0x23 0 --align mb1_bct_MB1_aligned.bct
[   6.8558 ] tegrahost_v2 --chip 0x23 0 --magicid MBCT --ratchet_blob ratchet_blob.bin --appendsigheader mb1_bct_MB1_aligned.bct zerosbk
[   6.8566 ] adding BCH for mb1_bct_MB1_aligned.bct
[   6.8583 ] tegrasign_v3.py --key None --list mb1_bct_MB1_aligned_sigheader.bct_list.xml --pubkeyhash pub_key.key --sha sha512
[   6.8585 ] Assuming zero filled SBK key
[   6.8602 ] Warning: pub_key.key is not found
[   6.8605 ] tegrahost_v2 --chip 0x23 0 --updatesigheader mb1_bct_MB1_aligned_sigheader.bct.encrypt mb1_bct_MB1_aligned_sigheader.bct.hash zerosbk
[   6.8619 ] Generating coldboot mem-bct
[   6.8629 ] tegrabct_v2 --chip 0x23 0 --sdram tegra234-p3701-0000-sdram-l4t_cpp.dtb --wb0sdram tegra234-p3701-0000-wb0sdram-l4t_cpp.dtb --membct tegra234-p3701-0000-sdram-l4t_cpp_1.bct tegra234-p3701-0000-sdram-l4t_cpp_2.bct tegra234-p3701-0000-sdram-l4t_cpp_3.bct tegra234-p3701-0000-sdram-l4t_cpp_4.bct
[   6.8638 ]  packing sdram params with Wb0 file tegra234-p3701-0000-wb0sdram-l4t_cpp.dtb
[   6.9729 ] Packing sdram param for instance[0]
[   6.9730 ] Packing sdram param for instance[1]
[   6.9732 ] Packing sdram param for instance[2]
[   6.9733 ] Packing sdram param for instance[3]
[   6.9735 ] Packing sdram param for instance[4]
[   6.9736 ] Packing sdram param for instance[5]
[   6.9738 ] Packing sdram param for instance[6]
[   6.9739 ] Packing sdram param for instance[7]
[   6.9741 ] Packing sdram param for instance[8]
[   6.9742 ] Packing sdram param for instance[9]
[   6.9744 ] Packing sdram param for instance[10]
[   6.9745 ] Packing sdram param for instance[11]
[   6.9747 ] Packing sdram param for instance[12]
[   6.9748 ] Packing sdram param for instance[13]
[   6.9750 ] Packing sdram param for instance[14]
[   6.9752 ] Packing sdram param for instance[15]
[   7.0793 ] Getting sector size from pt
[   7.0804 ] tegraparser_v2 --getsectorsize flash.xml.bin sector_info.bin
[   7.0815 ] BlockSize read from layout is 0x200

[   7.0825 ] tegrahost_v2 --chip 0x23 0 --blocksize 512 --magicid MEMB --addsigheader_multi tegra234-p3701-0000-sdram-l4t_cpp_1.bct tegra234-p3701-0000-sdram-l4t_cpp_2.bct tegra234-p3701-0000-sdram-l4t_cpp_3.bct tegra234-p3701-0000-sdram-l4t_cpp_4.bct
[   7.0834 ] Binary 0 length is 58752
[   7.0836 ] Binary 0 align length is 58880
[   7.0845 ] Binary 1 length is 58752
[   7.0846 ] Binary 1 align length is 58880
[   7.0856 ] Binary 2 length is 58752
[   7.0857 ] Binary 2 align length is 58880
[   7.0867 ] Binary 3 length is 58752
[   7.0868 ] Binary 3 align length is 58880
[   7.0878 ] Buffer length is 235520
[   7.0879 ] adding BCH for tegra234-p3701-0000-sdram-l4t_cpp_1.bct
[   7.0883 ] new length is 243712
[   7.0883 ] 
[   7.0898 ] tegrahost_v2 --chip 0x23 0 --align mem_coldboot_aligned.bct
[   7.0920 ] tegrahost_v2 --chip 0x23 0 --magicid MEMB --ratchet_blob ratchet_blob.bin --appendsigheader mem_coldboot_aligned.bct zerosbk
[   7.0930 ] Header already present for mem_coldboot_aligned.bct
[   7.0946 ] tegrasign_v3.py --key None --list mem_coldboot_aligned_sigheader.bct_list.xml --pubkeyhash pub_key.key --sha sha512
[   7.0948 ] Assuming zero filled SBK key
[   7.0972 ] Warning: pub_key.key is not found
[   7.0978 ] tegrahost_v2 --chip 0x23 0 --updatesigheader mem_coldboot_aligned_sigheader.bct.encrypt mem_coldboot_aligned_sigheader.bct.hash zerosbk
[   7.1000 ] Generating recovery mem-bct
[   7.1012 ] tegrabct_v2 --chip 0x23 0 --sdram tegra234-p3701-0000-sdram-l4t_cpp.dtb --wb0sdram tegra234-p3701-0000-wb0sdram-l4t_cpp.dtb --membct tegra234-p3701-0000-sdram-l4t_cpp_1.bct tegra234-p3701-0000-sdram-l4t_cpp_2.bct tegra234-p3701-0000-sdram-l4t_cpp_3.bct tegra234-p3701-0000-sdram-l4t_cpp_4.bct
[   7.1022 ]  packing sdram params with Wb0 file tegra234-p3701-0000-wb0sdram-l4t_cpp.dtb
[   7.2109 ] Packing sdram param for instance[0]
[   7.2110 ] Packing sdram param for instance[1]
[   7.2112 ] Packing sdram param for instance[2]
[   7.2114 ] Packing sdram param for instance[3]
[   7.2115 ] Packing sdram param for instance[4]
[   7.2116 ] Packing sdram param for instance[5]
[   7.2118 ] Packing sdram param for instance[6]
[   7.2119 ] Packing sdram param for instance[7]
[   7.2121 ] Packing sdram param for instance[8]
[   7.2122 ] Packing sdram param for instance[9]
[   7.2124 ] Packing sdram param for instance[10]
[   7.2125 ] Packing sdram param for instance[11]
[   7.2127 ] Packing sdram param for instance[12]
[   7.2128 ] Packing sdram param for instance[13]
[   7.2130 ] Packing sdram param for instance[14]
[   7.2131 ] Packing sdram param for instance[15]
[   7.3180 ] Reading ramcode from backup chip_info.bin file
[   7.3181 ] RAMCODE Read from Device: 0

[   7.3181 ] Using ramcode 0
[   7.3182 ] Disabled BPMP dtb trim, using default dtb
[   7.3182 ] 
[   7.3196 ] tegrahost_v2 --chip 0x23 0 --align mem_rcm_aligned.bct
[   7.3215 ] tegrahost_v2 --chip 0x23 0 --magicid MEM0 --ratchet_blob ratchet_blob.bin --appendsigheader mem_rcm_aligned.bct zerosbk
[   7.3224 ] adding BCH for mem_rcm_aligned.bct
[   7.3257 ] tegrasign_v3.py --key None --list mem_rcm_aligned_sigheader.bct_list.xml --pubkeyhash pub_key.key --sha sha512
[   7.3259 ] Assuming zero filled SBK key
[   7.3278 ] Warning: pub_key.key is not found
[   7.3283 ] tegrahost_v2 --chip 0x23 0 --updatesigheader mem_rcm_aligned_sigheader.bct.encrypt mem_rcm_aligned_sigheader.bct.hash zerosbk
[   7.3299 ] Copying signatures
[   7.3308 ] tegrahost_v2 --chip 0x23 0 --partitionlayout flash.xml.bin --updatesig images_list_signed.xml
[   7.3822 ] mb1_t234_prod_aligned_sigheader.bin.encrypt filename is from images_list
[   7.3829 ] psc_bl1_t234_prod_aligned_sigheader.bin.encrypt filename is from images_list
[   7.3829 ] Boot Rom communication
[   7.3845 ] tegrarcm_v2 --new_session --chip 0x23 0 --uid --download bct_br br_bct_BR.bct --download mb1 mb1_t234_prod_aligned_sigheader.bin.encrypt --download psc_bl1 psc_bl1_t234_prod_aligned_sigheader.bin.encrypt --download bct_mb1 mb1_bct_MB1_sigheader.bct.encrypt
[   7.3856 ] BR_CID: 0x80012344705DD34C30000000130301C0
[   7.3866 ] Sending bct_br
[   7.4066 ] Sending mb1
[   7.4071 ] Sending psc_bl1
[   7.4173 ] Sending bct_mb1
[   7.4232 ] Boot Rom communication completed
[   7.4233 ] Generating blob for T23x
[   7.4313 ] tegrahost_v2 --chip 0x23 0 --align blob_uefi_jetson_with_dtb_aligned.bin
[   7.4344 ] tegrahost_v2 --chip 0x23 0 --magicid CPBL --ratchet_blob ratchet_blob.bin --appendsigheader blob_uefi_jetson_with_dtb_aligned.bin zerosbk
[   7.4353 ] adding BCH for blob_uefi_jetson_with_dtb_aligned.bin
[   7.5334 ] tegrasign_v3.py --key None --list blob_uefi_jetson_with_dtb_aligned_sigheader.bin_list.xml --pubkeyhash pub_key.key --sha sha512
[   7.5337 ] Assuming zero filled SBK key
[   7.5410 ] Warning: pub_key.key is not found
[   7.5418 ] tegrahost_v2 --chip 0x23 0 --updatesigheader blob_uefi_jetson_with_dtb_aligned_sigheader.bin.encrypt blob_uefi_jetson_with_dtb_aligned_sigheader.bin.hash zerosbk
[   7.5489 ] Get magic id
[   7.5503 ] tegraparser_v2 --get_magic psc_fw
[   7.5515 ] PFWP
[   7.5515 ] 
[   7.5515 ] partition type psc_fw, magic id = PFWP
[   7.5530 ] tegrahost_v2 --chip 0x23 0 --align blob_pscfw_t234_prod_aligned.bin
[   7.5551 ] tegrahost_v2 --chip 0x23 0 --magicid PFWP --ratchet_blob ratchet_blob.bin --appendsigheader blob_pscfw_t234_prod_aligned.bin zerosbk
[   7.5562 ] Header already present for blob_pscfw_t234_prod_aligned.bin
[   7.5647 ] tegrasign_v3.py --key None --list blob_pscfw_t234_prod_aligned_sigheader.bin_list.xml --pubkeyhash pub_key.key --sha sha512
[   7.5649 ] Assuming zero filled SBK key
[   7.5672 ] Warning: pub_key.key is not found
[   7.5676 ] tegrahost_v2 --chip 0x23 0 --updatesigheader blob_pscfw_t234_prod_aligned_sigheader.bin.encrypt blob_pscfw_t234_prod_aligned_sigheader.bin.hash zerosbk
[   7.5697 ] Get magic id
[   7.5707 ] tegraparser_v2 --get_magic mts_mce
[   7.5716 ] MTSM
[   7.5716 ] 
[   7.5716 ] partition type mts_mce, magic id = MTSM
[   7.5728 ] tegrahost_v2 --chip 0x23 0 --align blob_mce_flash_o10_cr_prod_aligned.bin
[   7.5751 ] tegrahost_v2 --chip 0x23 0 --magicid MTSM --ratchet_blob ratchet_blob.bin --appendsigheader blob_mce_flash_o10_cr_prod_aligned.bin zerosbk
[   7.5763 ] Header already present for blob_mce_flash_o10_cr_prod_aligned.bin
[   7.5811 ] tegrasign_v3.py --key None --list blob_mce_flash_o10_cr_prod_aligned_sigheader.bin_list.xml --pubkeyhash pub_key.key --sha sha512
[   7.5813 ] Assuming zero filled SBK key
[   7.5833 ] Warning: pub_key.key is not found
[   7.5838 ] tegrahost_v2 --chip 0x23 0 --updatesigheader blob_mce_flash_o10_cr_prod_aligned_sigheader.bin.encrypt blob_mce_flash_o10_cr_prod_aligned_sigheader.bin.hash zerosbk
[   7.5857 ] Get magic id
[   7.5868 ] tegraparser_v2 --get_magic mb2_applet
[   7.5880 ] MB2A
[   7.5880 ] 
[   7.5880 ] partition type mb2_applet, magic id = MB2A
[   7.5896 ] tegrahost_v2 --chip 0x23 0 --align blob_applet_t234_aligned.bin
[   7.5920 ] tegrahost_v2 --chip 0x23 0 --magicid MB2A --ratchet_blob ratchet_blob.bin --appendsigheader blob_applet_t234_aligned.bin zerosbk
[   7.5931 ] adding BCH for blob_applet_t234_aligned.bin
[   7.6068 ] tegrasign_v3.py --key None --list blob_applet_t234_aligned_sigheader.bin_list.xml --pubkeyhash pub_key.key --sha sha512
[   7.6070 ] Assuming zero filled SBK key
[   7.6090 ] Warning: pub_key.key is not found
[   7.6093 ] tegrahost_v2 --chip 0x23 0 --updatesigheader blob_applet_t234_aligned_sigheader.bin.encrypt blob_applet_t234_aligned_sigheader.bin.hash zerosbk
[   7.6121 ] Generating recovery mb2-bct
[   7.6121 ] tegrabct_v2 --chip 0x23 0 --mb2bct mb2_bct.cfg --recov --mb2bctcfg tegra234-mb2-bct-misc-p3701-0000_cpp.dtb --scr tegra234-mb2-bct-scr-p3701-0000_cpp.dtb
[   7.6129 ] WARNING: unknown property 'tfc_version'
[   7.6142 ] WARNING: unknown property 'addr_header_version'
[   7.6253 ] Updating mb2-bct with storage information
[   7.6263 ] tegrabct_v2 --chip 0x23 0 --mb2bct mb2_bct_MB2.bct --updatestorageinfo flash.xml.bin
[   7.6278 ] Concatenating mb2-bct to mb2 binary
[   7.6278 ] mb2_bin_file = mb2_t234.bin
[   7.6278 ] mb2_bct_file = mb2_bct_MB2.bct
[   7.6283 ] Get magic id
[   7.6293 ] tegraparser_v2 --get_magic mb2_bootloader
[   7.6302 ] MB2B
[   7.6302 ] 
[   7.6302 ] partition type mb2_bootloader, magic id = MB2B
[   7.6315 ] tegrahost_v2 --chip 0x23 0 --align blob_mb2_t234_with_mb2_bct_MB2_aligned.bin
[   7.6337 ] tegrahost_v2 --chip 0x23 0 --magicid MB2B --ratchet_blob ratchet_blob.bin --appendsigheader blob_mb2_t234_with_mb2_bct_MB2_aligned.bin zerosbk
[   7.6347 ] adding BCH for blob_mb2_t234_with_mb2_bct_MB2_aligned.bin
[   7.6523 ] tegrasign_v3.py --key None --list blob_mb2_t234_with_mb2_bct_MB2_aligned_sigheader.bin_list.xml --pubkeyhash pub_key.key --sha sha512
[   7.6526 ] Assuming zero filled SBK key
[   7.6551 ] Warning: pub_key.key is not found
[   7.6555 ] tegrahost_v2 --chip 0x23 0 --updatesigheader blob_mb2_t234_with_mb2_bct_MB2_aligned_sigheader.bin.encrypt blob_mb2_t234_with_mb2_bct_MB2_aligned_sigheader.bin.hash zerosbk
[   7.6577 ] Get magic id
[   7.6587 ] tegraparser_v2 --get_magic xusb_fw
[   7.6599 ] XUSB
[   7.6599 ] 
[   7.6599 ] partition type xusb_fw, magic id = XUSB
[   7.6614 ] tegrahost_v2 --chip 0x23 0 --align blob_xusb_t234_prod_aligned.bin
[   7.6636 ] tegrahost_v2 --chip 0x23 0 --magicid XUSB --ratchet_blob ratchet_blob.bin --appendsigheader blob_xusb_t234_prod_aligned.bin zerosbk
[   7.6646 ] adding BCH for blob_xusb_t234_prod_aligned.bin
[   7.6715 ] tegrasign_v3.py --key None --list blob_xusb_t234_prod_aligned_sigheader.bin_list.xml --pubkeyhash pub_key.key --sha sha512
[   7.6717 ] Assuming zero filled SBK key
[   7.6737 ] Warning: pub_key.key is not found
[   7.6743 ] tegrahost_v2 --chip 0x23 0 --updatesigheader blob_xusb_t234_prod_aligned_sigheader.bin.encrypt blob_xusb_t234_prod_aligned_sigheader.bin.hash zerosbk
[   7.6764 ] Kernel DTB used: kernel_tegra234-p3701-0004-p3737-0000.dtb
[   7.6764 ] Concatenating kernel-dtb to dce-fw binary
[   7.6764 ] dce_bin = display-t234-dce.bin
[   7.6764 ] kernel_dtb = kernel_tegra234-p3701-0004-p3737-0000.dtb
[   7.6764 ] dce_with_dtb = display-t234-dce_with_kernel_tegra234-p3701-0004-p3737-0000.bin
[   7.7006 ] Get magic id
[   7.7024 ] tegraparser_v2 --get_magic dce_fw
[   7.7039 ] DCEF
[   7.7039 ] 
[   7.7039 ] partition type dce_fw, magic id = DCEF
[   7.7136 ] tegrahost_v2 --chip 0x23 0 --align blob_display-t234-dce_with_kernel_tegra234-p3701-0004-p3737-0000_aligned.bin
[   7.7155 ] tegrahost_v2 --chip 0x23 0 --magicid DCEF --ratchet_blob ratchet_blob.bin --appendsigheader blob_display-t234-dce_with_kernel_tegra234-p3701-0004-p3737-0000_aligned.bin zerosbk
[   7.7164 ] adding BCH for blob_display-t234-dce_with_kernel_tegra234-p3701-0004-p3737-0000_aligned.bin
[   8.0181 ] tegrasign_v3.py --key None --list blob_display-t234-dce_with_kernel_tegra234-p3701-0004-p3737-0000_aligned_sigheader.bin_list.xml --pubkeyhash pub_key.key --sha sha512
[   8.0183 ] Assuming zero filled SBK key
[   8.0383 ] Warning: pub_key.key is not found
[   8.0393 ] tegrahost_v2 --chip 0x23 0 --updatesigheader blob_display-t234-dce_with_kernel_tegra234-p3701-0004-p3737-0000_aligned_sigheader.bin.encrypt blob_display-t234-dce_with_kernel_tegra234-p3701-0004-p3737-0000_aligned_sigheader.bin.hash zerosbk
[   8.0599 ] Get magic id
[   8.0614 ] tegraparser_v2 --get_magic nvdec
[   8.0629 ] NDEC
[   8.0629 ] 
[   8.0630 ] partition type nvdec, magic id = NDEC
[   8.0648 ] tegrahost_v2 --chip 0x23 0 --align blob_nvdec_t234_prod_aligned.fw
[   8.0674 ] tegrahost_v2 --chip 0x23 0 --magicid NDEC --ratchet_blob ratchet_blob.bin --appendsigheader blob_nvdec_t234_prod_aligned.fw zerosbk
[   8.0686 ] Header already present for blob_nvdec_t234_prod_aligned.fw
[   8.0749 ] tegrasign_v3.py --key None --list blob_nvdec_t234_prod_aligned_sigheader.fw_list.xml --pubkeyhash pub_key.key --sha sha512
[   8.0751 ] Assuming zero filled SBK key
[   8.0772 ] Warning: pub_key.key is not found
[   8.0776 ] tegrahost_v2 --chip 0x23 0 --updatesigheader blob_nvdec_t234_prod_aligned_sigheader.fw.encrypt blob_nvdec_t234_prod_aligned_sigheader.fw.hash zerosbk
[   8.0795 ] Get magic id
[   8.0805 ] tegraparser_v2 --get_magic bpmp_fw
[   8.0816 ] BPMF
[   8.0816 ] 
[   8.0817 ] partition type bpmp_fw, magic id = BPMF
[   8.0838 ] tegrahost_v2 --chip 0x23 0 --align blob_bpmp_t234-TE990M-A1_prod_aligned.bin
[   8.0859 ] tegrahost_v2 --chip 0x23 0 --magicid BPMF --ratchet_blob ratchet_blob.bin --appendsigheader blob_bpmp_t234-TE990M-A1_prod_aligned.bin zerosbk
[   8.0870 ] Header already present for blob_bpmp_t234-TE990M-A1_prod_aligned.bin
[   8.1083 ] tegrasign_v3.py --key None --list blob_bpmp_t234-TE990M-A1_prod_aligned_sigheader.bin_list.xml --pubkeyhash pub_key.key --sha sha512
[   8.1086 ] Assuming zero filled SBK key
[   8.1119 ] Warning: pub_key.key is not found
[   8.1125 ] tegrahost_v2 --chip 0x23 0 --updatesigheader blob_bpmp_t234-TE990M-A1_prod_aligned_sigheader.bin.encrypt blob_bpmp_t234-TE990M-A1_prod_aligned_sigheader.bin.hash zerosbk
[   8.1160 ] Using bpmp-dtb concatenated with odmdata in blob
[   8.1161 ] Get magic id
[   8.1173 ] tegraparser_v2 --get_magic bpmp_fw_dtb
[   8.1185 ] BPMD
[   8.1185 ] 
[   8.1185 ] partition type bpmp_fw_dtb, magic id = BPMD
[   8.1200 ] tegrahost_v2 --chip 0x23 0 --align blob_tegra234-bpmp-3701-0004-3737-0000_with_odm_aligned.dtb
[   8.1221 ] tegrahost_v2 --chip 0x23 0 --magicid BPMD --ratchet_blob ratchet_blob.bin --appendsigheader blob_tegra234-bpmp-3701-0004-3737-0000_with_odm_aligned.dtb zerosbk
[   8.1232 ] adding BCH for blob_tegra234-bpmp-3701-0004-3737-0000_with_odm_aligned.dtb
[   8.1340 ] tegrasign_v3.py --key None --list blob_tegra234-bpmp-3701-0004-3737-0000_with_odm_aligned_sigheader.dtb_list.xml --pubkeyhash pub_key.key --sha sha512
[   8.1342 ] Assuming zero filled SBK key
[   8.1369 ] Warning: pub_key.key is not found
[   8.1378 ] tegrahost_v2 --chip 0x23 0 --updatesigheader blob_tegra234-bpmp-3701-0004-3737-0000_with_odm_aligned_sigheader.dtb.encrypt blob_tegra234-bpmp-3701-0004-3737-0000_with_odm_aligned_sigheader.dtb.hash zerosbk
[   8.1406 ] Get magic id
[   8.1420 ] tegraparser_v2 --get_magic sce_fw
[   8.1433 ] SCEF
[   8.1433 ] 
[   8.1434 ] partition type sce_fw, magic id = SCEF
[   8.1449 ] tegrahost_v2 --chip 0x23 0 --align blob_camera-rtcpu-sce_aligned.img
[   8.1469 ] tegrahost_v2 --chip 0x23 0 --magicid SCEF --ratchet_blob ratchet_blob.bin --appendsigheader blob_camera-rtcpu-sce_aligned.img zerosbk
[   8.1479 ] adding BCH for blob_camera-rtcpu-sce_aligned.img
[   8.1547 ] tegrasign_v3.py --key None --list blob_camera-rtcpu-sce_aligned_sigheader.img_list.xml --pubkeyhash pub_key.key --sha sha512
[   8.1549 ] Assuming zero filled SBK key
[   8.1573 ] Warning: pub_key.key is not found
[   8.1578 ] tegrahost_v2 --chip 0x23 0 --updatesigheader blob_camera-rtcpu-sce_aligned_sigheader.img.encrypt blob_camera-rtcpu-sce_aligned_sigheader.img.hash zerosbk
[   8.1598 ] Get magic id
[   8.1609 ] tegraparser_v2 --get_magic rce_fw
[   8.1619 ] RCEF
[   8.1619 ] 
[   8.1620 ] partition type rce_fw, magic id = RCEF
[   8.1636 ] tegrahost_v2 --chip 0x23 0 --align blob_camera-rtcpu-t234-rce_aligned.img
[   8.1657 ] tegrahost_v2 --chip 0x23 0 --magicid RCEF --ratchet_blob ratchet_blob.bin --appendsigheader blob_camera-rtcpu-t234-rce_aligned.img zerosbk
[   8.1667 ] adding BCH for blob_camera-rtcpu-t234-rce_aligned.img
[   8.1860 ] tegrasign_v3.py --key None --list blob_camera-rtcpu-t234-rce_aligned_sigheader.img_list.xml --pubkeyhash pub_key.key --sha sha512
[   8.1862 ] Assuming zero filled SBK key
[   8.1888 ] Warning: pub_key.key is not found
[   8.1893 ] tegrahost_v2 --chip 0x23 0 --updatesigheader blob_camera-rtcpu-t234-rce_aligned_sigheader.img.encrypt blob_camera-rtcpu-t234-rce_aligned_sigheader.img.hash zerosbk
[   8.1919 ] Get magic id
[   8.1931 ] tegraparser_v2 --get_magic ape_fw
[   8.1942 ] APEF
[   8.1942 ] 
[   8.1942 ] partition type ape_fw, magic id = APEF
[   8.1958 ] tegrahost_v2 --chip 0x23 0 --align blob_adsp-fw_aligned.bin
[   8.1980 ] tegrahost_v2 --chip 0x23 0 --magicid APEF --ratchet_blob ratchet_blob.bin --appendsigheader blob_adsp-fw_aligned.bin zerosbk
[   8.1991 ] adding BCH for blob_adsp-fw_aligned.bin
[   8.2164 ] tegrasign_v3.py --key None --list blob_adsp-fw_aligned_sigheader.bin_list.xml --pubkeyhash pub_key.key --sha sha512
[   8.2166 ] Assuming zero filled SBK key
[   8.2188 ] Warning: pub_key.key is not found
[   8.2193 ] tegrahost_v2 --chip 0x23 0 --updatesigheader blob_adsp-fw_aligned_sigheader.bin.encrypt blob_adsp-fw_aligned_sigheader.bin.hash zerosbk
[   8.2214 ] Get magic id
[   8.2223 ] tegraparser_v2 --get_magic spe_fw
[   8.2233 ] SPEF
[   8.2233 ] 
[   8.2233 ] partition type spe_fw, magic id = SPEF
[   8.2246 ] tegrahost_v2 --chip 0x23 0 --align blob_spe_t234_aligned.bin
[   8.2269 ] tegrahost_v2 --chip 0x23 0 --magicid SPEF --ratchet_blob ratchet_blob.bin --appendsigheader blob_spe_t234_aligned.bin zerosbk
[   8.2279 ] adding BCH for blob_spe_t234_aligned.bin
[   8.2386 ] tegrasign_v3.py --key None --list blob_spe_t234_aligned_sigheader.bin_list.xml --pubkeyhash pub_key.key --sha sha512
[   8.2388 ] Assuming zero filled SBK key
[   8.2409 ] Warning: pub_key.key is not found
[   8.2413 ] tegrahost_v2 --chip 0x23 0 --updatesigheader blob_spe_t234_aligned_sigheader.bin.encrypt blob_spe_t234_aligned_sigheader.bin.hash zerosbk
[   8.2432 ] Get magic id
[   8.2441 ] tegraparser_v2 --get_magic tos
[   8.2451 ] TOSB
[   8.2451 ] 
[   8.2451 ] partition type tos, magic id = TOSB
[   8.2471 ] tegrahost_v2 --chip 0x23 0 --align blob_tos-optee_t234_aligned.img
[   8.2490 ] tegrahost_v2 --chip 0x23 0 --magicid TOSB --ratchet_blob ratchet_blob.bin --appendsigheader blob_tos-optee_t234_aligned.img zerosbk
[   8.2498 ] adding BCH for blob_tos-optee_t234_aligned.img
[   8.2894 ] tegrasign_v3.py --key None --list blob_tos-optee_t234_aligned_sigheader.img_list.xml --pubkeyhash pub_key.key --sha sha512
[   8.2896 ] Assuming zero filled SBK key
[   8.2930 ] Warning: pub_key.key is not found
[   8.2936 ] tegrahost_v2 --chip 0x23 0 --updatesigheader blob_tos-optee_t234_aligned_sigheader.img.encrypt blob_tos-optee_t234_aligned_sigheader.img.hash zerosbk
[   8.2968 ] Get magic id
[   8.2980 ] tegraparser_v2 --get_magic eks
[   8.2990 ] EKSB
[   8.2991 ] 
[   8.2991 ] partition type eks, magic id = EKSB
[   8.3001 ] tegrahost_v2 --chip 0x23 0 --align blob_eks_t234_aligned.img
[   8.3022 ] tegrahost_v2 --chip 0x23 0 --magicid EKSB --ratchet_blob ratchet_blob.bin --appendsigheader blob_eks_t234_aligned.img zerosbk
[   8.3031 ] adding BCH for blob_eks_t234_aligned.img
[   8.3045 ] tegrasign_v3.py --key None --list blob_eks_t234_aligned_sigheader.img_list.xml --pubkeyhash pub_key.key --sha sha512
[   8.3047 ] Assuming zero filled SBK key
[   8.3065 ] Warning: pub_key.key is not found
[   8.3070 ] tegrahost_v2 --chip 0x23 0 --updatesigheader blob_eks_t234_aligned_sigheader.img.encrypt blob_eks_t234_aligned_sigheader.img.hash zerosbk
[   8.3098 ] tegrahost_v2 --chip 0x23 0 --generateblob blob.xml blob.bin
[   8.3108 ] The number of images in blob is 16
[   8.3111 ] blobsize is 18206096
[   8.3112 ] Added binary blob_uefi_jetson_with_dtb_sigheader.bin.encrypt of size 3092544
[   8.3194 ] Added binary blob_pscfw_t234_prod_sigheader.bin.encrypt of size 375168
[   8.3201 ] Added binary blob_mce_flash_o10_cr_prod_sigheader.bin.encrypt of size 190592
[   8.3204 ] Added binary blob_applet_t234_sigheader.bin.encrypt of size 277312
[   8.3208 ] Not supported type: mb2_applet
[   8.3210 ] Added binary blob_mb2_t234_with_mb2_bct_MB2_sigheader.bin.encrypt of size 438768
[   8.3214 ] Added binary blob_xusb_t234_prod_sigheader.bin.encrypt of size 164864
[   8.3217 ] Added binary blob_display-t234-dce_with_kernel_tegra234-p3701-0004-p3737-0000_sigheader.bin.encrypt of size 9537040
[   8.3264 ] Added binary blob_nvdec_t234_prod_sigheader.fw.encrypt of size 294912
[   8.3280 ] Added binary blob_bpmp_t234-TE990M-A1_prod_sigheader.bin.encrypt of size 1051136
[   8.3286 ] Added binary blob_tegra234-bpmp-3701-0004-3737-0000_with_odm_sigheader.dtb.encrypt of size 260160
[   8.3291 ] Added binary blob_camera-rtcpu-sce_sigheader.img.encrypt of size 166304
[   8.3295 ] Added binary blob_camera-rtcpu-t234-rce_sigheader.img.encrypt of size 548192
[   8.3298 ] Added binary blob_adsp-fw_sigheader.bin.encrypt of size 400864
[   8.3301 ] Added binary blob_spe_t234_sigheader.bin.encrypt of size 270336
[   8.3304 ] Added binary blob_tos-optee_t234_sigheader.img.encrypt of size 1127568
[   8.3307 ] Added binary blob_eks_t234_sigheader.img.encrypt of size 9232
[   8.3386 ] Sending membct and RCM blob
[   8.3401 ] tegrarcm_v2 --chip 0x23 0 --pollbl --download bct_mem mem_rcm_sigheader.bct.encrypt --download blob blob.bin
[   8.3412 ] BL: version 1.2.0.0-t234-54845784-562369e5 last_boot_error: 0
[   8.3419 ] Sending bct_mem
[   8.3546 ] Sending blob
[   9.5371 ] completed
[  10.5429 ] tegrarcm_v2 --chip 0x23 0 --ismb2applet
[  10.5503 ] tegrarcm_v2 --chip 0x23 0 --ismb2
[  10.5526 ] MB2 version 01.00.0000
[  10.5695 ] Get magic id
[  10.5712 ] tegraparser_v2 --get_magic rce_fw
[  10.5732 ] RCEF
[  10.5732 ] 
[  10.5733 ] partition type rce_fw, magic id = RCEF
[  10.5733 ] A_rce-fw rce_fw, magic id = RCEF
[  10.5769 ] tegrahost_v2 --chip 0x23 0 --align camera-rtcpu-t234-rce_aligned.img
[  10.5810 ] tegrahost_v2 --chip 0x23 0 --magicid RCEF --ratchet_blob ratchet_blob.bin --appendsigheader camera-rtcpu-t234-rce_aligned.img zerosbk
[  10.5826 ] adding BCH for camera-rtcpu-t234-rce_aligned.img
[  10.6010 ] tegrasign_v3.py --key None --list camera-rtcpu-t234-rce_aligned_sigheader.img_list.xml --pubkeyhash pub_key.key --sha sha512
[  10.6013 ] Assuming zero filled SBK key
[  10.6040 ] Warning: pub_key.key is not found
[  10.6045 ] tegrahost_v2 --chip 0x23 0 --updatesigheader camera-rtcpu-t234-rce_aligned_sigheader.img.encrypt camera-rtcpu-t234-rce_aligned_sigheader.img.hash zerosbk
[  10.6070 ] Erasing partition
[  10.6080 ] tegradevflash_v2 --erase A_rce-fw
[  10.6090 ] Bootloader version 01.00.0000
[  10.6106 ] [Done]
[  14.6651 ] Writing partition
[  14.6690 ] tegradevflash_v2 --write A_rce-fw camera-rtcpu-t234-rce_sigheader.img.encrypt
[  14.6713 ] Bootloader version 01.00.0000
[  14.6734 ] Writing partition A_rce-fw with camera-rtcpu-t234-rce_sigheader.img.encrypt [ 548192 bytes ]
[  14.6744 ] [................................................] 100%
[  21.4226 ] Coldbooting the device
[  21.4272 ] tegrarcm_v2 --chip 0x23 0 --ismb2
[  21.4310 ] MB2 version 01.00.0000
[  21.4329 ] Coldbooting the device
[  21.4341 ] tegrarcm_v2 --chip 0x23 0 --reboot coldboot
[  21.4352 ] MB2 version 01.00.0000
*** The [A_rce-fw] has been updated successfully. ***