I know that the GPU on TX2 has NVENC and NVDEC for video decoding/encoding that are independent of the GPU itself. But on this SoC block diagram (https://devblogs.nvidia.com/wp-content/uploads/2017/03/Tegra_Parker_Block_Diagram.png), I also see blocks for “video encode” and “video decode”. My question is: are they basically NVDEC and NVENC? If not, does it mean that there are two sets of codec available on TX2?
Yes, there are decode and encode engines that can be used simultaneously. Each engine can also handle multiple streams up to the aggregate maximum theoughput per codec, as specified in the module datasheet.