AUO 10" Display on Tegra X2

Robotics & Edge Computing Jetson & Embedded Systems Jetson TX2
1

Hi,
I have a AUO 10 Inch 40 Pin eDP Display panel (Model No. - B101UAN01.A)
It is hooked up to my Jetson TX2 via an adapter board designed according to OEM Design Guide.
https://developer.nvidia.com/embedded/dlc/jetson-tx2-oem-product-design-guide

  • Connected DP0_TX0 to lane 0 and DP0_TX1 to lane 1.
  • 3.3V to 1.8V level shifter to HPD.
  • VDD_3V3_SYS and VDD_SYS_BL for the Backlight.

Hence the hardware part is done I believe.

Now issues are :

  1. Which DTB file do I have to Flash on my Tegra X2 for eDP display output ?
  2. Where could I find board-panel.c to check my panel select logic on TX2 ?

I am using this display panel from AUO as it has been already tested/verified by Nvidia on the TX1.
My Tegra X2 is flashed with Jetpack 3.1.

I followed these topics to reach till this stage :

Thanks

2

Hi manoj_htic,

  1. Please try this dts file

hardware/nvidia/platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-c00-00-auo-1080p-edp.dts

  1. Please check following files.

kernel/t18x/drivers/video/tegra/dc/nvdisp/nvdisp_stub.c

kernel/display/drivers/video/tegra/dc/board-panel.c

3

Hi WayneWWW,

I tried the above and it reports syntax error as below

Error: tegra186-quill-p3310-1000-c00-00-auo-1080p-edp.dts:19.1-2 syntax error
FATAL ERROR: Unable to parse input tree

4

How do you build this dts?

5

Using device tree compiler .

dtc -I dts -O dtb -o tegra186-quill-p3310-1000-c00-00-auo-1080p-edp.dtb tegra186-quill-p3310-1000-c00-00-auo-1080p-edp.dts

Is there any other method to be followed. kindly guide.
Thanks for the quick response.

6

tegra186-quill-p3310-1000-c00-00-auo-1080p-edp.dtb.tar.gz (49.5 KB)

7

Thanks a lot WayneWWW,

I will update you on this after flashing the DTB partition.

I will place this file at
JetPack/3.1/64_TX2/Linux_for_Tegra_64_tx2/kernel/dtb/tegra186-quill-p3310-1000-c00-00-auo-1080p-edp.dtb

I will be flashing it using
sudo ./flash -r -k kernel-dtb jetson-tx2 mmcblk0p1

should I change the File name to
tegra186-quill-p3310-1000-c03-00-base.dtb

or could it be the same ?

Thanks again!!

8

Please modify the DTB field in p2771-0000.conf.common.

9

Hi manoj_htic,

Have you brought up the panel?
Any further information required or can be shared?

Thanks

10

Hi Kayccc,
There seems to be an Impedance mismatch and we are getting the DSI to eDP adapter PCB printed out again.
Will update you on how well it goes by then end of this week.
Thanks to all.

11

For future reference to anyone designing an eDP adapter board there is a carrier board with an eDP port that can be used to validate the SW/LCD.

http://www.aetina.com.tw/products-detail.php?i=205

Now I haven’t tested this yet, but I do plan on ordering it.