I am currently working on a project involving an AGX Xavier industrial board, for which I need to utilize 12 dedicated GPIO pins. I’ve compiled a list of these GPIOs, along with their corresponding pin assignments, for your reference:
GPIO No. Pin No.
- GPIO13 G7 460
- GPIO14 L15 461
- GPIO15 F10 462
- GPIO16 F9 463
- GPIO19 K56 442
- GPIO24 J51 413
- GPIO25 K49 415
- GPIO27 H52 419
- GPIO29 A7 455
- GPIO31 H60 328
- GPIO32 J55 431
- GPIO35 L50 379
I’ve successfully exported and utilized 11 out of these 12 GPIO pins without any issues. However, when attempting to export GPIO25 (K49), I encountered an error message that reads: “ERROR: bash: echo: write error: Device or resource busy,” as depicted in the attached screenshot.
Upon further investigation, I’ve consulted the Pinmux spreadsheets, specifically the “Jetson_AGX_Xavier_Series_Pinmux_Configuration_Template_v1.4,” which indicates that these pins are already configured as GPIO pins.
I am reaching out to seek guidance on how to configure GPIO25 (K49) properly for my project. If there are additional settings or steps required to use this pin as a GPIO, I would greatly appreciate your expertise in this matter.
Thank you in advance for your support.
Are you using the devkit or custom board for AGX Xavier Industrial?
What’s your Jetpack version in use?
Could you help to share the result of the following command on your board?
$ sudo cat /sys/kernel/debug/gpio|grep "gpio-415"
Thank you for your response,
I am using AGX Xavier industrial custom board and utilizing Jetpack 5.1.2.
After giving the "$ sudo cat /sys/kernel/debug/gpio|grep “gpio-415” " this command below error is showing.
gpio-415 (PM.05 |fixed-regulators:reg) out lo
I have attached a screenshot of the error message for your reference.
It seems there’s a device node is using this pin.
Could you help to provide your dtb in use?
Or you could just use other available pins.
Thank you for your response.
It is already a designed board, so we cannot use other GPIOs. In Design also GPIO25 is connected only to the Zynq FPGA. Please refer attached schematic for reference.
GPIO25.pdf (137.4 KB)
And I have attached the Device Tree (dtb) file.
tegra194-p2888-0008-p2822-0000.dtb (384.8 KB)
It seems the following node is using this pin tegra_main_gpio TEGRA194_MAIN_GPIO(M, 5) -
compatible = "regulator-fixed";
reg = <0x71>;
regulator-name = "vdd_sys_en";
regulator-min-microvolt = <0x124f80>;
regulator-max-microvolt = <0x124f80>;
gpio = <0xb 0x65 0x0>;
phandle = <0x3d>;
I’m having trouble understanding how to resolve it by modifying the Device Tree Blob (DTB) file.
In the pinmuxing file, I’ve selected GPIO for this pin, and it should operate as a normal GPIO. However, I suspect that on the evaluation board, this pin might be configured as “vdd sys.”
Could you please provide instructions on how I can configure this pin as a regular GPIO and disable the “vdd sys” setting?
This is the ritght way for you to configure the pin.
Please also make sure the change has been applied correctly to you board.
You may modify the device tree and build the custom kernel/dtb to disable the node you are not using.