Hello All
I am having issues with mttcan on NX to achieve higher bitrates.
I am using a custom carrier board. This board has MCP2517FD CAN module as well.
I followed the instructions detailed here: https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide/hw_setup_jetson_can.html#wwpID0E6HA. This mentions to set PLLAON as clock source for higher bitrates.
I also configured the clock as mentioned under To use PLLAON as clock source
from here https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide/clocks.html#wwpID0E06B0HA
After flashing the board with all modifications, modprobe mttcan
fails.
From the dmesg, it shows
[ 56.335668] mttcan c310000.mttcan: unable to set CAN_CLK parent
[ 56.358635] mttcan c310000.mttcan: probe failed
Since NX is being used, the parent clock is set to PLLAON in tegra194-a02-bpmp-p3668-a00.dtb
TEGRA194_CLK_PLLAON = 94 (0x5e)
clock@can1 {
allow_fractional_divider = <0x1>;
allowed-parents = <0x121 0x5b 0x13a 0x5e>;
clk-id = <0x9>;
};
In the kernel dtb, the clock init settings are done as follows:
clocks-init {
compatible = "nvidia,clocks-config";
status = "okay";
disable {
clocks = <&bpmp_clks TEGRA194_CLK_CAN1>,
<&bpmp_clks TEGRA194_CLK_CAN2>;
};
};
mttcan node is as follows:
mttcan@c310000 {
status = "okay";
pll_source = "pllaon";
clocks = <&bpmp_clks TEGRA194_CLK_CAN1_CORE>,
<&bpmp_clks TEGRA194_CLK_CAN1_HOST>,
<&bpmp_clks TEGRA194_CLK_CAN1>,
<&bpmp_clks TEGRA194_CLK_PLLC>,
<&bpmp_clks TEGRA194_CLK_PLLAON>;
clock-names = "can_core", "can_host","can", "pllc", "pllaon";
};
What could be wrong here? Please suggest.