Can't read correct 88q6113 switch register value with phytool

Hi,

We have a Marvell 88q6113 switch on our customized carrier board connected to XFI0 of the 32G Orin module through a fixed 10G link.
The XFI0 interface can be initialized successfully(eth1) with correct IP address. But when I tried to read the 88q6113 register through phytool(Orin can not read the PHY reg data - #15 by WayneWWW) with MDIO C45 clause, I always get the same results.

root@ubuntu:/home/nvidia/phytool# ./phytool read eth1/0:3/0x3
0x0e03
root@ubuntu:/home/nvidia/phytool# ./phytool read eth1/0:3/0x4
0x0e03
root@ubuntu:/home/nvidia/phytool# ./phytool read eth1/0:2/0x4
0x0e03
root@ubuntu:/home/nvidia/phytool# ./phytool read eth1/0:2/0x3
0x0e03
root@ubuntu:/home/nvidia/phytool# ./phytool read eth1/1:3/0x4
0x0e03
root@ubuntu:/home/nvidia/phytool# ./phytool read eth1/1:3/0x3
0x0e03

The device tree source for XFI0:

       ethernet@6810000 {
                status = "okay";
                nvidia,mac-addr-idx = <1>;
                nvidia,max-platform-mtu = <16383>;
                /* 0=enable, 1=disable */
                nvidia,pause_frames = <0>;
                /* 1: 10G, 0: 5G */
                nvidia,uphy-gbe-mode = <1>;
                /* 0:XFI 10G, 1:XFI 5G, 2:USXGMII 10G, 3:USXGMII 5G */
                nvidia,phy-iface-mode = <0>;
                nvidia,mdio_addr = <0>;

                fixed-link {
                        speed = <10000>;
                        full-duplex;
                };

                mdio {
                        compatible = "nvidia,eqos-mdio";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        ethernet_phy@0 {
                                compatible = "ethernet-phy-ieee802.3-c45";
                                reg = <0x0>;
                                nvidia,phy-rst-pdelay-msec = <150>; /* msec */
                                nvidia,phy-rst-duration-usec = <221000>; /* usec */
                        };
                };
        };

After tracing the code, I found the raw data returned from mgbe_read_phy_reg() was also always 0x0e03.

Could you help have a look and give us some suggestions for debugging?

Thanks!

Please get the PHY datasheet from the vendor first.

We have already got the datasheet from vendor. What we are trying to read is the switch ID register which should be 0x3 and the switch MDIO address is 0x0:0x3(PORT : DEV TYPE). So the initial command was:

root@ubuntu:/home/nvidia/phytool# ./phytool read eth1/0:3/0x3
0x0e03

Then I tried to read other registers and found always return the same value as that of ID register.

Is there any dmesg?

Here comes the dmesg.
dmesg.log (66.4 KB)

Hi @WayneWWW,

Do you have a change to look at the dmesg? Any clue for debugging?

Thanks.

Are you using a phy or a switch case here?

We use a switch(88q6113).

Then it should not have mdio property in the device tree anymore.

https://docs.nvidia.com/jetson/archives/r35.3.1/DeveloperGuide/text/HR/JetsonModuleAdaptationAndBringUp/JetsonAgxOrinSeries.html?highlight=rgmii#for-switch

So how can we access the switch registers using SMI interface in Orin SDK?

Sorry for the late response, have you managed to get issue resolved or still need the support? Thanks

No, we still can’t make the SMI interface work!

Sorry, we don’t have experience with this switch. Please contact with the switch vendor what is needed here.

This topic was automatically closed 14 days after the last reply. New replies are no longer allowed.