Orin can not read the PHY reg data

Hi nvidia team:

As the work requires,I am using the universual file to read the phy register(AQR113C) . The mdio address is 0x0.
the universual file i had upload as one attachment.
mdio_opr.c (1.9 KB)
and cross build a mdio bin file.

then in cmd line exec:
and other reg is 0x0 too.

I have read kernel/nvidia/drivers/net/ethernet/nvidia/nvethernet/ether_linux.c
and /kernel/kernel-5.10/drivers/net/phy/phy.c (func phy_mii_ioctl) ,but can not find any solution.

for a further test,I have test on xavier devkit platform,can get the phy reg data.

the boot log is below:
orin-devkit-log.txt (84.6 KB)

What is configured in the DT ?

Hi WayneWWW:
sorry,I donโ€™t know whatโ€™s you mean.
DTC files?
I modify hardware/nvidia/platform/t23x/concord/kernel-dts/cvb/tegra234-ethernet-3737-0000.dtsi
add line nvidia,mdio_addr = <0>;

no other configure.

I konw the PHY use Clause45 ,but when I debug the code ,it enter red circle in the above picture.and the phy id is 0x0.

Can you directly attach the current full dts in use here?

debug.dts (392.9 KB)

Hi WayneWWW:
I trace the source code .
in kernel/nvidia/drivers/net/ethernet/nvidia/nvethernet/ether_linux.c
->of_mdiobus_register (the kernel API)
->for_each_available_child_of_node(np, child)
->phy = get_phy_device(mdio, addr, is_c45);
and get_phy_device is lib api

printk phy->phy_id is 0x0.so I think not get the true phy info.

Is your carrier board uphy configuration same as devkit? I mean is your MGBE the same lane as devkit?

Hi WayneWWW:
I am using the orin devkit for test now,and the before log and test is based on Orin devkit .
so I think the default configure is what you show in the picture.
I paln to do the same thing on our carrier board after test ok on orin devkit.
could you read phy_id on orin devkit for the same test use the attach file mdio_opr.c

We need some time to check this. Will reply later.

Hi WayneWWW:

do you have any more info about the this topic question?


The mdio tool you are using now is not able to work for 10G PHY.

Please use this one instead so that it can support C45.

phytool read  IFACE/ADDR/REG
phytool write IFACE/ADDR/REG <0-0xffff>
phytool print IFACE/ADDR[/REG]

for C45:

PORT := <0-0x1f>
DEV  := <0-0x1f>
REG  := <0-0xffff>

hi WayneWWW:
I know it is because of not support C45,and modify the some code,it 's ok now. thanks.

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