Clarification on UPHY Lane Configuration and ODMData for IGX T5000 Thor

Robotics & Edge Computing IGX Systems IGX Thor Support
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1

Hi NVIDIA Team,

We are designing a custom carrier board using the IGX T5000 Thor SOM and the L4T 38.5.0 BSP from the IGX 2.0 production release.

We would like to get some clarification regarding the UPHY lane configuration and ODMData settings for our custom carrier board.

1. UPHY configuration in BPMP DTS

We found the following UPHY configuration in:

tegra264-bpmp-3834-0008-4071-0008.dts

uphy {
    status = "okay";
    uphy0-config = <0x07>;
    uphy1-config = <0x07>;
    mgbe0-speed = <0x02>;
    mgbe1-speed = <0x02>;
    mgbe2-speed = <0x02>;
    mgbe3-speed = <0x02>;
    xusb-aux-rx-idle-th = <0x03>;
};

Could you please confirm whether modifying the above UPHY configuration in the DTS file and converting it back to DTB is sufficient to change the UPHY configuration?

Our custom carrier board has the following devices connected:

  • UFS
  • PCIe device
  • 2 × NVMe SSD
  • 2 × Ethernet controllers (1st controller speed used is 1G and 2nd controller speed used is 10G)

Our current UPHY connectivity is approximately as follows:

  • UPHY Lane Group 1: PCIe, one NVMe SSD, and UFS
  • UPHY Lane Group 2: one NVMe SSD and two Ethernet controllers

Could you please provide the required ODMData configuration for this topology?

In particular, we would like to understand which ODMData parameters need to be modified to correctly configure the UPHY lanes for these devices.

2. Purpose of UPHY_CONFIG

We also found the following entry in the configuration:

UPHY_CONFIG="tegra264-mb1-bct-uphy-lanes-p4071-0000.dts";

Could you please explain the purpose of this file and how it differs from the UPHY configuration present in the BPMP DTS?

The file contains entries such as:

uphy-lane@0 {
    lane-owner-map = <0 6 9>, /* UPHY0, lane 6 connected to MPHY0 */
                      <0 7 10>, /* UPHY0, lane 7 connected to MPHY1 */
                      <0 4 2>, /* UPHY0, lane 4 connected to PCIe-C2 */
                      <0 5 2>; /* UPHY0, lane 5 connected to PCIe-C2 */
};

We would like to understand the meaning of the three values in each lane-owner-map entry.

For example:

<0 6 9>

We understand that:

  • 0 = UPHY instance
  • 6 = UPHY lane number

Could you please clarify what the third value (9) represents?

If this value corresponds to a device/owner ID, could you please provide the complete list of valid owner/device IDs and their corresponding devices that can be assigned to UPHY lanes on the IGX T5000 Thor?

Finally, could you please advice us the ODMData changes required to support our planned UPHY lane configuration (UFS, NVME, PCI, Ethernet 1G, Ethernet 10G) ?

Thanks in advance for your support.

3

Hi Pavithra_S,

Please refer to the following document for the UPHY configurations.
IGX Thor Adaptation and Bring-Up — Configure the UPHY Lane
UPHY Lane Configuration — NVIDIA Jetson Linux Developer Guide
Jetson Thor Adaptation and Bring-Up — Configure the UPHY Lane
Jetson Thor Adaptation and Bring-Up — Enable PCIe in a Customer CVB Design

4

Hi Kevin,

We have reviewed all the documents provided and tested the following UPHY configuration on the IGX DevKit to verify the UPHY configuration behavior.

In tegra264-bpmp-3834-0008-4071-0008.dts, we used:

uphy {    status = "okay";    uphy0-config = <0x06>;    uphy1-config = <0x07>;    mgbe0-speed = <0x02>;    mgbe1-speed = <0x02>;    mgbe2-speed = <0x02>;    mgbe3-speed = <0x02>;    xusb-aux-rx-idle-th = <0x03>;};

In file p3834-0008-p4071-0008-ufs.confwe changed the UPHY config as below.

UPHY_CONFIG="";
#UPHY_CONFIG="tegra264-mb1-bct-uphy-lanes-p4071-0000.dts";

We changed uphy0-config to 6 to disable the UFS configuration and verify whether changing the UPHY configuration alone would disable the UFS module. However, with this change, the UFS module was still detected.

We then added the following configuration to p3834-0008-p4071-0008-ufs.conf:

ODMDATA="uphy0-config-6,pcie@3_status=okay"

After adding this, the UFS configuration was disabled and the UFS module was no longer detected. This helped us understand that the UPHY configuration change alone does not completely disable the UFS functionality.

Our final UPHY lane device requirements are as follows:

  • UPHY Lane Group 1: PCIe, one NVMe SSD, and UFS
  • UPHY Lane Group 2: one NVMe SSD and two Ethernet controllers

Could you please advise on the following points regarding the proposed ODMData and UPHY configuration?

  1. Whether the below ODMData configuration is correct for our requirements and will properly enable the PCIe, NVMe SSD, UFS, and Ethernet devices on the respective UPHY lanes:
ODMDATA="uphy0-config-7,uphy1-config-7,pcie@1_status=okay,pcie@2_status=okay,pcie@5_status=okay"
  1. Whether modifying the ODMData alone is sufficient to change the UPHY configuration, or whether the corresponding uphy0-config and uphy1-config values in tegra264-bpmp-3834-0008-4071-0008.dts also need to be modified.
5

Your proposed topology is valid only if Group 1 means PCIe C1 x1 + PCIe C2 x2 (for one NVMe) + UFS, and Group 2 means PCIe C5 x4 (for the second NVMe) + selected MGBE lanes. UFS and PCIe C3 cannot be used together on UPHY0, because UPHY0 config 7 provides UFS, while config 6 provides PCIe C3 x2 instead of UFS.

Also, ODMDATA alone is not sufficient for a custom CVB. Please keep BPMP DT, kernel DT, board.conf/UPHY_CONFIG, and flash configuration aligned. Your proposed ODMDATA can be used only as a starting point if the actual controller usage is C1 + C2 + C5.