Please provide the following info (tick the boxes after creating this topic):
Software Version
DRIVE OS 6.0.10.0
[*] DRIVE OS 6.0.8.1
DRIVE OS 6.0.6
DRIVE OS 6.0.5
DRIVE OS 6.0.4 (rev. 1)
DRIVE OS 6.0.4 SDK
other
Target Operating System
[*] Linux
QNX
other
Hardware Platform
DRIVE AGX Orin Developer Kit (940-63710-0010-300)
[*] DRIVE AGX Orin Developer Kit (940-63710-0010-200)
DRIVE AGX Orin Developer Kit (940-63710-0010-100)
DRIVE AGX Orin Developer Kit (940-63710-0010-D00)
DRIVE AGX Orin Developer Kit (940-63710-0010-C00)
DRIVE AGX Orin Developer Kit (not sure its number)
other
SDK Manager Version
2.1.0
[*] other
Host Machine Version
[] native Ubuntu Linux 20.04 Host installed with SDK Manager
[] native Ubuntu Linux 20.04 Host installed with DRIVE OS Docker Containers
native Ubuntu Linux 18.04 Host installed with DRIVE OS Docker Containers
other
Issue Description
<Hi
Questions
- Do You have rig files (rig.json) , or any kind of instructions on how to create one for 4x imx490 cameras , or 2x IMX728 cameras ? (including serializer/deserializer data and addresses) → full config. Like the one used in nvsipl_camera sample. Cause those presets are not initializing the sensor.
- Do You have .nito files for these sensors ?
- I am looking for nvmedia config files of nvsipl config files for these sensors.
Error String
Logs
Provide logs in text box instead of image
Please paste the complete application log here. If there are multiple logs, please use multiple text box
orin@tegra-ubuntu:/opt/nvidia/drive-linux/samples/nvmedia/nvsipl/test/camera$ sudo ./nvsipl_camera --platform-config “C2SIM728S2RU1120NB20_CPHY_x4” --link-enable-masks “0x1111 0x1111 0x0000 0x0000”
Pipeline: 0 ISP Output: 0 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 0 ISP Output: 1 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 0 ISP Output: 2 is using RGBA PACKED FLOAT16 PL SENSOR_RGBA
Pipeline: 1 ISP Output: 0 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 1 ISP Output: 1 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 1 ISP Output: 2 is using RGBA PACKED FLOAT16 PL SENSOR_RGBA
Pipeline: 2 ISP Output: 0 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 2 ISP Output: 1 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 2 ISP Output: 2 is using RGBA PACKED FLOAT16 PL SENSOR_RGBA
Pipeline: 3 ISP Output: 0 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 3 ISP Output: 1 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 3 ISP Output: 2 is using RGBA PACKED FLOAT16 PL SENSOR_RGBA
Pipeline: 4 ISP Output: 0 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 4 ISP Output: 1 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 4 ISP Output: 2 is using RGBA PACKED FLOAT16 PL SENSOR_RGBA
Pipeline: 5 ISP Output: 0 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 5 ISP Output: 1 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 5 ISP Output: 2 is using RGBA PACKED FLOAT16 PL SENSOR_RGBA
Pipeline: 6 ISP Output: 0 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 6 ISP Output: 1 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 6 ISP Output: 2 is using RGBA PACKED FLOAT16 PL SENSOR_RGBA
Pipeline: 7 ISP Output: 0 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 7 ISP Output: 1 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 7 ISP Output: 2 is using RGBA PACKED FLOAT16 PL SENSOR_RGBA
MAX96712: Revision 5 detected
MAX96712 Link 0: PHY optimization was enabled
MAX96712 Link 1: PHY optimization was enabled
MAX96712 Link 2: PHY optimization was enabled
MAX96712 Link 3: PHY optimization was enabled
MAX96712: Revision 5 detected
nvsipl_camera: ERROR: NvSIPLCamera Init failed
nvsipl_camera: ERROR: Master initialization failed. status: 10
raised PROGRAM_ERROR : unhandled signa
raised l
PROGRAM_ERROR : unhandled signal
orin@tegra-ubuntu:/opt/nvidia/drive-linux/samples/nvmedia/nvsipl/test/camera$ sudo ./nvsipl_camera --platform-config "IMX728_FPDLINK_RGGB_CPHY_x4" --link-enable-masks "0x1111 0x1111 0x0000 0x0000"
Pipeline: 0 ISP Output: 0 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 0 ISP Output: 1 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 0 ISP Output: 2 is using RGBA PACKED FLOAT16 PL SENSOR_RGBA
Pipeline: 1 ISP Output: 0 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 1 ISP Output: 1 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 1 ISP Output: 2 is using RGBA PACKED FLOAT16 PL SENSOR_RGBA
Pipeline: 2 ISP Output: 0 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 2 ISP Output: 1 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 2 ISP Output: 2 is using RGBA PACKED FLOAT16 PL SENSOR_RGBA
Pipeline: 3 ISP Output: 0 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 3 ISP Output: 1 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 3 ISP Output: 2 is using RGBA PACKED FLOAT16 PL SENSOR_RGBA
Pipeline: 4 ISP Output: 0 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 4 ISP Output: 1 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 4 ISP Output: 2 is using RGBA PACKED FLOAT16 PL SENSOR_RGBA
Pipeline: 5 ISP Output: 0 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 5 ISP Output: 1 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 5 ISP Output: 2 is using RGBA PACKED FLOAT16 PL SENSOR_RGBA
Pipeline: 6 ISP Output: 0 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 6 ISP Output: 1 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 6 ISP Output: 2 is using RGBA PACKED FLOAT16 PL SENSOR_RGBA
Pipeline: 7 ISP Output: 0 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 7 ISP Output: 1 is using YUV 420 SEMI-PLANAR UINT8 BL REC_709ER
Pipeline: 7 ISP Output: 2 is using RGBA PACKED FLOAT16 PL SENSOR_RGBA
nvsipl_camera: ERROR: NvSIPLCamera Init failed
nvsipl_camera: ERROR: Master initialization failed. status: 10
raised PROGRAM_ERROR : unhandled signal
raised PROGRAM_ERROR : unhandled signal
raised STORAGE_ERROR : stack overflow or erroneous memory access