Connect 2 AGX Xaviers together over PCIe

I’ve read many posts and long discussions about this functionality including reading the “Jetson AGX Xavier PCIe Endpoint Design Guidelines App Note.” ([url]http://developer.nvidia.com/embedded/dlc/jetson_agx_xavier_pcie_endpoint_guidelines[/url])

The app note is quite extensive, and helpful, but it leaves some questions, like:

  • Why it contains attachments with circuit diagrams for the part NVIDIA E3317_A01 that don’t match the guidelines, like the 22uF capacitors indicated in Figure 1 of the guidelines - missing from the schematics?

  • Why does Nvidia go through the effort to provide just PDF files of the schematics? Gerbers etc would help accelerate development.

But more interestingly:

  • has anybody ever successfully followed the guidelines and built the appropriate card? If so, can we buy a few?

Thanks

  • Arunas

Hi, E3317 is for dev kit connection, there are 0.22uF capacitors on TX lines on dev kit.

PDF schematic is just for reference, customer is suggested to make their own design accordingly.

Thanks for the reply - that the capacitors are already there is something we missed!

The plan is to make our own design at some stage. But in prototyping, the dev kit with the reference part would be a great way to develop a proof of concept and justify further design expenditures. I have lots of pieces to put together for a PoC before I can justify shelling out for a huge board project!

We will check and consider this, thanks.